CN101840868A - 一种半导体倒装焊封装散热改良方法 - Google Patents
一种半导体倒装焊封装散热改良方法 Download PDFInfo
- Publication number
- CN101840868A CN101840868A CN201010163357A CN201010163357A CN101840868A CN 101840868 A CN101840868 A CN 101840868A CN 201010163357 A CN201010163357 A CN 201010163357A CN 201010163357 A CN201010163357 A CN 201010163357A CN 101840868 A CN101840868 A CN 101840868A
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- China
- Prior art keywords
- chip
- semi
- flip
- chip bonding
- improved method
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
Claims (6)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201010163357.3A CN101840868B (zh) | 2010-04-29 | 2010-04-29 | 一种半导体倒装焊封装散热制造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201010163357.3A CN101840868B (zh) | 2010-04-29 | 2010-04-29 | 一种半导体倒装焊封装散热制造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101840868A true CN101840868A (zh) | 2010-09-22 |
CN101840868B CN101840868B (zh) | 2014-11-26 |
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ID=42744162
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN201010163357.3A Active CN101840868B (zh) | 2010-04-29 | 2010-04-29 | 一种半导体倒装焊封装散热制造方法 |
Country Status (1)
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CN (1) | CN101840868B (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106935564A (zh) * | 2015-12-31 | 2017-07-07 | 无锡华润安盛科技有限公司 | 集成电路封装结构 |
CN110911365A (zh) * | 2019-10-28 | 2020-03-24 | 北京时代民芯科技有限公司 | 一种倒装焊封装散热结构及制造方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070052076A1 (en) * | 2002-04-29 | 2007-03-08 | Ramos Mary J | Partially Patterned Lead Frames and Methods of Making and Using the Same in Semiconductor Packaging |
CN101286485A (zh) * | 2007-04-12 | 2008-10-15 | 西门子公司 | 半导体模块 |
US20100041181A1 (en) * | 2004-10-20 | 2010-02-18 | Siliconware Precision Industries Co., Ltd. | Heat dissipating package structure and method for fabricating the same |
-
2010
- 2010-04-29 CN CN201010163357.3A patent/CN101840868B/zh active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070052076A1 (en) * | 2002-04-29 | 2007-03-08 | Ramos Mary J | Partially Patterned Lead Frames and Methods of Making and Using the Same in Semiconductor Packaging |
US7799611B2 (en) * | 2002-04-29 | 2010-09-21 | Unisem (Mauritius) Holdings Limited | Partially patterned lead frames and methods of making and using the same in semiconductor packaging |
US20100041181A1 (en) * | 2004-10-20 | 2010-02-18 | Siliconware Precision Industries Co., Ltd. | Heat dissipating package structure and method for fabricating the same |
US7745262B2 (en) * | 2004-10-20 | 2010-06-29 | Siliconware Precision Industries Co., Ltd. | Heat dissipating package structure and method for fabricating the same |
CN101286485A (zh) * | 2007-04-12 | 2008-10-15 | 西门子公司 | 半导体模块 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106935564A (zh) * | 2015-12-31 | 2017-07-07 | 无锡华润安盛科技有限公司 | 集成电路封装结构 |
CN110911365A (zh) * | 2019-10-28 | 2020-03-24 | 北京时代民芯科技有限公司 | 一种倒装焊封装散热结构及制造方法 |
Also Published As
Publication number | Publication date |
---|---|
CN101840868B (zh) | 2014-11-26 |
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Legal Events
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C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C53 | Correction of patent of invention or patent application | ||
CB03 | Change of inventor or designer information |
Inventor after: Tao Yujuan Inventor after: Wu Xiaochun Inventor after: Liu Peisheng Inventor before: Wu Xiaochun Inventor before: Tao Yujuan |
|
COR | Change of bibliographic data |
Free format text: CORRECT: INVENTOR; FROM: WU XIAOCHUN TAO YUJUAN TO: TAO YUJUAN WU XIAOCHUN LIU PEISHENG |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C53 | Correction of patent of invention or patent application | ||
CB03 | Change of inventor or designer information |
Inventor after: Wu Xiaochun Inventor after: Liu Peisheng Inventor before: Tao Yujuan Inventor before: Wu Xiaochun Inventor before: Liu Peisheng |
|
C56 | Change in the name or address of the patentee | ||
CP03 | Change of name, title or address |
Address after: Jiangsu province Nantong City Chongchuan road 226006 No. 288 Patentee after: Tongfu Microelectronics Co., Ltd. Address before: 226006 Jiangsu Province, Nantong City Chongchuan District Chongchuan Road No. 30 Patentee before: Fujitsu Microelectronics Co., Ltd., Nantong |