CN101789765A - Low power consumption high efficiency operational amplifier circuit and operating method thereof - Google Patents
Low power consumption high efficiency operational amplifier circuit and operating method thereof Download PDFInfo
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- CN101789765A CN101789765A CN200910228739A CN200910228739A CN101789765A CN 101789765 A CN101789765 A CN 101789765A CN 200910228739 A CN200910228739 A CN 200910228739A CN 200910228739 A CN200910228739 A CN 200910228739A CN 101789765 A CN101789765 A CN 101789765A
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Abstract
The invention relates to a low power consumption high efficiency operational amplifier circuit, comprising a differential amplifying unit, a common source amplifying unit, a source following unit and a compensation unit; and the operating method thereof includes: signal acquisition, signal amplifying, outputting following source, signal outputting after signal comparison and negative high driving power realizing. The invention has the advantages that: (1) source following output and common-source amplification are combined together, thus improving bidirectional driving power of output; (2) output terminal is provided with a high power consumption current source, thus reducing static power consumption; (3) driving power is high, and output voltage swing is wide; and (4) circuit structure is simple and practicability is strong.
Description
(1) technical field:
The present invention relates to a kind of operation amplifier circuit, especially a kind of low power consumption high efficiency operational amplifier circuit and method of work thereof.
(2) background technology:
In general operational amplifier, seek out higher driving power, just need to improve quiescent dissipation, there is certain tradeoff in the two; Forward drive as normally used Class A output amplifier is very capable, but a little less than the negative sense driving, has only the negative sense of raising quiescent bias current, could improve its negative sense driving force, and this has just increased power consumption.
(3) summary of the invention:
The objective of the invention is to design a kind of low power consumption high efficiency operational amplifier circuit and method of work thereof, it can overcome the deficiencies in the prior art, on the basis that keeps low-power consumption, realizes higher driving efficient, and the output voltage swing of broad.
Technical scheme of the present invention: a kind of low power consumption high efficiency operational amplifier circuit, comprise input signal VP terminal, input signal VN terminal, supply voltage vdd terminal, output voltage VO UT terminal, it is characterized in that it comprises that difference amplifying unit, common source amplifying unit, source are with unit and compensating unit; Wherein, the input of said difference amplifying unit connects input signal VP terminal, input signal VN terminal, supply voltage vdd terminal and ground, and its output is connected with the input and the compensating unit of unit with input, the source of common source amplifying unit respectively; The input of said common source amplifying unit connects supply voltage vdd terminal and ground, and its output is connected with the input of source with the unit; Said source connects supply voltage vdd terminal and ground with the input of unit, and its output connects output voltage VO UT terminal; One end of said compensating unit is connected with the output of difference amplifying unit, and the other end is connected with the output of source with the unit.
Above-mentioned said difference amplifying unit manages M1, PMOS pipe M2, NMOS pipe M3, NMOS pipe M4 by PMOS and current source I1 constitutes; Wherein, the input of said current source I1 is connected with supply voltage vdd terminal, and its output is connected with the source electrode of PMOS pipe M1 and the source electrode of PMOS pipe M2; The grid of said PMOS pipe M1 is connected with input signal VN terminal, and its drain electrode is connected its source ground with the grid of drain electrode, grid and the NMOS pipe M4 of NMOS pipe M3; The grid of said PMOS pipe M2 is connected with input signal VP terminal, and its drain electrode is connected its source ground with drain electrode, the input of common source amplifying unit, the source of NMOS pipe M4 with the input and the compensating unit of unit.
Above-mentioned said common source amplifying unit is made of NMOS pipe M5 and current source I2; Wherein, the input of current source I2 is connected with supply voltage vdd terminal, and its output is connected with the input of source with the unit with the drain electrode of NMOS pipe M5; The grid of said NMOS pipe M5 is connected its source ground with drain electrode, the source of the drain electrode of PMOS pipe M2, NMOS pipe M4 with compensating unit with the input of unit.
Above-mentioned said source is made of NMOS pipe M6 and NMOS pipe M7 with the unit; Wherein, the drain electrode of said NMOS pipe M6 is connected with supply voltage vdd terminal, and its grid is connected with the output of current source I2 and the drain electrode of NMOS pipe M5, and its source electrode is connected with drain electrode, output voltage VO UT terminal and the compensating unit of NMOS pipe M7; Said NMOS pipe M7 grid is connected its source ground with the drain electrode of PMOS pipe M2, the drain electrode of NMOS pipe M4, grid and the compensating unit of NMOS pipe M5.
Above-mentioned said compensating unit is made of capacitor C 1; And an end of capacitor C 1 is connected with the drain electrode of PMOS pipe M2, the drain electrode of NMOS pipe M4, grid and the NMOS pipe M7 grid of NMOS pipe M5, and its other end then is connected with the source electrode of NMOS pipe M6, drain electrode and the output voltage VO UT terminal of NMOS pipe M7.
A kind of low power consumption high efficiency operational amplifier circuit is characterized in that it can be applied to drive load high-power, the wide amplitude of oscillation.
A kind of low power consumption high efficiency operational amplifier circuit is characterized in that it goes for buffer, amplifier circuit.
A kind of method of work of low power consumption high efficiency operational amplifier circuit is characterized in that it may further comprise the steps:
1. input signal terminal VP, VN gather differential input voltage signal to be amplified, and PMOS pipe M1, the M2 of process difference amplifying unit carry out difference and amplify, and NMOS pipe M3 and M4 constitute current mirror load, and the double-end signal after the difference amplification is become single-ended signal output; Current source I1 provides bias current for the difference amplifying unit;
2. the common source amplifying unit carries out second level amplification with the output signal of difference amplifying unit, and this level adopts common source structure for amplifying, with the load of electric current source I2 as the common source amplification;
3. the source is carried out with output with the unit with the output signal of common source amplifying unit in the source, improves output forward drive ability, and NMOS pipe M7 is used for improving the driving force of output negative sense as common-source amplifier;
4. when input signal VP was higher than VN, the output of difference amplifying unit reduced, and caused the output of common source amplifying unit to raise, VOUT is drawn high with the unit through the source then, thus the high driving ability of realization forward; When input signal VP was lower than VN, the output of difference amplifying unit raise, and caused the output of common source amplifying unit to reduce, the NMOS pipe M6 grid of source with the unit dragged down, and M6 ends, because the M7 grid voltage raises, thereby VOUT is dragged down, realized the high driving ability of negative sense.
Superiority of the present invention: 1. the source is combined with output and common source amplification, improved the bi-directional drive ability of output; 2. output does not have big static current of lcd source, thereby has reduced quiescent dissipation; 3. driving power is big, and output voltage swing is wide; 4. circuit constitutes simple, practical.
(4) description of drawings:
Fig. 1 is that (wherein, Fig. 1-a is common Class A output discharge circuit structure chart for the common Class A output discharge circuit figure of prior art; Fig. 1-b is the circuit diagram of discharge circuit when using as the beneficial buffer of 5 multiplications; Fig. 1-c is the result curve of common Class A output discharge circuit when using as the beneficial buffer of 5 multiplications).
(wherein, Fig. 2-a is the circuit structure diagram of low power consumption high efficiency amplifier to Fig. 2 for the circuit diagram of the related a kind of low power consumption high efficiency operational amplifier circuit of the present invention; Fig. 2-b is the result curve of circuit of the present invention when using as the beneficial buffer of 5 multiplications).
(5) embodiment:
Embodiment: a kind of low power consumption high efficiency operational amplifier circuit (is seen Fig. 2-a), comprise input signal VP terminal, input signal VN terminal, supply voltage vdd terminal, output voltage VO UT terminal, it is characterized in that it comprises that difference amplifying unit, common source amplifying unit, source are with unit and compensating unit; Wherein, the input of said difference amplifying unit connects input signal VP terminal, input signal VN terminal, supply voltage vdd terminal and ground, and its output is connected with the input and the compensating unit of unit with input, the source of common source amplifying unit respectively; The input of said common source amplifying unit connects supply voltage vdd terminal and ground, and its output is connected with the input of source with the unit; Said source connects supply voltage vdd terminal and ground with the input of unit, and its output connects output voltage VO UT terminal; One end of said compensating unit is connected with the output of difference amplifying unit, and the other end is connected with the output of source with the unit.
Above-mentioned said difference amplifying unit (sees that Fig. 2-a) is made of PMOS pipe M1, PMOS pipe M2, NMOS pipe M3, NMOS pipe M4 and current source I1; Wherein, the input of said current source I1 is connected with supply voltage vdd terminal, and its output is connected with the source electrode of PMOS pipe M1 and the source electrode of PMOS pipe M2; The grid of said PMOS pipe M1 is connected with input signal VN terminal, and its drain electrode is connected its source ground with the grid of drain electrode, grid and the NMOS pipe M4 of NMOS pipe M3; The grid of said PMOS pipe M2 is connected with input signal VP terminal, and its drain electrode is connected its source ground with drain electrode, the input of common source amplifying unit, the source of NMOS pipe M4 with the input and the compensating unit of unit.
Above-mentioned said common source amplifying unit (sees that Fig. 2-a) is made of NMOS pipe M5 and current source I2; Wherein, the input of current source I2 is connected with supply voltage vdd terminal, and its output is connected with the input of source with the unit with the drain electrode of NMOS pipe M5; The grid of said NMOS pipe M5 is connected its source ground with drain electrode, the source of the drain electrode of PMOS pipe M2, NMOS pipe M4 with compensating unit with the input of unit.
Above-mentioned said source (sees that Fig. 2-a) manages M7 by NMOS pipe M6 with NMOS and constitutes with the unit; Wherein, the drain electrode of said NMOS pipe M6 is connected with supply voltage vdd terminal, and its grid is connected with the output of current source I2 and the drain electrode of NMOS pipe M5, and its source electrode is connected with drain electrode, output voltage VO UT terminal and the compensating unit of NMOS pipe M7; Said NMOS pipe M7 grid is connected its source ground with the drain electrode of PMOS pipe M2, the drain electrode of NMOS pipe M4, grid and the compensating unit of NMOS pipe M5.
Above-mentioned said compensating unit (is seen Fig. 2-a) be made of capacitor C 1; And an end of capacitor C 1 is connected with the drain electrode of PMOS pipe M2, the drain electrode of NMOS pipe M4, grid and the NMOS pipe M7 grid of NMOS pipe M5, and its other end then is connected with the source electrode of NMOS pipe M6, drain electrode and the output voltage VO UT terminal of NMOS pipe M7.
A kind of low power consumption high efficiency operational amplifier circuit is characterized in that it can be applied to drive load high-power, the wide amplitude of oscillation.
A kind of low power consumption high efficiency operational amplifier circuit is characterized in that it goes for buffer, amplifier circuit.
A kind of method of work of low power consumption high efficiency operational amplifier circuit is characterized in that it may further comprise the steps:
1. input signal terminal VP, VN gather differential input voltage signal to be amplified, and PMOS pipe M1, the M2 of process difference amplifying unit carry out difference and amplify, and NMOS pipe M3 and M4 constitute current mirror load, and the double-end signal after the difference amplification is become single-ended signal output; Current source I1 provides bias current for the difference amplifying unit;
2. the common source amplifying unit carries out second level amplification with the output signal of difference amplifying unit, and this level adopts common source structure for amplifying, with the load of electric current source I2 as the common source amplification;
3. the source is carried out with output with the unit with the output signal of common source amplifying unit in the source, improves output forward drive ability, and NMOS pipe M7 is used for improving the driving force of output negative sense as common-source amplifier;
4. when input signal VP was higher than VN, the output of difference amplifying unit reduced, and caused the output of common source amplifying unit to raise, VOUT is drawn high with the unit through the source then, thus the high driving ability of realization forward; When input signal VP was lower than VN, the output of difference amplifying unit raise, and caused the output of common source amplifying unit to reduce, the NMOS pipe M6 grid of source with the unit dragged down, and M6 ends, because the M7 grid voltage raises, thereby VOUT is dragged down, realized the high driving ability of negative sense.
Below with reference to accompanying drawings the present invention is described in further details:
As can be seen, when input signal Vpulse rose, output voltage VO UT can stablize and amplify 5 times by Fig. 1-c " result curve of common Class A output discharge circuit when using as the beneficial buffer of 5 multiplications ", and overshoot and distortion are all very little; When Vpulse descended, VOUT descended very slow, and had big overshoot.This is because output amplifier in Class A can only provide unidirectional Low ESR output, and negative sense (is seen Fig. 1-realize that a) wanting so also is Low ESR, must increase current sink I3, has caused the increase of quiescent dissipation downwards by current sink I3.
And after using circuit of the present invention, result curve is shown in Fig. 2-b, and VOUT all can stablize and amplify 5 times when the Vpulse rise and fall, and following feature is fine.This is (to see and Fig. 2-a) replace the current sink I3 of common Class A output amplifier (see that Fig. 1-a), when Vpulse descended, M7 was operated in the common source magnifying state, its grid step voltage raises, thereby provides high current drive capability for the source leakage because amplify the M7 pipe with common source; When Vpulse rose, output drove by M6, was equal to Class A output; When static state, M7 is equal to the current sink I3 of Class A output amplifier, has lower power consumption.
Claims (8)
1. low power consumption high efficiency operational amplifier circuit, comprise input signal VP terminal, input signal VN terminal, supply voltage vdd terminal, output voltage VO UT terminal, it is characterized in that it comprises that difference amplifying unit, common source amplifying unit, source are with unit and compensating unit; Wherein, the input of said difference amplifying unit connects input signal VP terminal, input signal VN terminal, supply voltage vdd terminal and ground, and its output is connected with the input and the compensating unit of unit with input, the source of common source amplifying unit respectively; The input of said common source amplifying unit connects supply voltage vdd terminal and ground, and its output is connected with the input of source with the unit; Said source connects supply voltage vdd terminal and ground with the input of unit, and its output connects output voltage VO UT terminal; One end of said compensating unit is connected with the output of difference amplifying unit, and the other end is connected with the output of source with the unit.
2. according to a kind of low power consumption high efficiency operational amplifier circuit described in the claim 1, it is characterized in that said difference amplifying unit is managed M1, PMOS pipe M2, NMOS pipe M3, NMOS pipe M4 by PMOS and current source I1 constitutes; Wherein, the input of said current source I1 is connected with supply voltage vdd terminal, and its output is connected with the source electrode of PMOS pipe M1 and the source electrode of PMOS pipe M2; The grid of said PMOS pipe M1 is connected with input signal VN terminal, and its drain electrode is connected its source ground with the grid of drain electrode, grid and the NMOS pipe M4 of NMOS pipe M3; The grid of said PMOS pipe M2 is connected with input signal VP terminal, and its drain electrode is connected its source ground with drain electrode, the input of common source amplifying unit, the source of NMOS pipe M4 with the input and the compensating unit of unit.
3. according to a kind of low power consumption high efficiency operational amplifier circuit described in the claim 1, it is characterized in that said common source amplifying unit is made of NMOS pipe M5 and current source I2; Wherein, the input of current source I2 is connected with supply voltage vdd terminal, and its output is connected with the input of source with the unit with the drain electrode of NMOS pipe M5; The grid of said NMOS pipe M5 is connected its source ground with drain electrode, the source of the drain electrode of PMOS pipe M2, NMOS pipe M4 with compensating unit with the input of unit.
4. according to a kind of low power consumption high efficiency operational amplifier circuit described in the claim 1, it is characterized in that said source is made of NMOS pipe M6 and NMOS pipe M7 with the unit; Wherein, the drain electrode of said NMOS pipe M6 is connected with supply voltage vdd terminal, and its grid is connected with the output of current source I2 and the drain electrode of NMOS pipe M5, and its source electrode is connected with drain electrode, output voltage VO UT terminal and the compensating unit of NMOS pipe M7; Said NMOS pipe M7 grid is connected its source ground with the drain electrode of PMOS pipe M2, the drain electrode of NMOS pipe M4, grid and the compensating unit of NMOS pipe M5.
5. according to a kind of low power consumption high efficiency operational amplifier circuit described in the claim 1, it is characterized in that said compensating unit is made of capacitor C 1; And an end of capacitor C 1 is connected with the drain electrode of PMOS pipe M2, the drain electrode of NMOS pipe M4, grid and the NMOS pipe M7 grid of NMOS pipe M5, and its other end then is connected with the source electrode of NMOS pipe M6, drain electrode and the output voltage VO UT terminal of NMOS pipe M7.
6. according to a kind of low power consumption high efficiency operational amplifier circuit described in the claim 1, it is characterized in that it can be applied to drive load high-power, the wide amplitude of oscillation.
7. according to a kind of low power consumption high efficiency operational amplifier circuit described in the claim 1, it is characterized in that it goes for buffer, amplifier circuit.
8. the method for work of a low power consumption high efficiency operational amplifier circuit is characterized in that it may further comprise the steps:
1. input signal terminal VP, VN gather differential input voltage signal to be amplified, and PMOS pipe M1, the M2 of process difference amplifying unit carry out difference and amplify, and NMOS pipe M3 and M4 constitute current mirror load, and the double-end signal after the difference amplification is become single-ended signal output; Current source I1 provides bias current for the difference amplifying unit;
2. the common source amplifying unit carries out second level amplification with the output signal of difference amplifying unit, and this level adopts common source structure for amplifying, with the load of electric current source I2 as the common source amplification;
3. the source is carried out with output with the unit with the output signal of common source amplifying unit in the source, improves output forward drive ability, and NMOS pipe M7 is used for improving the driving force of output negative sense as common-source amplifier;
4. when input signal VP was higher than VN, the output of difference amplifying unit reduced, and caused the output of common source amplifying unit to raise, VOUT is drawn high with the unit through the source then, thus the high driving ability of realization forward; When input signal VP was lower than VN, the output of difference amplifying unit raise, and caused the output of common source amplifying unit to reduce, the NMOS pipe M6 grid of source with the unit dragged down, and M6 ends, because the M7 grid voltage raises, thereby VOUT is dragged down, realized the high driving ability of negative sense.
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| CN200910228739A CN101789765A (en) | 2009-11-25 | 2009-11-25 | Low power consumption high efficiency operational amplifier circuit and operating method thereof |
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| CN200910228739A CN101789765A (en) | 2009-11-25 | 2009-11-25 | Low power consumption high efficiency operational amplifier circuit and operating method thereof |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102176186A (en) * | 2011-03-18 | 2011-09-07 | 北京大学 | Current mirror evaluation dynamic circuit |
| CN102832895A (en) * | 2012-09-05 | 2012-12-19 | 苏州硅智源微电子有限公司 | High-precision operational amplifier adopting data sampling |
| CN103326710A (en) * | 2013-05-30 | 2013-09-25 | 湘潭芯力特电子科技有限公司 | CMOS buffer circuit for driving high capacitive load |
| CN105141305A (en) * | 2015-09-11 | 2015-12-09 | 英特格灵芯片(天津)有限公司 | Level conversion method and device |
| CN110289820A (en) * | 2019-07-25 | 2019-09-27 | 唐太平 | A kind of operation amplifier circuit |
| CN110289820B (en) * | 2019-07-25 | 2024-06-11 | 唐太平 | Operational amplifier circuit |
-
2009
- 2009-11-25 CN CN200910228739A patent/CN101789765A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102176186A (en) * | 2011-03-18 | 2011-09-07 | 北京大学 | Current mirror evaluation dynamic circuit |
| CN102832895A (en) * | 2012-09-05 | 2012-12-19 | 苏州硅智源微电子有限公司 | High-precision operational amplifier adopting data sampling |
| CN103326710A (en) * | 2013-05-30 | 2013-09-25 | 湘潭芯力特电子科技有限公司 | CMOS buffer circuit for driving high capacitive load |
| CN105141305A (en) * | 2015-09-11 | 2015-12-09 | 英特格灵芯片(天津)有限公司 | Level conversion method and device |
| CN105141305B (en) * | 2015-09-11 | 2018-06-15 | 英特格灵芯片(天津)有限公司 | A kind of method and device of level conversion |
| CN110289820A (en) * | 2019-07-25 | 2019-09-27 | 唐太平 | A kind of operation amplifier circuit |
| CN110289820B (en) * | 2019-07-25 | 2024-06-11 | 唐太平 | Operational amplifier circuit |
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Application publication date: 20100728 |