CN101765911A - 具有重新分布层的半导体芯片 - Google Patents

具有重新分布层的半导体芯片 Download PDF

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Publication number
CN101765911A
CN101765911A CN200880022454A CN200880022454A CN101765911A CN 101765911 A CN101765911 A CN 101765911A CN 200880022454 A CN200880022454 A CN 200880022454A CN 200880022454 A CN200880022454 A CN 200880022454A CN 101765911 A CN101765911 A CN 101765911A
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Prior art keywords
semiconductor chip
adhesive layer
chip
pattern
semiconductor
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CN200880022454A
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CN101765911B (zh
Inventor
廖建科
邱进添
张简荣杰
俞志明
赫姆·塔基亚
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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SanDisk Corp
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Priority claimed from US11/769,927 external-priority patent/US7772047B2/en
Priority claimed from US11/769,937 external-priority patent/US7763980B2/en
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Publication of CN101765911A publication Critical patent/CN101765911A/zh
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Abstract

公开了一种具有重新分布层的半导体器件、以及形成其的方法。在晶片上制造半导体芯片之后，将带组件施加到该晶片的表面上，与该晶片上的每个半导体芯片的表面接触。带组件包括作为基础层的背磨带、以及粘合至该背磨带的膜组件。该膜组件转而包括上面沉积了一薄层的传导材料的粘合膜。使用例如激光器将重新分布层图案描绘到带组件中。此后，可以去除带组件的未加热部分，将加热的重新分布层图案留在每个半导体芯片上。

Description

具有重新分布层的半导体芯片
技术领域
本发明的实施例涉及一种用于半导体器件的重新分布层、以及形成其的方法。
背景技术
对于便携式消费电子产品的需求的强烈增长正在驱使对于高容量存储设备的需求。诸如，闪存存储卡的非易失性半导体存储设备正变得被广泛使用以满足对数字信息存储和交换的不断增长的需求。它们的便携性、多功能性和坚固的设计、以及它们的高可靠性和大容量已经一起使得这样的存储设备理想地用于广泛种类的电子设备中，包括例如，数字照相机、数字音乐播放器、游戏机、PDA和移动电话。
虽然已知广泛种类的封装结构，但是通常可以将闪存存储卡制造为系统级封装(SiP)或多芯片模块(MCM)，其中，在小尺寸器件封装衬底(substrate)上安装并互联多个芯片(die)。该衬底通常可以包括具有蚀刻在一侧或两侧上的传导层的刚性绝缘基底(base)。在芯片与传导层之间形成电气连接，并且传导层提供电引线结构，用于将芯片连接至主设备。一旦形成芯片与衬底之间的电气连接，则随后典型地将组件(assembly)装入模塑化合物中，以提供保护性的封装。
图1中示出了传统的半导体封装20(没有模塑化合物)的顶视图。典型的封装包括附着于衬底26的诸如芯片22和24的多个半导体芯片。在芯片制造过程期间，可以在半导体芯片22、24上形成多个芯片焊垫(bond pad)28。类似地，可以在衬底26上形成多个触垫(contact pad)30。芯片22可以附着于衬底26，并且随后可以在芯片22上安装芯片24。随后通过将焊线(wirebond)32附着在相应的芯片焊垫28与触垫30对之间，将两个芯片电耦接至衬底。
半导体封装内的空间是非常宝贵的。通常半导体芯片形成有沿着两相邻边的焊垫，诸如图1中的芯片24上所示的。然而，由于相当的空间限制，可以在衬底上仅存在沿着芯片的一个边缘的用于焊线连接的空间。因此，在图1中，沿着衬底26的边缘34不存在用于与芯片焊垫28a连接的触垫。
一种处理此情形的已知方法是通过使用在半导体芯片上形成的重新分布层。在制造了半导体芯片、并从晶片(wafer)分割(singulate)之后，芯片可以经受如下过程：在芯片的顶面上形成导电迹线和焊垫(图1的迹线38和焊垫40)。一旦形成，则可以用绝缘体覆盖迹线38和焊垫28a，仅留下新形成的芯片焊垫40暴露着。迹线38将现有芯片焊垫28a与新形成的芯片焊垫40连接，以有效地将芯片焊垫重新部署至具有至衬底的管脚输出连接的芯片的边缘。可以在衬底上形成附加的触垫30，以允许在衬底与焊垫28a之间的电气连接。如现有技术图1中所示，可以与余下的触垫30顺列地形成附加的触垫30。或者，在存在可用空间的地方，附加触垫30可以与余下的触垫交错，如现有技术图2中所示的。
当前的光刻法、以及用于在半导体芯片上形成重新分布层的其它方法是不方便的，对制造过程增加了大量的处理步骤和花费。因此，存在对用于形成重新分布层的精简处理的需要。
发明内容
本发明的实施例涉及具有重新分布层的半导体器件、以及形成该半导体器件的方法。在一个实施例中，在晶片上制造了半导体芯片之后，将带组件(tape assembly)施加到晶片的表面上，与晶片上的每个半导体芯片的表面接触。带组件包括作为基础层的背磨(backgrind)带、以及附着于背磨带的膜组件(film assembly)。膜组件转而包括粘合膜，在粘合膜上沉积了一薄层的传导材料。
将带组件施加至晶片的表面，使得膜组件的粘合层与晶片的表面相接触。当施加至晶片时，所述粘合剂是半固化状态粘合剂，其附着至晶片，但是其是柔软的，并且可以被去除。
在将带组件施加至半导体晶片的表面之后，集中的热量(例如来自激光器)被施加到带组件与晶片之间的界面。激光器被编程用以将其能量集中在粘合层与半导体晶片表面之间的界面。在沿着被施加了激光的界面的位置，将粘合层加热并凝固至半导体晶片的表面，以便沿着施加了热量的激光器描绘的路径，永久地附着于半导体晶片。
计算机控制激光器的路径，以便在每个半导体芯片上描绘出要在每个半导体芯片上定义的重新分布层的图案。通过选择性地将热量集中在带组件与晶片之间的界面，可以沿着窄的且清晰定义的路径，将带组件的粘合层熔合至每个半导体芯片的表面。由集中的热量定义的路径的任一侧上的粘合层保持在半固化状态，或者未凝固，并且可以将其从晶片的表面剥离，同时，已经被熔合的那些区域保持在晶片表面上。从而，当将带组件被从晶片拉开时，膜组件的加热区域从膜组件的未加热区域脱离，并且膜组件的加热区域被留在每个半导体芯片的表面上，以定义每个半导体芯片上的重新分布层图案。
附图说明
图1是传统半导体封装的顶视图，该传统半导体封装包括具有用以将芯片焊垫从芯片第一边缘重新分布至其第二边缘的重新分布层的半导体芯片。
图2是传统半导体封装的顶视图，该传统半导体封装包括具有如图1中的重新分布层的芯片，该重新分布层具有可替换的衬底触垫布置。
图3是根据本发明实施例的由来自一卷带的带组件覆盖的半导体晶片的透视图。
图4是根据本发明实施例的被放置在半导体晶片的半导体芯片之上的带组件的侧视图。
图5是根据本发明实施例的包括粘合层和传导材料的膜组件的侧视图。
图6是附着于半导体晶片的半导体芯片、并且还包括将分布图案描绘到带组件的表面中的激光器的带组件的侧视图。
图7是半导体芯片的顶视图，其中带组件被置于其上，并且用激光器将重新分布层图案照射到带组件中。
图8是从半导体晶片去除的带组件的侧视图，其中留下由激光器描绘的重新分布层图案。
图9示出从晶片分割的多个半导体芯片。
图10是包括根据本发明实施例形成的重新分布层的分割芯片的顶视图。
图11是从新的带组件分离半导体芯片的可替换方法的侧视图。
图12是包括具有根据本发明实施例形成的重新分布层的半导体芯片的半导体封装的剖面侧视图。
具体实施方式
现在将参考图3至图12来描述本发明的实施例，它们涉及用于半导体器件的多个芯片重新分布层、以及形成其的方法。应理解，本发明可以以多个不同形式来实现，而不应当将其解释为限于这里提出的实施例。更确切地，提供这些实施例，使得此公开将是彻底且完全的，并且将充分地将本发明传达给本领域的技术人员。实际上，本发明意在涵盖这些实施例的改变、修改和等同物，它们包括在由所附权利要求定义的本发明的范围和精神内。此外，在下面对本发明的详细描述中，提出了许多具体细节，以便提供对本发明的全面理解。然而，本领域的技术人员将清楚，可以在不包括这样的具体细节的情况下实践本发明。
现在参考图3，示出了包括多个半导体芯片102(在图3中仅对它们中的一些进行了编号)的半导体晶片100的顶视图。已经对晶片100上的每个半导体芯片102进行了处理，以包括如本领域中已知的能够执行指定电子功能的集成电路。虽然在可替换的实施例中，预期不同的芯片会具有不同的集成电路，但是，晶片100上的所有半导体芯片102都可具有相同的集成电路。如本领域中已知的，可以在晶片制造期间测试各个集成电路，以识别缺陷的或损坏的芯片。
当完成晶片制造测试时，通常，每个芯片102将被分割为单独的芯片，并且此后被装配到半导体封装中。然而，根据本发明的实施例，每个半导体芯片可以具有在其上形成的重新分布层，如下面说明的。图3还示出了卷104，其包括带组件106，用于在晶片100的相应芯片102上形成重新分布层。带组件106可以具有足以施加在晶片100的整个表面上的宽度，如图3所示。或者，预期带组件106具有足以覆盖晶片100上的单行半导体芯片102、或两行或多行半导体芯片102的宽度。
参考图4的侧视图，带组件106包括被附着了膜组件110的聚酰亚胺带108，其被称作背磨带，如本领域中已知的。如图5中所示，膜组件110包括粘合层116，其上沉积了传导材料114。粘合材料116可以是多种已知的电绝缘粘合膜中的任何一种，诸如，从日本的Nitto Denko公司、加利福尼亚的Abel Stick公司或加利福尼亚的Henkel公司可得到的电绝缘粘合膜。例如，粘合材料116可以是可凝固的半固化状态粘合剂，其在被施加至晶片100之前、以及在凝固之前是粘的且柔软的。
传导材料114可以是多种电导体，诸如，铝、钛或它们的合金。可以通过包括例如溅镀、电镀、丝网印刷、光刻处理或多种其它沉积处理的多种已知方法，将传导材料114施加至粘合层116的表面。这些处理允许传导材料114被施加以非常小的厚度，诸如在1和5微米之间，并且更具体地，在1和3微米之间。应理解，在本发明的可替换的实施例中，粘合层116上的传导材料114的厚度可以小于1微米、以及大于5微米。
一旦形成膜组件110，将膜组件施加至背磨带108，以形成带组件106。带108还可以具有粘合表面，用于将膜组件110的传导材料114粘合至背磨带108。如图3、4和6中所见，将带组件106施加到半导体晶片100上，使得将带组件106的粘合层116施加到晶片100上的半导体芯片102的表面。在将粘合层116施加至半导体晶片100的状态下，粘合层116是粘的，并且附着于晶片100的表面。然而，粘合层116还未凝固，并且在此阶段中，可以从晶片100的表面拉开粘合层116。
在实施例中，在将带组件106施加至晶片之后，可以在背磨处理中使背磨带108变薄，以使带组件106变薄。在可替换的实施例中，可以省略背磨处理。
现在参考图6的侧视图，在将带组件106施加到半导体晶片100的表面之后，将集中的热量施加到带组件106与晶片100之间的界面(并且特别地是，粘合层116与晶片100的表面之间的界面)。在实施例中，可以通过多种激光器120中之一来施加此集中的热量，所述多种激光器120包括例如CO2激光器、UV激光器、YBO4激光器、氩激光器等。这些激光器例如通过德国汉堡的Rofin-Sinar技术公司制造。对激光器进行编程，以将其能量集中在粘合层116与半导体晶片100的表面之间的界面。在沿着施加了激光的界面的位置，将粘合层116加热并凝固至半导体晶片的表面，以便沿着由激光描绘的、施加了热量的路径，永久附着于半导体晶片。
计算机控制激光的路径，以便在每个半导体芯片102上描绘出要在每个半导体芯片102上定义的重新分布层的图案。例如，如图7中所示，可期望将沿着半导体芯片102的顶边缘的第一对芯片焊垫124重新分布至沿着半导体芯片102的相邻边缘的一对芯片焊垫126。因此，激光器120将在带组件106上描绘出包括路径130和132的重新分布层图案，如图7中的虚线中所示。应理解，路径130和132是仅作为示例的，并且可以由激光器120描绘出广泛种类的重新分布层图案，以将芯片焊垫从每个半导体芯片102上的第一位置重新分布至每个半导体芯片102上的第二位置。虽然图6中示出单个激光器120，但是应理解，可以使用多个激光器120，以同时在多个半导体芯片上描绘出重新分布层。
通过选择性地将热量集中在带组件106与晶片100之间的界面(例如通过激光器120)，可以沿着窄的且清晰定义的路径，将带组件106的粘合层116熔合至每个半导体芯片102的表面。值得注意地，由集中的热量定义的路径的任一侧上的粘合层116保持在半固化状态(b-stage)，或者相反未凝固，并且可以从晶片100的表面剥离(如图8中所示)，同时，已经熔合的那些区域保持在晶片表面上。
在未由激光器120加热的带组件106的那些区域中，膜组件110与带组件106的背磨带108之间的引力超过膜组件110与半导体晶片100的表面之间的引力。因此，当剥离背磨带108时，膜组件110的未加热区域被从带组件106拉开。相反地，对于由激光器加热的那些区域，膜组件110与半导体晶片100的表面之间的引力超过膜组件110与带108之间的引力。因此，如图8中所示，当从晶片100拉开带组件106时，膜组件110的加热区域从膜组件的未加热区域脱离，并且膜组件的加热区域被留在每个半导体芯片102的表面上，以定义每个半导体芯片102上的重新分布层图案136。
现在参考图9和图10，在从半导体晶片100去除带组件106的未凝固部分之后，将晶片100分割为单独的半导体芯片102，其每一个包括由热量源定义的重新分布层图案136。图10是包括重新分布层图案136的分割的半导体芯片102的顶视图，重新分布层图案136用于将在芯片顶部的芯片焊垫124重新分布至沿着芯片的相邻边缘的芯片焊垫126。在实施例中，半导体芯片的表面上的粘合层116是电绝缘体。因此，接下来执行将传导材料114电耦接至芯片焊垫124和126的进一步的步骤。已知多种处理用于将重新分布层图案136的传导材料电耦接至芯片焊垫124和126。在将图案电耦接至芯片焊垫124和126之后，可以在半导体芯片102的表面上形成钝化层，如已知的，用以覆盖所暴露的重新分布层图案136、以及任选地，芯片焊垫124。芯片焊垫126保持暴露着。
图11图示了用于在芯片102上形成重新分布层的可替换的方法。将带组件106施加至晶片100，并且诸如激光器的热量源在每个半导体芯片102上描绘出重新分布层图案136，如上所述。然而，在图11中所示的实施例中，在施加带组件106之前或之后的某些点，半导体晶片100被翻转(flip over)，并且由硅片夹等上的带组件106支撑。根据图11的实施例，分割(singlate)芯片102，同时仍然与带组件106接触。此后，诸如拾取和放置机器人的自动设备140抓住(grip)每个半导体芯片102的背面，并且将相应的芯片102从带组件106拉开。如上所述，当自动设备140将分割的芯片102从带组件106拉开时，膜组件110上已经被加热并熔合至相应的半导体芯片102的表面的那些区域从背磨带脱离，并且归于半导体芯片102。膜组件110的未加热部分保持在硅片夹上的带组件106上。
应理解，使用上述重新分布层处理步骤，通过在晶片级形成的跨越芯片的重新分布层，可以在半导体芯片102上，将一个或多个芯片焊垫从任何第一位置重新分布至任何第二位置。现在参考图12，在完成上述步骤时，可以在衬底160上安装芯片102。芯片102可以是衬底160上安装的唯一的芯片，或者，安装芯片102可以与一个或多个附加芯片162和无源元件164一起被安装在衬底160上，如图12中所示。此后，可以在已知焊线处理中，使用焊线166，将芯片102以及任何其它芯片上的芯片焊垫用焊线连接至衬底160上的触垫。在实施例中，芯片与衬底一起可以用作闪存设备170，其中，芯片102可以是诸如ASIC的控制器、或闪存芯片。在可替换的实施例中，芯片102可以不同于控制器或闪存芯片，并且在可替换的实施例中，芯片与衬底一起可以不同于闪存设备。在闪存设备170是便携式存储设备的实施例中，还可以在衬底160上提供触脚168，用于在设备170与插入了设备170的主设备之间交换信号。
如本发明的背景技术中说明的，在一些封装结构中，仅沿着半导体芯片的单个边缘存在用于管脚输出位置的空间。施加至半导体芯片102的重新分布层有效地将芯片102的表面上的焊垫重新分布至它们可以容易地结合至衬底160的位置。图12中所示的半导体芯片102、半导体芯片162和衬底160的相对长度和相对宽度仅为示例，并且可以在本发明的可替换的实施例中广泛改变。
如图12中所示，在根据上述实施例形成堆叠的芯片结构之后，可以将各个半导体封装装入模塑化合物168内，以形成完成的半导体芯片封装170。模塑化合物168可以是已知的环氧物，诸如，从Sumitomo公司和Nitto Denko公司可得到，这两个公司均在日本设有总部。图12中所示的封装170可以是完成的便携式存储卡。或者，封装170可以被放入盖子内，以形成完成的便携式存储卡。
为了说明和解释的目的，已经给出了对本发明的前述详细描述。其非意在穷尽的，或者将本发明限于所公开的精确形式。根据上面的教示，许多修改和变化是可能的。选择所描述的实施例，以便最好地说明本发明的原理和其实际应用，从而使本领域的技术人员能最好地利用各个实施例中的本发明、以及具有适于期望的特定使用的各种修改的本发明。意在由这里所附的权利要求来定义本发明的范围。

Claims (17)

1.一种从半导体晶片制造半导体封装的方法，所述半导体封装包括具有重新分布层的半导体芯片，所述方法包括步骤：
(a)在所述半导体晶片的至少部分上应用带组件，所述带组件包括带、粘合层、以及施加到所述粘合层的传导材料，所述粘合层位于邻近所述半导体晶片；
(b)以定义在所述半导体芯片的芯片焊垫的第一位置与要重新分布芯片焊垫的第二位置之间的路径的图案，将所述粘合层的部分粘合至所述半导体晶片上的所述半导体芯片的表面；以及
(c)去除所述带组件的部分，留下粘合到所述半导体晶片的、在所述步骤(b)中定义的粘合层的图案、以及施加至在所述步骤(b)中定义的粘合层的图案的传导材料。
2.如权利要求1所述的方法，其中，将所述粘合层的部分粘合至所述半导体芯片的表面的所述步骤(b)包括步骤：沿着定义所述第一位置与第二位置之间的路径的图案，加热所述粘合层与所述半导体芯片的表面之间的界面。
3.如权利要求2所述的方法，其中，沿着定义所述第一位置与第二位置之间的路径的图案加热所述粘合层与所述半导体芯片的表面之间的界面的所述步骤包括用激光器加热所述界面的步骤。
4.如权利要求1所述的方法，其中，去除所述带组件的部分的所述步骤(c)包括拉开带的步骤。
5.如权利要求4所述的方法，其中，去除所述带组件的部分的所述步骤(c)还包括步骤：随着所述带，拉开未在所述步骤(b)中粘合至半导体芯片的表面的传导材料和粘合层的部分。
6.如权利要求1所述的方法，其中，去除所述带组件的部分的所述步骤(c)包括步骤：将在所述步骤(b)中粘合至半导体芯片的表面的粘合层的部分从在所述步骤(b)中未粘合至半导体芯片的表面的粘合层的部分分开。
7.如权利要求1所述的方法，还包括通过下列步骤形成带组件：
(d)在所述粘合层上沉积所述传导材料；以及
(e)将所述粘合层和传导材料施加至所述带。
8.如权利要求1所述的方法，还包括步骤(f)：将所述第一芯片焊垫电耦接至在所述步骤(c)中留下的所述传导材料的末端。
9.如权利要求8所述的方法，还包括步骤(g)：将在所述步骤(c)中留下的所述传导材料的第二末端电耦接至在所述第二位置的第二芯片焊垫。
10.如权利要求1所述的方法，还包括步骤(h)：在去除所述带组件的部分的所述步骤(c)之后，从所述半导体晶片分割所述半导体芯片。
11.一种半导体芯片，包括：
集成电路；以及
在所述集成电路上形成的重新分布图案，所述重新分布图案包括：
以所述重新分布图案的图案粘合至所述半导体芯片的表面的粘合材料，以及
沉积在所述粘合材料上的传导材料。
12.如权利要求11所述的半导体芯片，其中，所述传导材料是钛和铝中的至少一个。
13.如权利要求11所述的半导体芯片，其中，在所述粘合材料上，所述传导材料具有在1和5微米之间的厚度。
14.如权利要求11所述的半导体芯片，其中，在所述粘合材料上，所述传导材料具有在1和3微米之间的厚度。
15.如权利要求11所述的半导体芯片，其中，通过激光器以所述重新分布图案的图案加热所述粘合材料，以所述重新分布图案的图案将所述粘合材料粘合至所述半导体芯片的表面。
16.如权利要求11所述的半导体芯片，其中，所述集成电路是闪存电路。
17.如权利要求11所述的半导体芯片，其中，所述集成电路是用于闪存的控制器电路。
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