CN101740512A

CN101740512A - Method for removing improved silicon oxynitride

Info

Publication number: CN101740512A
Application number: CN200810179204A
Authority: CN
Inventors: 何荣; 曾令旭; 李秋德; 朱作华
Original assignee: Hejian Technology Suzhou Co Ltd
Current assignee: Hejian Technology Suzhou Co Ltd
Priority date: 2008-11-27
Filing date: 2008-11-27
Publication date: 2010-06-16

Abstract

The invention provides a method for removing improved silicon oxynitride, which comprises the following steps: 1, providing a semiconductor substrate; 2, arranging a shallow groove isolation structure on the semiconductor substrate, and dividing an active area in the semiconductor substrate; 3, depositing dielectric layers on the semiconductor substrate and removing part of dielectric layers, so that the dielectric layers are only positioned above the active area; 4, depositing polycrystalline silicon and silicon oxynitride and removing part of the polycrystalline silicon and the silicon oxynitride, so that the etched polycrystalline silicon is at least positioned on the dielectric layers; 5, depositing a layer of oxide, then removing the oxide at a flat position by etching, and maintaining the oxide at the side wall of the polycrystalline silicon; and 6, removing the silicon oxynitride. The method has the advantages that one step can be only and additionally added, and a structure similar to a side gap wall can be formed on both sides of polycrystal, so that the periphery of the polycrystal is protected effectively against the influence of the etching of SiON, and the performance of elements is improved.

Description

The method that a kind of silicon oxynitride of improvement is removed

Technical field

The present invention relates to a kind of manufacture method of semiconductor structure, particularly the method for a kind of silicon oxynitride of improvement removal.

Background technology

In semiconductor fabrication, to use the bottom antireflective coating (BARC, Bottom Anti-Reflective Coating) of silicon oxynitride (SiON) usually, to improve the precision and the uniformity of polycrystal live width as photoresist on the polycrystal.But, after carrying out multicrystal aligning and etching, because follow-up process, cobalt metal silicide (Co salicide) technology etc. for example, SiON need be removed, so method commonly used at present is after the polysilicon etching is finished, add the step that etchants such as utilizing hot phosphoric acid is together removed SiON again.As Figure 1-3, Fig. 1 represents that brand-new wafer is through shallow ditch groove separation process, well region is implanted, growth of gate oxide layer, polysilicon deposition, silicon oxynitride deposition, then with photoresistance as mask, etching is removed after part polysilicon and the SiON, but does not remove as yet as the structure before the photoresistance of mask, comprises substrate 11, active area 12, shallow ditch groove structure 13, dielectric layer 14, polysilicon layer 15, SiON layer 16, photoresist layer 17 still deposit light resistance structure on the SiON layer 16 at this moment, and the side of polysilicon layer 15 comes out.Then carry out etching and remove the step of SiON layer 16, because etchant is to the influence of the profile of the polycrystalline silicon material in the polysilicon layer 15 that exposes, neck (necking) phenomenon as shown in Figure 2 might appear after etching is finished, side at polysilicon layer 15 forms recess, as neck, down gap (under cut) phenomenon as shown in Figure 3 perhaps appears, below the side of polysilicon layer 15, form breach, make part dielectric layer 14 come out, can have influence on the performance of the device that obtains at last like this, even cause the reduction of output.

Summary of the invention

In view of the above problems, press for a kind of method at present, can in the silicon oxynitride of removing easily on the semiconductor structure, can not cause the method for damage polycrystal.

In view of above-mentioned, the invention provides a kind of method of silicon oxynitride removal of improvement, may further comprise the steps:

Step 1 provides semi-conductive substrate;

Step 2 is provided with fleet plough groove isolation structure on Semiconductor substrate, distinguish the active area in the Semiconductor substrate;

Step 3, dielectric layer and remove the part dielectric layer on Semiconductor substrate makes dielectric layer only be positioned at the active area top;

Step 4, deposit spathic silicon and silicon oxynitride and a removal part wherein, the polysilicon after the etching is positioned on the dielectric layer at least;

Step 5 deposits one deck oxide again, and after etching is removed the oxide of flat part, keeps the oxide of polysilicon sidewall;

Step 6 is removed silicon oxynitride.

Wherein, the dielectric layer in the step 3 is positioned at the active area top, but does not cover whole active areas.

Wherein, in the step 5, deposition one deck oxide is specially the low-pressure chemical vapor deposition of tetraethyl siloxanes.

Wherein, step 4 is specially: deposition one deck polysilicon, deposition one deck silicon oxynitride on polysilicon, the then photoresistance of formation patterning above silicon oxynitride, with this photoresistance is silicon oxynitride and the polysilicon that expose portion is removed in the mask etching, and the polysilicon after the etching is positioned on the dielectric layer at least.

Wherein, in the step 6, utilize hot phosphoric acid etch silicon oxynitride, the oxide that is retained in the polysilicon sidewall in this etching process not by hot phosphoric acid etch, the side of protection polysilicon.

Wherein, the thickness of silicon oxynitride is 250-350A.

Beneficial effect of the present invention is, can only add one step, can form the structure of similar side clearance walls in multicrystal both sides, thereby effectively protect multicrystal periphery not influenced by the etched of SiON, improves the performance of element.

Below in conjunction with accompanying drawing, the specific embodiment of the present invention is described in further detail.For the person of ordinary skill in the field, from detailed description of the invention, above-mentioned and other purposes of the present invention, feature and advantage will be apparent.

Description of drawings

Fig. 1 is the schematic diagram of not removing the preceding structure of SiON of one embodiment of the invention.

Fig. 2 and Fig. 3 are the structural representation of the polysilicon that damages of the appearance of a preferred embodiment of the present invention.

Fig. 4 is the schematic diagram of the deposition oxide structure afterwards of one embodiment of the invention.

Fig. 5 is the schematic diagram of the removal oxide structure afterwards of one embodiment of the invention.

Fig. 6 is the schematic diagram of the removal SiON structure afterwards of one embodiment of the invention.

Embodiment

Be described in further detail below in conjunction with the method for the drawings and specific embodiments removal SiON of the present invention.

Shown in Fig. 1,4,5,6, the method that the silicon oxynitride of a kind of improvement that the present invention proposes is removed may further comprise the steps:

At first, provide semi-conductive substrate 11, this Semiconductor substrate 11 is provided with fleet plough groove isolation structure (STI) 12, in order to distinguish the active area 13 in the Semiconductor substrate 11.This Semiconductor substrate 11 is the general Semiconductor substrate of industry, can constitute by silicon, can have multiple different structure in this Semiconductor substrate 11, for use in forming different electronic devices, for example, can be filled with oxide or other suitable materials in this fleet plough groove isolation structure, the implantation of various well regions also can be arranged, implantation has well region of various ions or the like, or the Semiconductor substrate that has two-layer polysilicon structure in the manufacture process of memory.Just can implement this method so long as have the Semiconductor substrate of SiON.

Then, dielectric layer 14 on Semiconductor substrate 11, this dielectric layer is as the barrier layer, then remove part dielectric layer 14 by modes such as etchings, make dielectric layer 14 only be positioned at active area 13 tops, just be positioned at active area 13 tops, but do not cover whole active areas 13, the edge of active area 13 exposes, and above fleet plough groove isolation structure, not having dielectric layer, the material of this dielectric layer 14 can be the SiO2 that grows through overdrying oxygen or wet oxygen mode, and the method for removing dielectric layer 14 can be dry ecthing, also can be wet etching.

Deposit one deck polysilicon 15 again, it can certainly be the polycrystal of other types, be example only with polysilicon commonly used at present, then, on polysilicon 15, deposit one deck SiON16 again, the thickness of SiON16 is 250-350A, SiON normally mode by PECVD deposits, can certainly deposit by alternate manner, LPCVD for example, then above SiON16, form the photoresistance 17 of patterning, the pattern of photoresistance 17 can be the pattern of any appropriate, as long as can make remaining position reach required shape, in this embodiment, photoresistance 17 has kept the part polysilicon 15 of STI12 top and the polysilicon 15 and the SiON16 of SiON16 and dielectric layer 14 tops; This photoresistance can be the photoresist of suitable form, for example G01 or 5315 photoresistances, then, with photoresistance 17 is that SiON16 that do not covered by photoresistance, expose portion and polysilicon 15 are removed in the mask etching, polysilicon 15 after the etching be positioned on the dielectric layer 14 and STI12 on, can certainly be positioned at other positions, only the explanation of doing to represent in scheming.

Then, deposition one deck oxide 18, the low-pressure chemical vapor deposition of tetraethyl siloxanes (LP-TEOS) for example, the about 200-300A of thickness, this layer oxide 18 covers and comprises polysilicon 15, STI12, active area 13, Zone Full on the substrate of SiON16, or desired zone, then remove the oxide of flat part by the mode of for example dry ecthing, but when deposition oxide before, because the difference of required figure, the thickness of the oxidate of sidewall can be than the oxide thickness of flat region, thereby can keep the oxide of polysilicon 15 sidewalls during etching, and is similar with the process that forms silicon nitride gap wall.

At last; remove SiON16; can select to utilize hot phosphoric acid etch SiON16; because hot phosphoric acid is etching SiON only; can etching oxide; so can not endanger the sidewall of polysilicon when removing SiON, the oxide that is retained in polysilicon 15 sidewalls in this etching process owing to, make this oxide protect the side of polysilicon 15 not by hot phosphoric acid etch.

Above method can be used for multiple processing procedure; the processing procedure of 0.13 μ m for example; can also adjust the thickness of deposition by the time of adjusting the deposition of LP-TEOS for example; both sides at polysilicon form off-spacer; profile except the protection polysilicon; also can improve the performance of element, especially the small size grid size is less than the element of 0.15um.

The above is preferred embodiment of the present invention only, is not to be used for limiting practical range of the present invention; If do not break away from the spirit and scope of the present invention, the present invention is made amendment or is equal to replacement, all should be encompassed in the middle of the protection range of claim of the present invention.

Claims

1. the method removed of the silicon oxynitride of an improvement may further comprise the steps:

Step 1 provides semi-conductive substrate;

Step 6 is removed silicon oxynitride.

2. method according to claim 1 is characterized in that the dielectric layer in the above-mentioned steps 3 is positioned at the active area top, but does not cover whole active areas.

3. method according to claim 1 is characterized in that in the step 5, and deposition one deck oxide is specially the low-pressure chemical vapor deposition of tetraethyl oxosilane.

4. method according to claim 1, it is characterized in that step 4 is specially: deposition one deck polysilicon, deposition one deck silicon oxynitride on polysilicon, then above silicon oxynitride, form the photoresistance of patterning, with this photoresistance is silicon oxynitride and the polysilicon that expose portion is removed in the mask etching, and the polysilicon after the etching is positioned on the dielectric layer at least.

5. method according to claim 1 is characterized in that in the step 6, utilizes hot phosphoric acid etch silicon oxynitride, the oxide that is retained in the polysilicon sidewall in this etching process not by hot phosphoric acid etch, the side of protection polysilicon.

6. method according to claim 1, the thickness that it is characterized in that silicon oxynitride is 250-350A.

7. method according to claim 1, the silicon dioxide of the material that it is characterized in that dielectric layer for growing through overdrying oxygen or wet oxygen mode.