KR20080081398A

KR20080081398A - Method of forming field oxide layer in semiconductor device

Info

Publication number: KR20080081398A
Application number: KR1020070021283A
Authority: KR
Inventors: 정경아
Original assignee: 주식회사 하이닉스반도체
Priority date: 2007-03-05
Filing date: 2007-03-05
Publication date: 2008-09-10

Abstract

A method for forming an isolation layer of a semiconductor device is provided to reduce damage to an isolation layer formed on a semiconductor substrate during an etch process by forming a different material from an isolation layer as a material for a mask layer for forming a trench in the isolation layer. A trench is formed in a semiconductor substrate(100) on which an insulation layer and a conductive layer(104) are stacked. An isolation layer is formed in a region where the trench is formed. A mask layer is formed on the conductive layer including the isolation layer wherein the mask layer is thinner in the center of the isolation layer than on the edge of the isolation layer. While the mask layer is removed, the isolation layer exposed together with the removal of the mask layer is eliminated to form a groove in the isolation layer. The process for forming the trench can include the following steps. An insulation layer, a conductive layer and an isolation mask layer are formed on the semiconductor substrate. The conductive layer and the insulation layer are patterned according to the pattern of the isolation mask layer, and the semiconductor substrate is partially removed.

Description

Method of forming a device isolation layer of a semiconductor device {Method of forming field oxide layer in semiconductor device}

1A to 1G are cross-sectional views illustrating a method of forming a device isolation film of a semiconductor device according to the present invention.

100 semiconductor substrate 102 first insulating film

104: conductive film 106: first mask film

108: second insulating film 110: second mask film

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a device isolation film of a semiconductor device, and more particularly to a method of forming a device isolation film of a semiconductor device for easily controlling the EFH of a device isolation film.

The semiconductor memory device includes a plurality of devices in which data is stored. An isolation layer is formed between the device and the device to separate a plurality of devices from adjacent devices. In particular, in a flash memory device, the devices are formed in a series-connected structure, and the gap between devices becomes narrower according to the increasing degree of integration.

As the gap between devices decreases, the interference increases, and in order to reduce such interference, only the inner region of the device isolation layer lowers the effective field oxide height (EFH) and the device isolation film is formed on the sidewall of the floating gate of the device. A pattern was formed to remain.

However, the turn-around time (TAT) may increase due to an increase in the process steps for implementing the above-described device isolation layer, and the lower device isolation layer may be damaged during the etching process.

The present invention can reduce the process time while easily adjusting the EFH of the device isolation layer by adjusting the EFH of the device isolation layer by forming a hard mask thinner in the center than the edge of the device isolation layer and using the hard mask.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a device isolation film of a semiconductor device, and forms trenches in a semiconductor substrate on which an insulating film and a conductive film are laminated. An isolation layer is formed in the region where the trench is formed. A mask film is formed on the conductive film including the device isolation film, but the mask film is formed thinner at the center than the edge of the device isolation film. A method of forming a device isolation layer of a semiconductor device, the method including forming a groove in the device isolation layer by removing the mask layer and simultaneously removing the device isolation layer exposed while the mask layer is removed.

In the trench formation, an insulating film, a conductive film and an element isolation mask film are formed on the semiconductor substrate. Patterning the conductive film and the insulating film according to the pattern of the device isolation mask film, and removing a portion of the semiconductor substrate.

The mask layer is formed of a material having a different etching selectivity from the device isolation layer, the mask layer is formed using a material for an anti-reflection film, and the material for the anti-reflection film is a polymer-based material.

The etching process is performed by an anisotropic dry etching process, and the groove is formed from the surface center region of the device isolation layer, and is removed to an area of 20 to 30% of the upper width of the device isolation layer.

Hereinafter, with reference to the accompanying drawings will be described a preferred embodiment of the present invention. However, the present invention is not limited to the embodiments disclosed below, but can be implemented in various forms, and only the present embodiments are intended to complete the disclosure of the present invention and to those skilled in the art. It is provided for complete information.

Referring to FIG. 1A, a first insulating film 102 for tunnel insulating film 102 and a conductive film 104 for floating gate are formed on the semiconductor substrate 100. The first insulating film 102 can be formed of an oxide film, and the conductive film 104 is preferably formed of a doped polysilicon film.

Referring to FIG. 1B, a first mask layer 106 may be formed on the conductive layer 104 to form an isolation trench. Since a region in which a cell is to be formed is defined according to the pattern of the first mask layer 106, the width of the pattern of the first mask layer 106 may be changed according to the degree of integration, and it is preferable to form the nitride layer. .

Referring to FIG. 1C, an etching process is performed according to the first mask layer 106 to pattern the conductive layer 104 and the first insulating layer 102, and a portion of the semiconductor substrate 100 is removed to form a trench. To form 100a. In this case, a portion of the first mask layer 106 may be etched or removed. The drawing shows an example in which the first mask film 106 is left.

Referring to FIG. 1D, the second insulating layer 108 is formed to completely fill the trenches 100a of FIG. 1C. The first insulating film 108 is preferably formed of an oxide film. When the first mask layer 106 is covered by the second insulating layer 108, an etching process is performed to expose the first mask layer 106. The etching process may be performed by a chemical mechanical polishing (CMP) process.

Referring to FIG. 1E, after forming an insulating layer for device isolation on the semiconductor substrate 100, a mask layer (not shown) in which only a cell region is opened for controlling effective field oxide height (EFH) is formed, and the cell region is formed. The upper portion of the device isolation layer 108 is etched to lower the height. At this time, since the first mask layer 106 (in FIG. 1D) is formed in the cell region, the conductive layer 104 is not damaged during the etching process. The etching process is performed to adjust the height of the device isolation layer 108 so that the first insulating layer 102 is not exposed. The first mask film 106 is removed to expose the conductive film 104.

Referring to FIG. 1F, a second mask film 110 is formed on the conductive film 104 and the device isolation film 108. The second mask film 110 is a mask film for forming a trench in the center A of the device isolation film 108 formed below, and may be formed of an oxide film made of a material similar to that of the device isolation film 108. Instead, a material used as a bottom anti-reflective coating (BARC) is used.

The material used as the anti-reflection film is a polymer-based material, and has a physical property different from that of the oxide-based device isolation layer 108. When the oxide-based material is used as the second mask layer 110, since the lower device isolation layer 108 is also formed of an oxide-based material, a part of the device isolation layer 108 during the etching process of the second mask layer 110 is also performed. It may be removed together to damage the device isolation layer 108. In order to prevent this, the second mask layer 110 having a different material component (eg, a component having a different etching selectivity) from the device isolation layer 108 is used.

In addition, compared to the process using the oxide film, the process time can be shortened when using the material for the anti-reflection film. For example, if the process using the oxide film takes about 4 hours, the process using the material for the anti-reflection film may take about 1 hour.

The antireflection film BARC is a film mainly used in photographic and developing processes, and is a film used to reduce diffuse reflection of a photoresist. When the second mask layer 110, which is a material for the anti-reflection film BARC, is coated on the semiconductor substrate 100, the second mask layer 110 may cover the surfaces of the conductive layer 104 and the device isolation layer 108. Formed accordingly. Since there is a step between the conductive film 104 and the device isolation film 108, the second mask film 110 is formed to be the thinnest on the inner side A of the device isolation film 108.

Referring to FIG. 1G, an etching process is performed to remove the second mask layer 110 (in FIG. 1F). At this time, the second mask layer 110 in FIG. 1F is removed from the top. Since the thickness of the second mask layer 110 (in FIG. 1F) formed on the center of the device isolation layer 108 is the lowest, the center of the device isolation layer 108 is first exposed.

The etching process is performed by an anisotropic dry etching process. In the dry etching process, the temperature in the chamber may be set to 20 ° C to 50 ° C. As the etching process continues, the exposed device isolation layer 108 begins to be removed while the second mask layer 110 of FIG. 1F is removed. The etching process is performed until all of the second mask films 110 in FIG. 1F are removed. Even when the etching process is performed until all of the second mask layers 110 (in FIG. 1F) are removed, the etching rate of the second mask layer 110 (in FIG. 1F) is faster than that of the device isolation layer 108. ) Can reduce the damage that can be. In this case, the region of the isolation layer 108 to be removed may be an area of 20 to 30% of the width of the isolation layer 108.

By using the anti-reflection film polymer instead of the oxide film as the mask film, damage of the device isolation film 108 during the etching process for forming the trench 108a in the device isolation film 108 can be reduced, and process time can be shortened.

Although the technical spirit of the present invention described above has been described in detail in a preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, the present invention will be understood by those skilled in the art that various embodiments are possible within the scope of the technical idea of the present invention.

The present invention uses a material that is not similar to the device isolation layer as a material for forming a trench in the device isolation layer, thereby reducing the damage of the device isolation layer formed on the semiconductor substrate during the etching process, thereby preventing a step difference. Can improve the process time.

Claims

Forming a trench in the semiconductor substrate on which the insulating film and the conductive film are stacked;

Forming an isolation layer in the region where the trench is formed;

Forming a mask layer on the conductive layer including the device isolation layer, but forming the mask layer thinner at the center than the edge of the device isolation layer; And

And removing the mask layer and simultaneously removing the device isolation layer exposed while the mask layer is removed to form a groove in the device isolation layer.

The method of claim 1, wherein the forming of the trench comprises:

Forming an insulating film, a conductive film, and an element isolation mask film on the semiconductor substrate; And

Patterning the conductive film and the insulating film according to a pattern of the device isolation mask film, and removing a portion of the semiconductor substrate.

The method of claim 1,

And the mask layer is formed of a material having an etching selectivity different from that of the device isolation layer.

The method of claim 1,

And forming the mask layer using a material for anti-reflection film.

The method of claim 4, wherein

The anti-reflection film material is a method of forming a device isolation layer of a semiconductor device using a polymer-based material.

The method of claim 1,

The etching process is a device isolation film forming method of a semiconductor device performed by the anisotropic dry etching process.

The method of claim 1,

And the groove is formed from a surface center region of the device isolation layer.

The method of claim 7, wherein

And the groove is removed to a width of 20 to 30% of the upper width of the device isolation layer.