CN101661913A - 晶片级封装结构、封装结构及其制程 - Google Patents

晶片级封装结构、封装结构及其制程 Download PDF

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CN101661913A
CN101661913A CN200910165378A CN200910165378A CN101661913A CN 101661913 A CN101661913 A CN 101661913A CN 200910165378 A CN200910165378 A CN 200910165378A CN 200910165378 A CN200910165378 A CN 200910165378A CN 101661913 A CN101661913 A CN 101661913A
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wafer
radiator
base board
substrate
board unit
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伯恩·卡尔·厄佩尔特
布莱福特·丁·法克特
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Advanced Semiconductor Engineering Inc
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Advanced Semiconductor Engineering Inc
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Abstract

本发明公开了一种晶片级封装结构、封装结构及其制程。利用与基板相容且彼此相连的散热器单元所构成的阵列，可简化封装制程，且在切单之后可得导热性质良好的多个封装单元或多个晶片级封装。

Description

晶片级封装结构、封装结构及其制程
技术领域
本发明涉及一种晶片封装结构、封装结构及其制程，且特别是有关于一种晶片级封装结构及其制作方法。
背景技术
随着晶片体积缩小、电子元件的运行速度增加以及封装密度增加，半导体封装所产生的热能大幅增加。为增进封装结构的散热能力，一般都是采用一散热片或是一散热器来协助晶片散热。
以现有的球格状阵列封装(ball grid array，BGA)结构为例，一散热器配置于晶片上，并通过一粘性材料粘着至基板。然而，将散热器一对一地配置于晶片上既费时又费力。
为符合不同封装结构的特性需求，已发展出多种不同的封装技术，其中一种发展良好的封装技术为晶片级封装(chip scale package，CSP)技术。前述晶片级封装技术可降低封装结构的尺寸，使其仅略微大于原本的晶片尺寸。并且，由于晶片级封装结构相当紧密，因此散热问题又更加重要。
发明内容
本发明提出一种具有散热器阵列的封装结构，其利用由晶片上彼此相连的散热器单元所构成的一阵列或一网状物来协助封装结构散热。
本发明另提出一种封装制程，以制作散热性质良好的晶片级封装结构。利用散热器阵列，可简化封装制程中散热器的设置与贴附，并可使其较不费力。再者，本发明的封装制程与现有的封装制程和/或封装设备相容。
本发明提出一种晶片级封装结构包括一基板单元、一晶片、一散热器、一封装胶体以及至少一焊球。基板单元具有一安装面与一背面。晶片安装于基板单元的安装面上。散热器配置于晶片上，且一接合膜配置于散热器与晶片之间，其中散热器具有一本体部、一延伸部与一倾斜部，本体部位于晶片顶部并贴附至晶片，延伸部贴附至基板单元，倾斜部连接本体部与延伸部。封装胶体覆盖散热器，并填充于散热器、晶片与基板单元之间，其中散热器的延伸部的一端暴露于封装胶体外，且封装胶体的一侧壁与基板单元的一侧壁切齐。焊球配置于基板单元的背面。
在本发明的一实施例中，晶片通过配置于晶片与基板单元之间的多个凸块电性连接至基板单元。
在本发明的一实施例中，晶片级封装结构还包括一底胶，其配置于晶片与基板单元之间，并包覆凸块。
在本发明的一实施例中，散热器的本体部的一顶面暴露于封装胶体外。
在本发明的一实施例中，散热器的本体部通过配置于其与晶片之间的一接合膜贴覆至晶片。
在本发明的一实施例中，接合膜包括一导线上薄膜(film-over-wire，FOW)。
在本发明的一实施例中，封装胶体还包括导热填充物。
本发明提出一种封装制程如下所述。首先，提供一基板，其中基板包括多个基板单元。接着，安装多个晶片至基板的基板单元，其中每一基板单元安装有至少一晶片。然后，设置并贴附一散热器阵列至晶片上，并使散热器阵列位于基板上，其中散热器阵列包括多个彼此相连的散热器单元，每一散热器单元对应一晶片。之后，在基板上形成一封装胶体，以覆盖散热器阵列、晶片与基板单元。接着，在基板的一背面形成多个焊球。然后，切割封装胶体、散热器阵列与基板以形成多个封装单元，其中各封装单元包括一部份的封装胶体、一散热器单元、一晶片、一基板单元与一焊球。
在本发明的一实施例中，设置并贴附散热器阵列的步骤还包括在散热器阵列的一内表面上形成一接合膜。
本发明提出一种封装结构包括一基板、多个晶片、一散热器阵列、一封装胶体以及多个焊球。基板具有多个基板单元。各基板单元安装有至少一晶片。散热器阵列配置于基板上并覆盖晶片，其中散热器阵列包括多个彼此相连的散热器单元，各散热器单元对应一晶片，各散热器单元具有一本体部、一延伸部与一倾斜部，本体部位于晶片顶部并贴附至晶片，延伸部贴附至基板单元，倾斜部连接本体部与延伸部。封装胶体覆盖基板与散热器阵列，并填充于散热器阵列、晶片与基板之间。焊球配置于基板的一背面。
综上所述，由于本发明采用散热器阵列，故本发明可通过较为简易的步骤，提升封装结构的散热功效。此外，可使封装结构的可靠度与产品良率增加。
为让本发明的上述和其他特征和优点能更明显易懂，下文特举实施例，并配合附图，作详细说明如下。
附图说明
图1A为本发明一实施例的封装结构的俯视图。
图1B为本发明一实施例的散热器阵列的局部示意图。
图2A～2E为本发明一实施例的晶片级封装制程的剖面图。
图2F为本发明一实施例的切单后的晶片级封装结构的剖面图。
图2G为本发明另一实施例的切单后的晶片级封装结构的剖面图。
主要元件符号说明：
10：封装结构             15：封装单元
100：基板                101：区块
102：基板单元            102a、150a：侧壁
104：接点                110：晶片
112：主动面              114：背面
120：凸块                122：底胶
126：焊料或粘着剂        130：接合膜
140：散热器阵列          140a：内表面
142：散热器单元          142a、146a：本体部
142b：分支               144：散热器结构
144b：顶面或外表面       146：散热器单元
146b：倾斜部             146c：延伸部
147：末端                150：封装胶体
160：导线                170：焊球
具体实施方式
下列所述的较佳实施例是以晶片级封装技术为例，但并非用以限定本发明的范围。除了晶片级封装技术之外，晶圆级晶片尺寸封装(wafer-level chip scale package，WLCSP)技术、球格状阵列封装技术或面阵列覆晶技术(area-array flip chip technology)皆可用以制作本发明的封装结构。此外，在适合的情况下，可应用单晶片封装、堆迭式晶片封装以及平面型的多晶片封装(planar multi-chip package，planar MCM)等晶片级封装技术制作本发明的封装结构。
图1A为本发明一实施例的封装结构的俯视图。图1B为本发明一实施例的散热器阵列的局部示意图。图2A～2E为本发明一实施例的晶片级封装制程的剖面图。请参照图1A，基板100具有多个区块101，各区块101包括多个基板单元102，且各区块101上安装多个晶片110。虚线代表切割线，切割工具可沿前述切割线分割基板单元102。安装的晶片110可通过打线接合技术或覆晶技术电性连接至基板100。在本实施例中，晶片110一对一地安装到基板单元102上。此外，当欲形成堆迭晶片封装或多晶片封装时，可在单一基板单元102上安装多个晶片110。
图2A为图1A中单一基板单元102的剖面图的一个例子。如图2A所示，晶片110安装于基板100的基板单元102上。基板100例如是一多层线路板，且此多层线路板的最外层具有多个接点104。为简化起见，未绘示覆盖与接点104相连的迹线(trace)的防焊保护层。同样地，迹线/接点104通常是配置于基板100上，而非埋在基板100内(如图2A所示)。接点104可依实际的应用与设计需求而以不同的方式配置于基板100的晶片接合区上。各晶片110具有一主动面112与相对于主动面112的一背面114。多个形成在主动面112上的凸块120位置对应于基板100的晶片安装区域内的接点104，如此，则晶片110可通过凸块120电性连接至基板100。
如图2A所示，为降低因晶片110与基板100之间热膨胀系数不同而对晶片110与基板100所造成的损害，可在晶片110与基板100之间选择性地填入一底胶122。然而，由于底胶122有溢流的问题存在，因此可跳过填入底胶122的步骤。
请同时参照图1B与图2B，一散热器阵列140配置于晶片110上，且一接合膜130配置于散热器阵列140与晶片110之间。举例来说，如图1B所示，散热器阵列140包括多个散热器单元142，其彼此相连而形成一网状物。请参照图1B，各散热器单元142包括一本体部142a以及与本体部142a连接的多个分支142b，散热器单元142通过分支142b彼此相连。也就是说，各散热器单元142的分支142b连接至邻近的散热器单元142。散热器阵列140的材质例如为铜、镍、镍铜及其合金或是其他适合的金属。在另一方面，陶瓷型的散热器阵列140的材质例如为碳化硅(silicon carbide，SiC)或是其他高导热性质的陶瓷材料。本体部142a的形状例如为圆形、方形、三角形、矩形或多边形，分支142b的数目不限于四、六或八，而可为任何大于一的整数。散热器单元142和/或本体部142a的尺寸或图案可依封装结构10的设计需求而调整，而本体部142a与分支142b的面积比可调整或定做，以达到封装结构10所需的散热系数。
当散热器阵列140配置于晶片110上，各散热器单元142对应一晶片110，散热器单元142的本体部142a经由接合膜130粘着至晶片110的背面114。较佳地，在将散热器阵列140配置于晶片110上之前，接合膜130配置于散热器阵列140的一内表面140a上，或者是配置于晶片110的背面114上。接合膜130例如为一膜状粘着剂或是一导线上薄膜(film-over-wire，FOW)型的晶片连结膜。
请同时参照图1B与图2C，进行一模锻制程(stamping process)，以将平板状的散热器阵列140压成一沉置(down-set)的散热器结构144，并形成多个立体的散热器单元146，其覆盖晶片110与基板100的部分接点104。平板状的散热器单元142抵压住晶片110，且本体部146a仍为平板状，分支142b则是被向下弯折而成为立体散热器单元146中的一倾斜部146b与一延伸部146c。倾斜部146b位于本体部146a与延伸部146c之间，且延伸部146c配置于基板100上。在一回焊制程(reflowprocess)或一固化制程(curing process)之后，沉置的散热器结构144例如通过焊料或粘着剂126贴附至基板100。在模锻制程之前，焊料或粘着剂126可事先配置于基板100上或是散热器阵列140上。因此，沉置的散热器结构144导热性地连接至基板单元102。选择性地，沉置的散热器结构144可通过一个或多个接点104电性连接与导热性连接至基板单元102，以提供接地或是屏蔽的功效。
请参照图2D，进行一封胶制程，以在基板100的顶面上形成一封装胶体150，其覆盖沉置的散热器结构144与其下的晶片110以及基板100的顶面。若是省略填入底胶122此一选择性步骤，封装胶体150可覆盖凸块120以及基板100的接点104，此即所谓的单一封胶技术(mold-onlyapproach)。较佳地，沉置的散热器结构144的主体部146a的顶面或外表面144b暴露于该封装胶体150之外，以提升散热效果。封装胶体150可为一聚合树脂(polymeric resin)。此外，导热填充物例如是氮化铝颗粒、氧化铝颗粒、氮化硼颗粒、纳米碳管或是其他导热性质良好的填充物质，前述导热填充物皆可添入封装胶体150中以提升散热效率。
请参照图2E，在形成焊球170之后，例如沿着切割线(虚线)切割封装结构10，以将封装结构10切单成多个独立的封装单元15(如图2F所示)。各封装单元15包括至少一基板单元102、一晶片110、一立体的散热器单元146与部分的封装胶体150。
图2F为本发明一实施例的切单后的晶片级封装结构的剖面图。请参照图2F，在封装单元15中，立体的散热器单元146配置于基板单元102上并覆盖晶片110。本体部146a通过接合膜130粘着至晶片110，且本体部146a的顶面或外表面144b暴露于封装胶体150外。埋在封装胶体150中的倾斜部146b连接本体部146a与延伸部146c。封装胶体150覆盖配置于基板单元102的顶面上的延伸部146c，但封装胶体150的侧壁150a暴露出延伸部146c的末端147。当切割基板100、散热器结构144与封装胶体150而形成独立的封装单元15时，封装胶体150的侧壁150a与基板单元102的侧壁102a切齐且共平面。
图2G为本发明另一实施例的切单后的晶片级封装结构的剖面图。当封装单元15如图2G所示(其与图2F的封装单元15相似)，晶片110可直接配置于基板单元102上，并通过导线160电性连接至基板单元102。在图2G的封装单元15中，接合膜130配置于晶片110的主动面112上，接合膜130例如是导线上薄膜(film-over-wire，FOW)等晶片结合膜。因为导线上薄膜的材质适于流动并包覆连接晶片110的导线160，故接合膜130的位置与尺寸较有弹性而不会妨碍导线160的配置。
相较于配置个别的散热器的制程效率差且费时，配置/贴附本发明的相互连接的散热器阵列较为简易，且散热器阵列的用法相容于已知的封装制程。此外，相互连接的散热器阵列可设计为相容于已知的封装制程的构件，故可具有较高的成本效益。
由于采用厚度均匀且具有适当的流动性的接合膜，因此，不需在封胶之前另外使用粘着剂固定散热器，进而增加良率与产量。接合膜可使散热器阵列与覆晶封装结构中个别的晶片之间保持一控制良好的间距。在打线接合的封装结构中，接合膜可在晶片上流动而不会妨碍导线，并可填入散热器与晶片之间的空隙。因此，可有效地增加本发明的封装结构的可靠性。此外，可添加导热填充物于封装胶体和/或接合膜中，以提升封装结构的散热功效。
最后应说明的是：以上实施例仅用以说明本发明的技术方案，而非对其限制；尽管参照前述实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例技术方案的精神和范围。

Claims (10)

1、一种晶片级封装结构，包括：
一基板单元，具有一安装面与一背面；
一晶片，安装于该基板单元的该安装面上；
一散热器，配置于该晶片上，且一接合膜配置于该散热器与该晶片之间，其中散热器具有一本体部、一延伸部与一倾斜部，该本体部位于该晶片顶部并贴附至该晶片，该延伸部贴附至该基板单元，该倾斜部连接该本体部与该延伸部；
一封装胶体，覆盖该散热器，并填充于该散热器、该晶片与该基板单元之间，其中该散热器的该延伸部的一端暴露于该封装胶体外，且该封装胶体的一侧壁与该基板单元的一侧壁切齐；以及
至少一焊球，配置于该基板单元的该背面。
2、根据权利要求1所述的晶片级封装结构，其中该晶片通过配置于该晶片与该基板单元之间的多个凸块电性连接至该基板单元。
3、根据权利要求2所述的晶片级封装结构，还包括：
一底胶，配置于该晶片与该基板单元之间，并包覆所述多个凸块。
4、根据权利要求2所述的晶片级封装结构，其中该散热器的该本体部的一顶面暴露于该封装胶体外。
5、根据权利要求1所述的晶片级封装结构，其中该散热器的该本体部通过配置于该本体部与该晶片之间的一接合膜贴覆至该晶片。
6、根据权利要求5所述的晶片级封装结构，其中该接合膜包括一导线上薄膜。
7、根据权利要求1所述的晶片级封装结构，其中该封装胶体还包括导热填充物。
8、一种封装制程，包括：
提供一基板，其中该基板包括多个基板单元；
安装多个晶片至该基板的所述多个基板单元，其中每一基板单元安装有至少一晶片；
设置并贴附一散热器阵列至所述多个晶片上，并使该散热器阵列位于该基板上，其中该散热器阵列包括多个彼此相连的散热器单元，每一散热器单元对应一晶片；
在该基板上形成一封装胶体，以覆盖该散热器阵列、所述多个晶片与所述多个基板单元；
在该基板的一背面形成多个焊球；以及
切割该封装胶体、该散热器阵列与该基板以形成多个封装单元，其中各封装单元包括一部份的该封装胶体、一散热器单元、一晶片、一基板单元与一焊球。
9、根据权利要求8所述的封装制程，其中设置并贴附该散热器阵列的步骤还包括：
在该散热器阵列的一内表面上形成一接合膜。
10、一种封装结构，包括：
一基板，具有多个基板单元；
多个晶片，其中各基板单元安装有至少一晶片；
一散热器阵列，配置于该基板上并覆盖所述多个晶片，其中该散热器阵列包括多个彼此相连的散热器单元，各散热器单元对应一晶片，各散热器单元具有一本体部、一延伸部与一倾斜部，该本体部位于该晶片顶部并贴附至该晶片，该延伸部贴附至该基板单元，该倾斜部连接该本体部与该延伸部；
一封装胶体，覆盖该基板与该散热器阵列，并填充于该散热器阵列、所述多个晶片与该基板之间；以及
多个焊球，配置于该基板的一背面。
CN200910165378A 2008-08-27 2009-08-07 晶片级封装结构、封装结构及其制程 Pending CN101661913A (zh)

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