CN101515755B - High-pressure level shift circuit with low power consumption - Google Patents
High-pressure level shift circuit with low power consumption Download PDFInfo
- Publication number
- CN101515755B CN101515755B CN200810057882XA CN200810057882A CN101515755B CN 101515755 B CN101515755 B CN 101515755B CN 200810057882X A CN200810057882X A CN 200810057882XA CN 200810057882 A CN200810057882 A CN 200810057882A CN 101515755 B CN101515755 B CN 101515755B
- Authority
- CN
- China
- Prior art keywords
- voltage
- grid
- drain electrode
- connects
- node
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
The invention discloses a level shift circuit. The circuit consists of a first voltage switching stage (1), a second voltage switching stage (2) and a high-voltage output stage (3). The first voltage switching stage (1) and the second voltage switching stage (2) supply grid driving signals capable of being randomly adjusted according to the application to output-stage PMOS and NMOS transistors, so that the high-voltage output stage (3) can supply higher voltage and higher current for a load. The level shift circuit has higher switching speed, lower static power consumption, and smaller area. The level shift circuit can be applied to high-voltage driving chips for driving an electric motor, displaying a lithographic plate, driving a printer and the like, particularly applied to a high-low voltage compatible process with continually shrunk characteristic dimension and applied to high voltage and high current.
Description
Technical field
The present invention is the level shift circuit of a kind of high-low pressure conversion, is mainly used in the power chip low voltage level and is converted to high voltage level and drives the high pressure output stage and provide high pressure and big electric current for load.During work, low pressure is generally operational in 5V following (comprising 5V), and high pressure can be from 5V to 100V, even higher, and the output stage transistor area is very little, and conversion speed is very fast, but quiescent dissipation is very low.
Background technology
Along with the develop rapidly of semicon industry, the application of all kinds of power integrated chips constantly enlarges, for example control of alternating current machine, and the drive circuit of flat-panel monitor etc., these chip for driving all need level shift circuit.
CMOS high pressure output stage is made up of a high voltage PMOS and nmos pass transistor.The PMOS tube source grade connects power supply, NMOS tube source grade ground connection, and the drain electrode of PMOS and NMOS pipe is connected together and drives load as output stage, and when the PMOS pipe was opened, NMOS managed shutoff, for output provides high voltage.On the contrary, when the NMOS pipe was opened, PMOS managed shutoff, for output provides low-voltage.The opening and closing of PMOS and NMOS are by the high drive voltage control on their grid, general structure such as Fig. 1, directly add low-voltage control signal on the grid of NMOS pipe, what add on the grid of PMOS pipe is the scope that produced by the level shift circuit control signal from 0 to VPP (high voltage).
And there are a lot of problems in above-mentioned this structure: at first, owing to directly add low-voltage control signal on the grid of output stage NMOS pipe, make that the gate source voltage of NMOS pipe is very low, and the threshold value of high voltage transistor generally is higher than common low-voltage tube, so when the NMOS pipe is opened, need very big breadth length ratio could produce big output current.Secondly, the voltage owing to control signal on the gate pmos is that this just needs the PMOS pipe can bear whole high voltages from 0 to VPP variation, and in the high-low pressure compatible technology, along with constantly diminishing of process, the continuous attenuation of gate oxide thickness makes the PMOS pipe be difficult to satisfy the requirement of reliability.
The invention provides a kind of level shift circuit structure, the sort circuit structure can well satisfy the requirement of reliability, can reduce the breadth length ratio of output stage transistor simultaneously greatly, and conversion speed is very fast, quiescent dissipation is very low, needing to be particularly suitable for the occasion of high voltage and big drive current.
Summary of the invention
(1) technical problem that will solve
In view of this, main purpose of the present invention is to provide a kind of level shift circuit, to satisfy the requirement of reliability, reduces the breadth length ratio of output stage transistor under the situation that guarantees same output stage drive current, improves conversion speed, reduces quiescent dissipation.
(2) technical scheme
For achieving the above object, the invention provides a kind of level shift circuit, this circuit is made of the first voltage transitions level 1, the second voltage transitions level 2 and high pressure output stage 3; Wherein:
The first voltage transitions level 1 is made of four high voltage transistor HVP11, HVP12, HVN11, HVN12 and two diode D11, D12; The source electrode of HVP11 connects power supply, and drain electrode connects the grid of HVP12 and is connected together as the HV11 node with the N utmost point of D11; The source electrode of HVP12 connects power supply, and drain electrode connects the grid of HVP11 and is connected together as the HV12 node with the N utmost point of D12; The source ground of HVN11 and HVN12, drain electrode connects the P utmost point of D11 and D12 respectively, and grid meets low-voltage control signal LV1, LV2 respectively;
The second voltage transitions level (2) is made of four high voltage transistor HVP21, HVP22, HVN21, HVN22 and two diode D21 and D22; The N utmost point of diode D21 and D22 is met power supply VPP, the P utmost point connects the source electrode of high-voltage tube HVP21, HVP22 respectively, the drain electrode of HVP21 and HVP22 is linked to each other with the drain electrode of HVN21 and HVN22 respectively, as voltage node HV21 and HV22, HVP21 links to each other with the drain electrode of HVP22 and HVP21 respectively with the HVP22 grid, the source ground of HVN21 and HVN22, drain electrode connects the drain electrode of HVP21 and HVP22 respectively, and grid meets low-voltage control signal LV3, LV4 respectively.
Preferably, the output signal of described HV12 node is used for the grid-control system signal of the PMOS pipe of high pressure output stage 3, and described low-voltage control signal LV1 produces low-voltage control signal LV2 by a reverser, and this reverser is made of two low-voltage tube M1-1 and M1-2.
Preferably, the described first voltage transitions level 1 further comprises 6 high-voltage tube HVP13, HVP14, HVP15, HVP16, HVN13 and HVN14, wherein, HVP13 and HVP14 be the grid leak short circuit respectively, the source electrode of HVP13 meets power supply VPP, and drain electrode connects the source electrode of HVP14 and links to each other with node HV11, and the drain electrode of HVP14 connects the drain electrode of HVN13, the source ground of HVN13, grid connect the grid of HVN11; HVP15 and HVP16 be the grid leak short circuit respectively, and the source electrode of HVP15 meets power supply VPP, and drain electrode connects the source electrode of HVP16 and links to each other with node HV12, and the drain electrode of HVP16 connects the drain electrode of HVN14, and the source ground of HVN14, grid connect the grid of HVN12.
Preferably, the output signal of described HV22 node is used for the grid-control system signal of the NMOS pipe of high pressure output stage 3, and described low-voltage control signal LV3 produces low-voltage control signal LV4 by a reverser, and this reverser is made of two low-voltage tube M2-1 and M2-2.
Preferably, the described second voltage transitions level 2 further comprises 6 high-voltage tube HVP23, HVP24, HVP25, HVP26, HVN23 and HVN24, wherein, HVP23 and HVP24 be the grid leak short circuit respectively, the source electrode of HVP23 meets power supply VPP, drain electrode connects the source electrode of HVP24 and links to each other with node HV21, the drain electrode of HVP24 connects the drain electrode of HVN21, and the source ground of HVN21, grid connect the grid of HVN22, HVP25 and HVP26 be the grid leak short circuit respectively, the source electrode of HVP25 meets power supply VPP, and drain electrode connects the source electrode of HVP26 and links to each other with node HV22, and the drain electrode of HVP26 connects the drain electrode of HVN24, the source ground of HVN24, grid connect the grid of HVN21.
(3) beneficial effect
1, this level shift circuit provided by the invention has good reliability, and area is little, and conversion speed is fast, and the characteristics that quiescent dissipation is low are applicable to the high-voltage power chip.
2, this level shift circuit provided by the invention all adopts the CMOS technology, compatibility standard low voltage CMOS technology easily, and also it is fast to have switching speed, advantage low in energy consumption.
3, this level shift circuit provided by the invention, the grid-control system signal of output stage NMOS pipe is produced by the second voltage transitions level 2, can produce the control signal of voltage from 0 to VHV22, VHV22 can be for from 0 to VPP free voltage, therefore can produce the drive current identical with less area for output stage NMOS pipe provides the driving voltage that is higher than low-tension supply voltage with traditional structure.
4, this level shift circuit provided by the invention, the grid-control system signal of output stage PMOS pipe is produced by the first voltage transitions level 1, can produce the control signal of voltage from VHV12 to VPP, VHV12 can be for from 0 to VPP free voltage, therefore can fine solution high-low pressure compatible technology in along with size reduces the integrity problem that brought.
5, this level shift circuit provided by the invention by the number of adjusting diode and the size of high-voltage tube, can well be fit to the requirement of various technologies and driving voltage.
6, this level shift circuit provided by the invention can provide very big transient current when the state exchange for the transistor of output stage, realizes conversion fast.
7, this level shift circuit provided by the invention, the quiescent dissipation of entire circuit is very low.
8, this level shift circuit provided by the invention goes for the technology of operating voltage from tens volts to several hectovolts, and in the undersized high-low pressure compatible technology.
Description of drawings
Fig. 1 is present general level shift circuit figure;
Fig. 2 is the circuit diagram of first kind of level shift circuit provided by the invention;
Fig. 3 is the circuit diagram of second kind of level shift circuit provided by the invention;
Fig. 4 is the circuit diagram of the level shift circuit that provides according to first embodiment of the invention;
Fig. 5 is the circuit diagram of the level shift circuit that provides according to second embodiment of the invention.
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.
As shown in Figure 2, Fig. 2 is the circuit diagram of first kind of level shift circuit provided by the invention, and this circuit is made of the first voltage transitions level 1, the second voltage transitions level 2 and high pressure output stage 3.
Wherein, the first voltage transitions level 1 is made of four high voltage transistor HVP11, HVP12, HVN11, HVN12 and two diode D11, D12; The source electrode of HVP11 connects power supply, and drain electrode connects the grid of HVP12 and is connected together as the HV11 node with the N utmost point of D11; The source electrode of HVP12 connects power supply, and drain electrode connects the grid of HVP11 and is connected together as the HV12 node with the N utmost point of D12, and the output signal of HV12 node is used for the grid-control system signal of the PMOS pipe of high pressure output stage 3; The source ground of HVN11 and HVN12, drain electrode connects the P utmost point of D11 and D12 respectively, and grid meets low-voltage control signal LV1, LV2 respectively.Low-voltage control signal LV1 produces low-voltage control signal LV2 by a reverser, and this reverser is made of two low-voltage tube M1-1 and M1-2.
The function of this circuit is: when LV1 becomes high level by low level, HVN11 manages unlatching, the HVN12 pipe is closed, because HV11 is VPP to the voltage on ground, greater than the reverse breakdown voltage of diode D11, diode reverse breakdown, the HV11 point voltage begins to reduce, and makes HVP12 open, and the HV12 point voltage raises, HVP11 is closed, so HVP12 draws high VPP with the HV12 point voltage; When LV1 becomes low pressure at ordinary times by high level, HVN12 manages unlatching, the HVN11 pipe is closed, the HV12 point is VPP to the voltage on ground, be far longer than the reverse breakdown voltage of diode D12, diode D12 reverse breakdown, the HV12 point voltage begins to reduce, and when this point voltage drops to when HVP11 is opened, makes the HV11 point voltage raise, thereby HVP12 is closed, can rapidly drag down HV12 because the reverse breakdown current of diode is very big this moment, when the HV12 point voltage drops to reverse breakdown voltage near D12, the electric current of diode diminishes rapidly, so the HV12 point voltage is stabilized in VHV12 (VHV12 is the driving voltage of designed high-voltage tube HVP3) gradually.
This circuit can provide controlled VHV12 the drive signal to VPP for the grid of HVP3 in the high pressure output stage 3, therefore as long as the withstand voltage VPMAX of HVP3 largest gate is poor greater than VPP and VHV12, can satisfy reliability requirement, simultaneously because the diode reverse breakdown electric current is very big, and when the voltage of node HV12 rises near diode reverse breakdown voltage, electric current reduces rapidly, therefore can realize very fast conversion speed, and quiescent dissipation is very little simultaneously.
The second voltage transitions level 2 is made of four high voltage transistor HVP21, HVP22, HVN21, HVN22 and two diode D21 and D22; The N utmost point of diode D21 and D22 is met VPP, the P utmost point connects the source electrode of high-voltage tube HVP21, HVP22 respectively, the drain electrode of HVP21 and HVP22 is linked to each other with the drain electrode of HVN21 and HVN22 respectively, as voltage node HV21 and HV22, HVP21 links to each other with the drain electrode of HVP22 and HVP21 respectively with the HVP22 grid, the source ground of HVN21 and HVN22, drain electrode connects the drain electrode of HVP21 and HVP22 respectively, grid meets low-voltage control signal LV3, LV4 respectively, and the output signal of HV22 node is used for the grid-control system signal of the NMOS pipe of high pressure output stage 3.Low-voltage control signal LV3 produces low-voltage control signal LV4 by a reverser, and this reverser is made of two low-voltage tube M2-1 and M2-2.
The function of this circuit is: when LV3 became low level by high level, HVN22 managed unlatching, and the HVN21 pipe is closed, and the HV22 point voltage begins to reduce, and made HVP21 open, and the HV21 point voltage raises, and HVP22 is closed, so HVN22 is pulled down to 0 with the HV22 point voltage; When LV3 becomes high-voltage flat by low level, HVN21 manages unlatching, the HVN22 pipe is closed, the HV21 point voltage begins to reduce, when the HV21 point voltage drops to when HVP22 is opened, the HV22 point voltage raises, make HVP21 close, thereby HVN21 can drag down the HV21 point voltage fast, the HVP22 complete opening, and this moment is because diode D22 reverse breakdown current is very big, the HV22 point voltage begins to raise rapidly, when the HV22 point voltage was elevated to reverse breakdown voltage near D22, the electric current of diode diminished rapidly, so the HV22 point voltage is stabilized in VHV22 (VHV22 is the driving voltage of designed high-voltage tube HVP3) gradually.
The second voltage transitions level 2 can provide scope from 0 to VHV22 control signal for HVN3 grid level in the high pressure output stage 3, so the withstand voltage VNMAX of the largest gate of HVN3 is as long as poor greater than VHV22 and 0 just can be satisfied reliability requirement.
Circuit structure of the present invention, can be used for various high-pressure process, the operating voltage that is used for various VPP, in different technology, according to the VPP operating voltage, the largest gate of high pressure NMOS pipe and high voltage PMOS pipe is withstand voltage, and the difference of the reverse breakdown voltage of diode, can be by the mode of series diode, for output stage NMOS pipe produces 0 to VHV22 control voltage, for the PMOS pipe produces the control voltage of VHV12 to VPP, here voltage difference (VHV22-0) and (VPP-VHV12) can be a times (with the situation of a diode) of diode reverse breakdown voltage, perhaps twice (with the positive and negative situations that are in series and use of two diodes), or several times (with the situation of the positive and negative use that is in series of several diodes).
Simultaneously on the basis of foregoing circuit structure, can make voltage difference (VHV22-0) by following method and (VPP-VHV12) arrive in the scope of VPP adjustablely arbitrarily 0, can satisfy various technologies and circuit requirement.
As shown in Figure 3, Fig. 3 is the circuit diagram of second kind of level shift circuit provided by the invention.In the structure of the first voltage transitions level 1,6 high-voltage tube HVP13, HVP14, HVP15, HVP16, HVN13 and HVN14 have further been increased.Wherein, HVP13 and HVP14 be the grid leak short circuit respectively, and the source electrode of HVP13 meets VPP, and drain electrode connects the source electrode of HVP14 and links to each other with node HV11, and the drain electrode of HVP14 connects the drain electrode of HVN13, and the source ground of HVN13, grid connect the grid of HVN11; HVP15 and HVP16 be the grid leak short circuit respectively, and the source electrode of HVP15 meets VPP, and drain electrode connects the source electrode of HVP16 and links to each other with node HV12, and the drain electrode of HVP16 connects the drain electrode of HVN14, and the source ground of HVN14, grid connect the grid of HVN12.
The function of this circuit is: when LV1 becomes high level from low spot is flat, HVN11 and HVN13 pipe are opened, HVN12 pipe and HVN14 pipe are closed, and owing to HV11 is VPP to the voltage on ground, are far longer than the reverse breakdown voltage of diode D11, diode reverse breakdown, the HV11 point voltage begins to reduce, and makes HVP12 open, and the HV12 point voltage raises, HVP11 is closed, and HVP12 draws high VPP with the HV12 point voltage.When LV1 becomes low pressure at ordinary times, HVN12 pipe and HVN14 pipe are opened, HVN11 pipe and HVN13 pipe are closed, the HV12 point is VPP to the voltage on ground, be far longer than the reverse breakdown voltage of diode D12, diode D12 reverse breakdown, the HV12 point voltage begins to reduce, when this point voltage drops to when HVP11 is opened, make the HV11 point voltage raise, thereby HVP12 is closed, this moment is because the reverse breakdown current of diode is very big, can rapidly HV12 be dragged down, when the HV12 point voltage drops to reverse breakdown voltage near D12, the electric current of diode diminishes rapidly, the branch road that this moment, HVP15 and HVP16 formed can continue the HV12 point voltage is dragged down, adjust to burning voltage VHV12, therefore the first voltage transitions level 1 can provide the control signal of scope from VHV12 to VPP for the grid of output stage HVP3, and VHV12 can be by adjusting the series connection quantity of diode, and the width of HVP15 (HVP13) and HVP16 (HVP14) is than (selecting the situation of same channel length for use), adjust required voltage, though when stable state, there is the passage current of HVP15 and HVP16 and HVP13 and HVP14, but because state exchange is mainly realized by diode branch fast, the branch road of HVP15 and HVP16 and HVP13 and HVP14 is mainly realized the adjustment among a small circle of voltage, thereby passage current is very little, thereby quiescent dissipation is still very low during circuit working.
The second voltage transitions level 2 also by top method, further increase by 6 high-voltage tube HVP23, HVP24, HVP25, HVP26, HVN23 and HVN24.Wherein, HVP23 and HVP24 be the grid leak short circuit respectively, and the source electrode of HVP23 meets VPP, drain electrode connects the source electrode of HVP24 and links to each other with node HV21, the drain electrode of HVP24 connects the drain electrode of HVN21, and the source ground of HVN21, grid connect the grid of HVN22, HVP25 and HVP26 be the grid leak short circuit respectively, the source electrode of HVP25 meets VPP, and drain electrode connects the source electrode of HVP26 and links to each other with node HV22, and the drain electrode of HVP26 connects the drain electrode of HVN24, the source ground of HVN24, grid connect the grid of HVN21.
The function of this circuit is: when LV3 became low level from height point is flat, HVN22 and HVN24 pipe were opened, and HVN21 and HVN23 pipe are closed, the HV22 point voltage begins to reduce, and makes HVP21 open, and the HV21 point voltage raises, HVP22 is closed, so HVN22 is pulled down to 0 with the HV22 point voltage; When LV3 becomes high-voltage flat by low level, HVN21 pipe and HVN23 pipe are opened, HVN22 pipe and HVN24 pipe are closed, the HV21 point voltage begins to reduce, when the HV21 point voltage drops to when HVP22 is opened, the HV22 point voltage raises, make HVP21 close, thereby HVN21 can drag down the HV21 point voltage fast, the HVP22 complete opening, this moment is because diode D22 reverse breakdown current is very big, the HV22 point voltage begins to raise rapidly, and when the HV22 point voltage was elevated to reverse breakdown voltage near D22, the electric current of diode diminished rapidly, the branch road that this moment, HVP25 and HVP26 formed can continue the HV22 point voltage is drawn high, adjust to burning voltage VHV22, can produce the voltage of scope from 0 to VHV22 for the HVN3 of output stage, VHV22 equally can be by adjusting the series connection quantity of diode, and the width of HVP25 (HVP23) and HVP26 (HVP24) adjusts required voltage than (selecting the situation of same channel length for use).Though when stable state, there is the passage current of HVP25 and HVP26 and HVP23 and HVP24, but because state exchange is mainly realized by diode branch fast, the branch road of HVP25 and HVP26 and HVP23 and HVP24 is mainly realized the adjustment among a small circle of voltage, thereby passage current is very little, thereby quiescent dissipation is still very low during circuit working.
As shown in Figure 4, Fig. 4 is the circuit diagram of the level shift circuit that provides according to first embodiment of the invention.In this specific embodiment, suppose that high voltage source VPP equals 60V, low-tension supply VDD is 5V, and it is 25V that the maximum of high pressure P pipe HVP3 and N pipe HVN3 grid is born voltage, and the reverse breakdown voltage of diode is 12V, can connect with three diodes.
The first voltage transitions level 1 is made of four high voltage transistor HVP11, HVP12, HVN11, HVN12 and six diode D11, D12, D13, D14, D15, D16.The source electrode of HVP11 connects power supply, drain electrode connects the grid of HVP12 and is connected together as the HV11 node with the N utmost point of D11, the source electrode of HVP12 connects power supply, drain electrode connects the grid of HVP11 and is connected together as the HV12 node with the N utmost point of D14, this output signal node is used for the grid-control system signal of the PMOS pipe of output stage 3, the P utmost point of D11 connects the N utmost point of D12, the P utmost point of D12 connects the N utmost point of D13, the P utmost point of D14 connects the N utmost point of D15, the P utmost point of D15 connects the N utmost point of D16, the source ground of HVN11 and HVN12, drain electrode connects the P utmost point of D13 and D16 respectively, and grid meets low-voltage control signal LV1, LV2 respectively, LV1 produces LV2 by a reverser, and this reverser is made up of two low-voltage tube M1-1 and M1-2.The output voltage range of HV12 be 36V to 60V, so the maximum voltage difference on the high-voltage tube HVP3 grid is 24V,, thereby do not worry that the HVP3 tube grid can be breakdown less than 25V.
The general structure of the second voltage transitions level 2 is similar to the first voltage transitions level 1, main difference be also to use six diodes, D21, D22, D23, D24, D25 and D26.The N utmost point of diode D21 and D24 is met VPP, the P utmost point connects the N utmost point of D22 and D25 respectively, the P utmost point of D22 and D25 connects the N utmost point of D23 and D26 respectively, the P utmost point of D23 and D26 meets high-voltage tube HVP21 respectively, the source electrode of HVP22, the drain electrode of HVP21 and HVP22 is linked to each other with the drain electrode of HVN21 and HVN22 respectively, as voltage node HV21 and HV22, HVP21 links to each other with the drain electrode of HVP22 and HVP21 respectively with the HVP22 grid, the source ground of HVN21 and HVN22, grid meets low-voltage control signal LV3 and LV4 respectively, and LV3 produces LV4 by a reverser, and this reverser is made up of two low-voltage tube M2-1 and M2-2.The output signal of HV22 node is used for the grid-control system signal of the NMOS pipe of high pressure output stage 3.The second voltage transitions level 2 can provide the control signal of scope from 0 to 24V for HVN3 grid level, so the maximum voltage difference on the high-voltage tube HVP3 grid is 24V, less than 25V, thereby does not worry that the HVN3 tube grid is breakdown.
As shown in Figure 5, Fig. 5 is the circuit diagram of the level shift circuit that provides according to second embodiment of the invention.In this specific embodiment, suppose that high voltage source VPP equals 40V, low-tension supply VDD is 5V, and it is 25V that the grid maximum of high pressure P pipe HVP3 and N pipe HVN3 is born voltage, and the reverse breakdown voltage of diode is 12V, can connect with two diodes.The first voltage transitions level 1 is made of ten high voltage transistor HVP11, HVP12, HVP13, HVP14, HVP15, HVP16, HVN11, HVN12, HVN13, HVN14 and four diode D11, D12, D13, D14.The source electrode of HVP11 connects power supply, and drain electrode connects the grid of HVP12, and is connected together as the HV11 node with the N utmost point of D11.The source electrode of HVP12 connects power supply, and drain electrode connects the grid of HVP11 and is connected together as the HV12 node with the N utmost point of D13.This HV12 output signal node is used for the grid-control system signal of the PMOS pipe of high pressure output stage 3.The P utmost point of D11 connects the N utmost point of D12, and the P utmost point of D13 connects the N utmost point of D14, the source ground of HVN11 and HVN12, and drain electrode connects the P utmost point of D12 and D14 respectively, and grid meets low-voltage control signal LV1, LV2 respectively.LV1 produces LV2 by a reverser, and this reverser is made up of two low-voltage tube M1-1 and M1-2.HVP13 and HVP14 be the grid leak short circuit respectively, the source electrode of HVP13 meets VPP, and drain electrode connects the source electrode of HVP14 and links to each other with node HV11, and the drain electrode of HVP14 connects the drain electrode of HVN13, the source ground of HVN13, grid connects the grid of HVN11, and HVP15 and HVP16 be the grid leak short circuit respectively, and the source electrode of HVP15 meets VPP, drain electrode connects the source electrode of HVP16 and links to each other with node HV12, the drain electrode of HVP16 connects the drain electrode of HVN14, and the source ground of HVN14, grid connect the grid of HVN12.The width of adjusting HVP15 (HVP13) and HVP16 (HVP14) makes its burning voltage at 20V than (selecting same channel length for use).When LV1 becomes low level by high level, diode branch is pulled down to 24V with the voltage of HV12 node fast, HVP15 and HVP16 continue the voltage of HV12 node is pulled down to burning voltage 20V then, so the output voltage range of HV12 is that 20V is to 40V, maximum voltage difference on the high-voltage tube HVP3 grid is 20V, less than 25V, thereby do not worry that the HVP3 tube grid is breakdown.
Four diodes of the second voltage transitions level, 2 usefulness, D21, D22, D23 and D24, the N utmost point of diode D21 and D23 is met VPP, the P utmost point connects the N utmost point of D22 and D24 respectively, the P utmost point of D22 and D24 meets high-voltage tube HVP21 respectively, the source electrode of HVP22, the drain electrode of HVP21 and HVP22 is directly linked to each other with the drain electrode of HVN21 and HVN22 respectively, as voltage node HV21 and HV22, HV22 links to each other with the grid of output stage HVN3,6 high-voltage tube HVP23, HVP24, HVP25, HVP26, the method of attachment of HVN23 and HVN24 is similar to the first voltage transitions level 1, main difference is that the grid of HVN23 connect with the grid of HVN22 and link to each other, and the grid of HVN24 connect with the grid of HVN21 and link to each other.The width of adjusting HVP25 (HVP23) and HVP26 (HVP24) makes its burning voltage at 20V than (selecting same channel length for use).When LV3 becomes high-voltage flat by low level, diode branch is drawn high 16V with the voltage of HV22 node fast, HVP25 and HVP26 continue the voltage of HV22 node is drawn high burning voltage 20V then, so the output voltage range of HV22 is 0 to 20V, the second voltage transitions level 2 can provide the control signal of scope from 0 to 20V for HVN3 grid level, so the maximum voltage difference on the high-voltage tube HVP3 grid is 20V,, thereby do not worry that the HVN3 tube grid is breakdown less than 25V.
Although the present invention explains in conjunction with specific embodiments, those skilled in the art obviously can also find out many selections, modifications and changes on the basis of above explanation.Therefore, all these are selected, and modifications and changes all should be included within the implication and scope of subsidiary claims.
Claims (5)
1. a level shift circuit is characterized in that, this circuit is made of the first voltage transitions level (1), the second voltage transitions level (2) and high pressure output stage (3); Wherein:
The first voltage transitions level (1) is made of four high voltage transistor HVP11, HVP12, HVN11, HVN12 and two diode D11, D12; The source electrode of HVP11 connects power supply, and drain electrode connects the grid of HVP12 and is connected together as the HV11 node with the N utmost point of D11; The source electrode of HVP12 connects power supply, and drain electrode connects the grid of HVP11 and is connected together as the HV12 node with the N utmost point of D12; The source ground of HVN11 and HVN12, drain electrode connects the P utmost point of D11 and D12 respectively, and grid meets low-voltage control signal LV1, LV2 respectively;
The second voltage transitions level (2) is made of four high voltage transistor HVP21, HVP22, HVN21, HVN22 and two diode D21 and D22; The N utmost point of diode D21 and D22 is met power supply VPP, the P utmost point connects the source electrode of high-voltage tube HVP21, HVP22 respectively, the drain electrode of HVP21 and HVP22 is linked to each other with the drain electrode of HVN21 and HVN22 respectively, as voltage node HV21 and HV22, HVP21 links to each other with the drain electrode of HVP22 and HVP21 respectively with the HVP22 grid, the source ground of HVN21 and HVN22, drain electrode connects the drain electrode of HVP21 and HVP22 respectively, and grid meets low-voltage control signal LV3, LV4 respectively.
2. level shift circuit according to claim 1, it is characterized in that, the output signal of described HV12 node is used for the grid-control system signal of the PMOS pipe of high pressure output stage (3), described low-voltage control signal LV1 produces low-voltage control signal LV2 by a reverser, and this reverser is made of two low-voltage tube M1-1 and M1-2.
3. level shift circuit according to claim 1, it is characterized in that, the described first voltage transitions level (1) further comprises 6 high-voltage tube HVP13, HVP14, HVP15, HVP16, HVN13 and HVN14, wherein, HVP13 and HVP14 be the grid leak short circuit respectively, and the source electrode of HVP13 meets power supply VPP, drain electrode connects the source electrode of HVP14 and links to each other with node HV11, the drain electrode of HVP14 connects the drain electrode of HVN13, and the source ground of HVN13, grid connect the grid of HVN11; HVP15 and HVP16 be the grid leak short circuit respectively, and the source electrode of HVP15 meets power supply VPP, and drain electrode connects the source electrode of HVP16 and links to each other with node HV12, and the drain electrode of HVP16 connects the drain electrode of HVN14, and the source ground of HVN14, grid connect the grid of HVN12.
4. level shift circuit according to claim 1, it is characterized in that, the output signal of described HV22 node is used for the grid-control system signal of the NMOS pipe of high pressure output stage (3), described low-voltage control signal LV3 produces low-voltage control signal LV4 by a reverser, and this reverser is made of two low-voltage tube M2-1 and M2-2.
5. level shift circuit according to claim 1, it is characterized in that, the described second voltage transitions level (2) further comprises 6 high-voltage tube HVP23, HVP24, HVP25, HVP26, HVN23 and HVN24, wherein, HVP23 and HVP24 be the grid leak short circuit respectively, the source electrode of HVP23 meets power supply VPP, drain electrode connects the drain electrode of HVP24 and links to each other with node HV21, the drain electrode of HVP24 connects the drain electrode of HVN21, the source ground of HVN21, grid connects the grid of HVN22, and HVP25 and HVP26 be the grid leak short circuit respectively, and the source electrode of HVP25 meets power supply VPP, drain electrode connects the source electrode of HVP26 and links to each other with node HV22, the drain electrode of HVP26 connects the drain electrode of HVN24, and the source ground of HVN24, grid connect the grid of HVN21.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200810057882XA CN101515755B (en) | 2008-02-20 | 2008-02-20 | High-pressure level shift circuit with low power consumption |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200810057882XA CN101515755B (en) | 2008-02-20 | 2008-02-20 | High-pressure level shift circuit with low power consumption |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101515755A CN101515755A (en) | 2009-08-26 |
| CN101515755B true CN101515755B (en) | 2011-04-13 |
Family
ID=41040086
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200810057882XA Expired - Fee Related CN101515755B (en) | 2008-02-20 | 2008-02-20 | High-pressure level shift circuit with low power consumption |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101515755B (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102522894B (en) * | 2011-12-21 | 2014-05-07 | 北京自动测试技术研究所 | Voltage conversion circuit for power device test system |
| CN102904565B (en) * | 2012-10-09 | 2014-05-28 | 长安大学 | Level shift circuit for DC-DC (Direct Current) driven ultra-low static current |
| CN103412509B (en) * | 2013-08-29 | 2016-04-13 | 灿芯半导体(上海)有限公司 | Low-power consumption Self-disconnecting circuit and level shifting circuit thereof |
| CN108696275B (en) * | 2017-04-07 | 2021-11-12 | 光宝科技新加坡私人有限公司 | Buffer circuit |
| CN109327218B (en) * | 2017-07-31 | 2020-12-25 | 深圳市中兴微电子技术有限公司 | Level shift circuit and integrated circuit chip |
| CN109547009B (en) * | 2018-11-19 | 2022-08-12 | 中国电子科技集团公司第五十八研究所 | High-reliability level shift circuit |
| CN112265260A (en) * | 2020-09-28 | 2021-01-26 | 西安交通大学 | Integrated driving and controlling structure for array printing nozzle |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6300796B1 (en) * | 1999-02-19 | 2001-10-09 | Zilog, Inc. | High voltage PMOS level shifter |
| US6600357B1 (en) * | 2001-03-27 | 2003-07-29 | Halo Lsi, Inc. | High voltage level shifter |
| CN1558554A (en) * | 2004-02-04 | 2004-12-29 | 威盛电子股份有限公司 | Electric voltage carrying circuit |
| CN1812265A (en) * | 2006-03-01 | 2006-08-02 | 友达光电股份有限公司 | Transistor level shift circuit |
-
2008
- 2008-02-20 CN CN200810057882XA patent/CN101515755B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6300796B1 (en) * | 1999-02-19 | 2001-10-09 | Zilog, Inc. | High voltage PMOS level shifter |
| US6600357B1 (en) * | 2001-03-27 | 2003-07-29 | Halo Lsi, Inc. | High voltage level shifter |
| CN1558554A (en) * | 2004-02-04 | 2004-12-29 | 威盛电子股份有限公司 | Electric voltage carrying circuit |
| CN1812265A (en) * | 2006-03-01 | 2006-08-02 | 友达光电股份有限公司 | Transistor level shift circuit |
Non-Patent Citations (1)
| Title |
|---|
| JP特开2004-357345A 2004.12.16 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101515755A (en) | 2009-08-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101515755B (en) | High-pressure level shift circuit with low power consumption | |
| CN101569101B (en) | Cmos circuit and semiconductor device | |
| CN109951060B (en) | High-voltage half-bridge driving circuit | |
| CN1196609A (en) | High-voltage tolerant input buffer in low-voltage technology | |
| CN1811658A (en) | Zero-bias-power level shifting system and method | |
| CN1365540A (en) | Fast high voltage level shifter with gate oxide protection | |
| US8717086B2 (en) | Adaptive cascode circuit using MOS transistors | |
| CN103095108A (en) | Magnet isolation drive circuit | |
| CN101959351A (en) | P-MOS tube driving circuit and driving method thereof | |
| CN100561871C (en) | Level shifting circuit | |
| CN115765704A (en) | Power MOS tube grid driver and power MOS tube grid driving system | |
| CN113949268B (en) | High-voltage power domain ground floatable low-voltage to high-voltage level shift circuit | |
| CN116742920A (en) | NMOS power switch tube driving circuit and control method thereof | |
| US7663405B2 (en) | Organic TFT inverter arrangement | |
| CN111294042B (en) | Level shift circuit | |
| CN1424811A (en) | Synchronous rectifying driving circuit for DC converter | |
| CN207397837U (en) | A kind of control circuit for electromagnet | |
| CN1773822A (en) | Efficient Low-power dissipation whole PMOS charge pump circuit adapted to low-source voltage | |
| CN100488036C (en) | D type amplifier and modulating method thereof | |
| CN116566176A (en) | Driving method of power tube and power tube driving circuit | |
| CN1802057A (en) | Current source circuit for driving parallel LED | |
| CN101594136A (en) | Current-mode level transforming circuit in the N channel power MOS pipe driving chip | |
| CN106330172B (en) | The transmission gate of high voltage threshold device and its subsequent pull-down circuit structure | |
| CN114268219B (en) | Bootstrap circuit for driving high-side NMOS (N-channel metal oxide semiconductor) tube | |
| CN203193605U (en) | A driving circuit used for driving a high-voltage device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110413 |