CN101431144A - Method for manufacturing self-isolation resistance transition type memory - Google Patents
Method for manufacturing self-isolation resistance transition type memory Download PDFInfo
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- CN101431144A CN101431144A CNA2007101769355A CN200710176935A CN101431144A CN 101431144 A CN101431144 A CN 101431144A CN A2007101769355 A CNA2007101769355 A CN A2007101769355A CN 200710176935 A CN200710176935 A CN 200710176935A CN 101431144 A CN101431144 A CN 101431144A
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- type memory
- memory unit
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- transformation type
- isolation resistor
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- 238000000034 method Methods 0.000 title claims abstract description 54
- 230000015654 memory Effects 0.000 title claims abstract description 38
- 238000002955 isolation Methods 0.000 title claims abstract description 27
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 18
- 230000007704 transition Effects 0.000 title abstract description 11
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 26
- 239000000758 substrate Substances 0.000 claims abstract description 23
- 230000009466 transformation Effects 0.000 claims abstract description 21
- 239000000463 material Substances 0.000 claims abstract description 18
- 238000001259 photo etching Methods 0.000 claims abstract description 9
- 239000011248 coating agent Substances 0.000 claims abstract description 4
- 238000000576 coating method Methods 0.000 claims abstract description 4
- 239000002184 metal Substances 0.000 claims description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 8
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- 150000001875 compounds Chemical class 0.000 claims description 6
- 230000003287 optical effect Effects 0.000 claims description 4
- 229910018279 LaSrMnO Inorganic materials 0.000 claims description 3
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- 229910002370 SrTiO3 Inorganic materials 0.000 claims description 3
- 229910010413 TiO 2 Inorganic materials 0.000 claims description 3
- 239000007772 electrode material Substances 0.000 claims description 3
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- 229910044991 metal oxide Inorganic materials 0.000 claims description 3
- 150000004706 metal oxides Chemical class 0.000 claims description 3
- 239000010453 quartz Substances 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- 229910014031 strontium zirconium oxide Inorganic materials 0.000 claims description 3
- 230000008569 process Effects 0.000 abstract description 7
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Abstract
The invention relates to the technical field of microelectronic manufacturing and memories, and discloses a method for manufacturing a self-isolation resistance transformation type memory, which comprises the following steps: A. forming a conductive film as a lower electrode on an insulating substrate; B. coating photoresist on the structure for forming the lower electrode; C. defining the size of a device on the photoresist by a photoetching method; D. sequentially growing a material having resistance transition characteristics and an upper electrode; E. the device is released by stripping the photoresist. The method for manufacturing the self-isolation resistance transformation type memory by adopting the one-step stripping process has the advantages of low cost, simple manufacturing process and capability of realizing self-isolation of memory device units.
Description
Technical field
The present invention relates to microelectronics manufacturing and memory technology field, relate in particular to a kind of method that adopts a step stripping technology to make self-isolation resistor transformation type memory unit.
Background technology
Non-volatility memorizer, its main feature are also can keep canned data for a long time under situation about not powering up, and the characteristics of its existing ROM have very high access speed again.Along with the needs to big capacity, low-power consumption storage such as multimedia application, mobile communication, non-volatility memorizer, flash memory (Flash) particularly, the market share of shared semiconductor device becomes increasing, also more and more becomes a kind of considerable type of memory.
Currently marketed non-volatility memorizer is a main flow with flash memory (Flash), but flush memory device exists that operating voltage is excessive, service speed slow, endurance is good inadequately and since in device downsizing process thin excessively tunnel oxide shortcoming such as will cause that fall short of memory time.Desirable non-volatility memorizer should possess conditions such as operating voltage is low, simple in structure, non-destructive reads, service speed fast, memory time (Retention) is long, device area is little, endurance (Endurance) is good.
Many new materials and device are studied at present, attempted the target that reaches above-mentioned, wherein have the novel storage component part of considerable part all to adopt the change of resistance value to be used as memory style.Wherein electric resistance transition type memory (RRAM) mainly is based on the resistance-variable characteristic of solid-oxide material.
As shown in Figure 1, Fig. 1 is the basic structure schematic diagram of electric resistance transition type memory device.In Fig. 1,101 expression top electrodes, 102 expression bottom electrodes, 103 presentation function layer material films.The resistance value of this layer film can have two kinds of different states (high resistant and low-resistances, can be used for respectively characterizing ' 0 ' and ' 1 ' two states), as shown in Figure 2, Fig. 2 is the Utopian i-v curve schematic diagram of electric resistance transition type memory, and these two kinds of resistance states can conversion mutually under the effect of extra electric field.RRAM has the potentiality at 32nm node and the existing main flow FLASH memory of following replacement, thereby becomes an important research direction of present novel storage component part.
From the above, the basic device unit construction of electric resistance transition type memory (RRAM) is the sandwich structure of medium/metal layer/metal (MIM).
The method of at present common this basic device architecture of making is: at first form bottom electrode on dielectric substrate, the material that has the electric resistance changing characteristic in the place growth that forms bottom electrode afterwards, make top electrode at last, device architecture as shown in Figure 3, the schematic diagram that Fig. 3 links to each other and do not isolate by dielectric layer for storage component part and device.This manufacture method is no doubt simple, but still has dielectric layer to link to each other between the device made and the device, influences the performance and the stability of device.
Except this method, also have the isolation that realizes device by insulating oxide silicon, as shown in Figure 4, Fig. 4 is for passing through SiO between storage component part and the device
2The schematic diagram that insulating barrier is isolated.But this method processing step complexity needs repeatedly photoetching, has increased the element manufacturing cost.
Summary of the invention
(1) technical problem that will solve
At the deficiency that the method for the electric resistance transition type memory of above-mentioned existing making mim structure exists, main purpose of the present invention is to provide that a kind of manufacturing process is simple, the method for the making self-isolation resistor transformation type memory unit of low cost of manufacture.
(2) technical scheme
For achieving the above object, the present invention proposes a kind of method of making self-isolation resistor transformation type memory unit, this method comprises:
A, on dielectric substrate, form conductive film as bottom electrode;
B, apply photoresist forming on the structure of bottom electrode;
C, on above-mentioned photoresist, define the size of device by photoetching method;
D, the material and the top electrode of growing and having the electric resistance changing characteristic successively;
E, the method by stripping photoresist discharge device.
In the such scheme, dielectric substrate described in the steps A comprises glass, quartz or silicon substrate, and by silica, silicon nitride that silicon substrate supported.
In the such scheme, the conductive film as bottom electrode described in the steps A comprises: metal, have the compound of conductivity, and be used to increase the adhesion layer with the adhesiveness institute deposit of substrate.
In the such scheme, photoresist described in the step B is 5214,9912,9918, ZEP520 or HSQ, and the thickness of photoresist coating is at least 1 μ m.
In the such scheme, photoetching method described in the step C comprises at the optical exposure method of large-size device with at the electron beam exposure method of small size device.
In the such scheme, the material that has the electric resistance changing characteristic described in the step D is binary metal oxide ZrO
2, NiO, TiO
2, CuO, MnO, Al
2O
3, MgO, Nb
2O
5, Ta
2O
5, VO
2, ZnO and MoO, perhaps ternary oxide SrZrO3 and SrTiO3, and complex oxide LaSrMnO
3, LaCaMnO
3And PrCaMnO
3
In the such scheme, the material of top electrode described in the step D comprises metal, has the compound of conductivity, and is used to increase the adhesion layer with the adhesiveness institute deposit of substrate.
In the such scheme, the material with electric resistance changing characteristic of the growth successively described in the step D and the gross thickness of upper electrode material are less than the thickness of photoresist described in the step B.
(3) beneficial effect
From technique scheme as can be seen, the present invention has following beneficial effect:
1, one step of this employing provided by the invention stripping technology method of making self-isolation resistor transformation type memory unit, it is low to have a cost, and it is simple to make flow process, can realize the advantage of memory device unit self-isolation.
2, utilize the present invention, the processing technology of device is simplified greatly, has reduced cost of manufacture.
3, the method for one step of this employing stripping technology making self-isolation resistor transformation type memory unit provided by the invention, formed device has the characteristic of self-isolation, can improve the performance and the stability of device.
Description of drawings
Fig. 1 is the basic structure schematic diagram of electric resistance transition type memory device;
Fig. 2 is the Utopian i-v curve schematic diagram of electric resistance transition type memory;
The schematic diagram that Fig. 3 links to each other and do not isolate by dielectric layer for storage component part and device;
Fig. 4 is for passing through SiO between storage component part and the device
2The schematic diagram that insulating barrier is isolated;
Fig. 5 is the method flow diagram of making self-isolation resistor transformation type memory unit provided by the invention;
Fig. 6 adopts a step stripping technology to make the process flow diagram of self-isolation resistor transformation type memory unit according to the embodiment of the invention;
Fig. 7 is the Au/HfO that adopts a step stripping technology to make according to the embodiment of the invention
2The electric resistance changing characteristic schematic diagram of/Au structure;
Fig. 8 is the Au/HfO that adopts a step stripping technology to make according to the embodiment of the invention
2The tolerance characteristic schematic diagram of/Au structure.
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.
The method of this making self-isolation resistor transformation type memory unit provided by the invention, adopt a step stripping technology, at first on dielectric substrate, form conductive film as bottom electrode, then apply photoresist, define the size of device by photoetching method, the material and the top electrode of growing and having the electric resistance changing characteristic successively discharges device by stripping photoresist at last afterwards, and the isolation between device and the device is also finished simultaneously.
As shown in Figure 5, Fig. 5 is the method flow diagram of making self-isolation resistor transformation type memory unit provided by the invention, and this method comprises:
Step 501: on dielectric substrate, form conductive film as bottom electrode;
Step 502: on the structure that forms bottom electrode, apply photoresist;
Step 503: the size that on above-mentioned photoresist, defines device by photoetching method;
Step 504: successively the growth have the electric resistance changing characteristic material and top electrode;
Step 505: the method by stripping photoresist discharges device.
Dielectric substrate comprises glass, quartz or silicon substrate described in the above-mentioned steps 501, and by silica that silicon substrate supported, silicon nitride etc.
Conductive film as bottom electrode described in the above-mentioned steps 501 comprises: metal, have the compound of conductivity, and be used to increase the adhesion layer with the adhesiveness institute deposit of substrate.
Photoresist described in the above-mentioned steps 502 is 5214,9912,9918, ZEP520 or HSQ, and the thickness of photoresist coating is at least 1 μ m.
Photoetching method described in the above-mentioned steps 503 comprises at the optical exposure method of large-size device with at the electron beam exposure method of small size device.
The material that has the electric resistance changing characteristic described in the above-mentioned steps 504 is binary metal oxide ZrO
2, NiO, TiO
2, CuO, MnO, Al
2O
3, MgO, Nb
2O
5, Ta
2O
5, VO
2, ZnO and MoO etc., perhaps ternary oxide SrZrO3 and SrTiO3 etc., and complex oxide LaSrMnO
3, LaCaMnO
3And PrCaMnO
3Deng.
The material of top electrode described in the above-mentioned steps 504 comprises metal, has the compound of conductivity, and is used to increase the adhesion layer with the adhesiveness institute deposit of substrate.
The material with electric resistance changing characteristic of the growth successively described in the above-mentioned steps 504 and the gross thickness of upper electrode material are less than the thickness of photoresist described in the step 502.
As shown in Figure 6, Fig. 6 adopts a step stripping technology to make the process flow diagram of self-isolation resistor transformation type memory unit according to the embodiment of the invention.In the present embodiment, be substrate with n type silicon.At first pass through method growth one deck SiO of dry-oxygen oxidation
2As dielectric substrate, the Cr metal level that utilizes electron beam evaporation process deposit one deck 10nm afterwards is as adhesion layer, and the Au of deposit one deck 50nm is as bottom electrode then.Then adopt the method for spin coating to apply 5214 photoresists, 1 minute time, rotating speed is 3000 rev/mins, and the thickness of the photoresist of Xing Chenging is about 1.3um like this, adopt optical exposure method definition size of devices afterwards, then the thick HfO of deposit 60nm successively after removing primer
2Layer and the thick Cr/Au upper electrode layer (Cr is as adhesion layer, and the thickness of Cr/Au is respectively 10/50nm) of 60nm.Remove 5214 photoresists with acetone soln at last, discharge device.Finish whole technical process.
Fig. 7 and Fig. 8 are the schematic diagrames that is used for illustrating one embodiment of the invention.Fig. 7 is the Au/HfO that adopts a step stripping technology to make according to the embodiment of the invention
2The electric resistance changing characteristic schematic diagram of/Au structure; Fig. 8 is the Au/HfO that adopts a step stripping technology to make according to the embodiment of the invention
2The tolerance characteristic schematic diagram of/Au structure.After through repetitive operation repeatedly, the electric resistance changing characteristic of device does not significantly worsen.
From the above, in an embodiment of the present invention, the method by adopting a step stripping technology to make non-volatile resistor transition type memory can form nature and isolate between storage component part and the device.This electric resistance transition type memory manufacture method based on traditional stripping technology, its manufacturing process is simple, low cost of manufacture.
Above-described specific embodiment; purpose of the present invention, technical scheme and beneficial effect are further described; institute is understood that; the above only is specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any modification of being made, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (8)
1, a kind of method of making self-isolation resistor transformation type memory unit is characterized in that, this method comprises:
A, on dielectric substrate, form conductive film as bottom electrode;
B, apply photoresist forming on the structure of bottom electrode;
C, on above-mentioned photoresist, define the size of device by photoetching method;
D, the material and the top electrode of growing and having the electric resistance changing characteristic successively;
E, the method by stripping photoresist discharge device.
2, the method for making self-isolation resistor transformation type memory unit according to claim 1 is characterized in that, dielectric substrate described in the steps A comprises glass, quartz or silicon substrate, and by silica, silicon nitride that silicon substrate supported.
3, the method for making self-isolation resistor transformation type memory unit according to claim 1, it is characterized in that, conductive film as bottom electrode described in the steps A comprises: metal, have the compound of conductivity, and be used to increase the adhesion layer with the adhesiveness institute deposit of substrate.
4, the method for making self-isolation resistor transformation type memory unit according to claim 1 is characterized in that, photoresist described in the step B is 5214,9912,9918, ZEP520 or HSQ, and the thickness of photoresist coating is at least 1 μ m.
5, the method for making self-isolation resistor transformation type memory unit according to claim 1 is characterized in that, photoetching method described in the step C comprises at the optical exposure method of large-size device with at the electron beam exposure method of small size device.
6, the method for making self-isolation resistor transformation type memory unit according to claim 1 is characterized in that, the material that has the electric resistance changing characteristic described in the step D is binary metal oxide ZrO
2, NiO, TiO
2, CuO, MnO, Al
2O
3, MgO, Nb
2O
5, Ta
2O
5, VO
2, ZnO and MoO, perhaps ternary oxide SrZrO3 and SrTiO3, and complex oxide LaSrMnO
3, LaCaMnO
3And PrCaMnO
3
7, the method for making self-isolation resistor transformation type memory unit according to claim 1, it is characterized in that, the material of top electrode described in the step D comprises metal, has the compound of conductivity, and is used to increase the adhesion layer with the adhesiveness institute deposit of substrate.
8, the method for making self-isolation resistor transformation type memory unit according to claim 1, it is characterized in that the material with electric resistance changing characteristic of the growth successively described in the step D and the gross thickness of upper electrode material are less than the thickness of photoresist described in the step B.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007101769355A CN101431144A (en) | 2007-11-07 | 2007-11-07 | Method for manufacturing self-isolation resistance transition type memory |
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|---|---|---|---|
| CNA2007101769355A CN101431144A (en) | 2007-11-07 | 2007-11-07 | Method for manufacturing self-isolation resistance transition type memory |
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|---|---|
| CN101431144A true CN101431144A (en) | 2009-05-13 |
Family
ID=40646388
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|---|---|---|---|
| CNA2007101769355A Pending CN101431144A (en) | 2007-11-07 | 2007-11-07 | Method for manufacturing self-isolation resistance transition type memory |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103014686A (en) * | 2012-12-06 | 2013-04-03 | 桂林电子科技大学 | Method for preparing Mn-Zn oxide electrogenerated resistive thin films and asymmetric light-pervious resistive capacitors thereof |
| CN103359683A (en) * | 2013-07-10 | 2013-10-23 | 华中科技大学 | Method for preparing magnetic tunnel junction (MTJ) nano column array |
| CN104393170A (en) * | 2014-10-20 | 2015-03-04 | 中国科学院微电子研究所 | Preparation method of three-dimensional high-density resistance transformation memory |
-
2007
- 2007-11-07 CN CNA2007101769355A patent/CN101431144A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103014686A (en) * | 2012-12-06 | 2013-04-03 | 桂林电子科技大学 | Method for preparing Mn-Zn oxide electrogenerated resistive thin films and asymmetric light-pervious resistive capacitors thereof |
| CN103359683A (en) * | 2013-07-10 | 2013-10-23 | 华中科技大学 | Method for preparing magnetic tunnel junction (MTJ) nano column array |
| CN103359683B (en) * | 2013-07-10 | 2016-01-20 | 华中科技大学 | A kind of preparation method of MTJ nano column array |
| CN104393170A (en) * | 2014-10-20 | 2015-03-04 | 中国科学院微电子研究所 | Preparation method of three-dimensional high-density resistance transformation memory |
| CN104393170B (en) * | 2014-10-20 | 2017-01-18 | 中国科学院微电子研究所 | Preparation method of three-dimensional high-density resistance transformation memory |
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Open date: 20090513 |