CN101431076B - Semiconductor apparatus and method for manufacturing the same - Google Patents

Abstract

A semiconductor apparatus is disclosed. The semiconductor apparatus includes a semiconductor substrate (10) that has a first surface (10a) and a second surface (10b) opposite to each other. The semiconductor apparatus further includes multiple double-sided electrode elements (50, 50a, 50b) each having a pair of electrodes (18a, 18b, 21, 21a, 21b) located respectively on the first and second surfaces (10a, 10b) of the semiconductor substrate (10). A current flows between the first and second electrode (18a, 18b, 21, 21a, 21b). Each double-sided electrode element (50, 50a, 50b) has a PN column region (13) located in the semiconductor substrate (10). The semiconductor apparatus further includes an insulation trench (30) that surrounds each of multiple double-sided electrode elements (50, 50a, 50b), and that insulates and separates the multiple double-sided electrode elements (50, 50a, 50b) from each other.

Description

Semiconductor equipment and manufacturing approach thereof

Technical field

The present invention relates to a kind ofly have a plurality of semiconductor equipments that are positioned at the two-face electrode member on the single Semiconductor substrate, and relate to its manufacturing approach.

Background technology

Some semiconductor equipments comprise two-face electrode member (for example, the vertical MOS transistor element), and it has a pair of electrode that lays respectively at the front and back of Semiconductor substrate, and are constructed to make electric current between described pair of electrodes, to flow.Known, ultra knot (SJ) structure can be improved so two-face electrode member aspect puncture voltage and on state resistance.Said super-junction structure comprises that (for example) plays the PN cylindricality zone of drift region effect.Said PN cylindricality zone has a plurality of N type semiconductor parts and a plurality of P type semiconductor part of adjacent one another are and arranged alternate.

JP-A-2007-13003 discloses a kind of a plurality of semiconductor equipments that are arranged in the two-face electrode member in the Semiconductor substrate with PN cylindricality zone that comprise.Above-mentioned semiconductor equipment comprises N-channel MOS transistor unit with the N type semiconductor part that is used for the drift region and the P channel MOS transistor element with the P type semiconductor part that is used for the drift region.Said N-channel MOS transistor unit and P channel MOS transistor arrangements of elements are on semi-conductive substrate.

In the middle of the disclosed semiconductor equipment of JP-A-2007-13003, PN junction makes the insulated from each other and isolation (with reference to the Fig. 2 among the JP-A-2007-13003 and Figure 14) of adjacent element at interval.But the inventor has found following and the relevant difficulty of puncture voltage of improving two-face electrode member.Because the narrowed width that PN junction, becomes and be difficult to reduce the area in element spacing zone or be difficult to make the interelement septal area at interval.Thereby, be difficult to reduce the size of semiconductor equipment, and be difficult to reduce the manufacturing cost of semiconductor equipment.

In addition, a part of PN cylindricality zone plays a part PN junction interelement septal area at interval.Thereby when applying transient signal (for example, noise, surge voltage), the charge balance in the PN cylindricality zone will become unusually, in other words, breech lock (latch-up) possibly take place in the PNPN structure.Owing to have ghost effect, thereby possibly be short-circuited around the electrode in the source.

Summary of the invention

Consider above-mentioned and other difficulty, the object of the present invention is to provide the manufacturing approach of a kind of semiconductor equipment and a kind of semiconductor equipment.

According to a first aspect of the invention, a kind of semiconductor equipment is provided.Said semiconductor equipment comprises Semiconductor substrate, and said Semiconductor substrate has each other relative first surface and second surface, and has a plurality of elements-formation zone.Said semiconductor equipment also comprises insulated trench, and it surrounds in said a plurality of element-formation zone each, and makes the insulated from each other and isolation in said a plurality of element-formation zone.Said semiconductor equipment also comprises a plurality of elements that lay respectively in said a plurality of element-formation zone.Said a plurality of element comprises at least two two-face electrode members.Each two-face electrode member comprises first electrode on one of the first surface that is positioned at said Semiconductor substrate and second surface.Each two-face electrode member also comprises second electrode on another of the first surface that is arranged in said Semiconductor substrate and second surface.Be configured to make electric current between first electrode and second electrode, to flow each two-face electrode member.Each two-face electrode member also comprises the PN cylindricality zone that is positioned at said Semiconductor substrate, and said PN cylindricality zone comprises a plurality of P conductive type semiconductor parts and a plurality of N conductive type semiconductor part.Said a plurality of P conductive type semiconductor part and said a plurality of N conductive type semiconductor parts edge replace and arranged adjacent perpendicular to the direction of the thickness direction of Semiconductor substrate.Each two-face electrode member also comprises the drift region that is provided by one of said a plurality of P conductive type semiconductor parts in said PN cylindricality zone and said a plurality of N conductive type semiconductor parts.

According to above-mentioned semiconductor equipment,, thereby can reduce the size of semiconductor equipment because insulated trench can play a part element isolation zone.In addition, because said insulated trench can play a part element isolation zone, thereby can limit the generation of the short circuit that causes by ghost effect.

A kind of manufacturing approach of semiconductor equipment is provided according to a second aspect of the invention.Said method comprises that preparation has the Semiconductor substrate of each other relative first surface and second surface.Said semiconductor equipment comprises the PN cylindricality zone with a plurality of P conductive type semiconductor parts and a plurality of N conductive type semiconductor part.Said a plurality of P conductive type semiconductor part and said a plurality of N conductive type semiconductor parts edge replace and arranged adjacent perpendicular to the direction of the thickness direction of Semiconductor substrate each other.Said method also comprises from first surface one side of Semiconductor substrate and forms insulated trench in Semiconductor substrate, is positioned at the openend and the bottom that is positioned at Semiconductor substrate on first surface one side thereby insulated trench is had.Said insulated trench defines a plurality of elements-formation zone.Said insulated trench is isolated and insulation said a plurality of element-formation zone each other.Said insulated trench is formed, make each element-formation zone have a plurality of P conductive type semiconductor parts and a plurality of N conductive type semiconductor part.Said method also is included in the part that forms two-face electrode member on first surface one side in each element of said Semiconductor substrate-formation zone.The part of said pair-face electrode member comprises first electrode.Said method also comprises: after forming insulated trench; And on first surface one side, form after the part of two-face electrode member; Through the second surface part of removing said Semiconductor substrate said Semiconductor substrate is carried out attenuate, thereby said insulated trench is come out from second surface one side of said Semiconductor substrate.Said method also comprises: after said Semiconductor substrate is carried out attenuate, on second surface one side in each element-formation zone, form other part of two-face electrode member.Said other part comprises second electrode relative with said first electrode.Said pair-face electrode member is formed, electric current is flowed between said first electrode and said second electrode.

According to said method, can provide a kind of and have undersized semiconductor equipment, because said insulated trench can play a part element isolation zone.Said insulated trench in addition, a kind of semiconductor equipment that can limit the short circuit that is caused by ghost effect can be provided, because can play a part element isolation zone.

A kind of manufacturing approach of semiconductor equipment is provided according to a third aspect of the invention we.Said method comprises that preparation comprises the Semiconductor substrate of each other relative first surface and second surface.Said Semiconductor substrate also comprises the PN cylindricality zone with a plurality of P conductive type semiconductor parts and a plurality of N conductive type semiconductor part.Said a plurality of P conductive type semiconductor part and said a plurality of N conductive type semiconductor parts edge replace and arranged adjacent perpendicular to the direction of the thickness direction of Semiconductor substrate each other.Said Semiconductor substrate has a plurality of elements-formation zone.Said method also is included in the part that forms two-face electrode member on first surface one side in each element of said Semiconductor substrate-formation zone.The part of said pair-face electrode member comprises first electrode.Said method also is included in the dielectric film that forms first surface one side on first surface one side of said Semiconductor substrate.Said method also comprises: on first surface one side, form after the part of two-face electrode member; And after the dielectric film that has formed said first surface one side; Form insulated trench from second surface one side of said Semiconductor substrate, thereby make said insulated trench reach said first surface dielectric film.Said insulated trench is isolated and insulation said a plurality of element-formation zone each other.Said insulated trench surrounds each in said a plurality of element-formation zone.Said insulated trench is formed, make each element-formation zone comprise a plurality of P conductive type semiconductor parts and a plurality of N conductive type semiconductor part.Said method also comprises: on said first surface one side, form said two-part of face electrode member after, on second surface one side in each element-formations zone of said Semiconductor substrate, form other part of said pair-face electrode member.Said other part comprises second electrode relative with said first electrode.Said pair-face electrode member is formed, electric current is flowed between said first electrode and said second electrode.

According to said method, can provide a kind of and have undersized semiconductor equipment, because said insulated trench can play a part element isolation zone.Said insulated trench in addition, a kind of semiconductor equipment that can limit the short circuit that is caused by ghost effect can be provided, because can play a part element isolation zone.

Description of drawings

Through the detailed description of hereinafter with reference accompanying drawing, above and other objects of the present invention, feature and advantage will become more obvious.In the accompanying drawings:

Fig. 1 shows the plane graph according to the semiconductor equipment of first embodiment;

Fig. 2 is the sectional view along the II-II line intercepting of Fig. 1;

Fig. 3 shows the circuit diagram of the synchronous commutation type switching circuit that comprises semiconductor equipment;

Fig. 4 shows the forming process of insulated trench and is forming the insulated trench sectional view of the process of execution before;

Fig. 5 shows the sectional view of forming process of the part of the two-face electrode member on front surface one side;

Fig. 6 shows the sectional view of the thinning process of Semiconductor substrate;

The sectional view of the forming process of the part of the two-face electrode member after Fig. 7 shows on the surperficial side;

Fig. 8 shows the sectional view according to the semiconductor equipment of the modification instance of first embodiment;

Fig. 9 shows the sectional view according to the semiconductor equipment of another modification instance of first embodiment;

Figure 10 A shows the diagram according to the gate electrode layout regional with respect to the PN cylindricality of first embodiment;

Figure 10 B shows the diagram according to another the gate electrode layout regional with respect to the PN cylindricality of first embodiment;

Figure 11 shows the forming process of the part of the two-face electrode member on front surface one side of Semiconductor substrate, and shows the sectional view of the process of before forming according to the part of second embodiment, carrying out;

Figure 12 shows the sectional view of the forming process of insulated trench;

Figure 13 shows the sectional view of forming process of the part of the two-face electrode member on the back surperficial side of Semiconductor substrate;

Figure 14 shows the sectional view according to the semiconductor equipment of the 3rd embodiment;

Figure 15 shows the sectional view according to the semiconductor equipment of the 4th embodiment;

Figure 16 is the curve chart of the relation between leakage current Id and the drain electrode-source voltage Vds;

Figure 17 A is the diagram that shows Potential distribution to the situation that the semiconductor equipment according to the 4th embodiment is punctured;

Figure 17 B is the diagram that shows Potential distribution to the situation that the semiconductor equipment according to first comparison example is punctured;

Figure 17 C is to the diagram that shows the Potential distribution of semiconductor equipment according to the situation about being punctured of second comparison example;

Figure 18 shows the sectional view of the forming process of the dielectric film on the trench wall;

Figure 19 shows the sectional view of the process that adopts conductor filled groove;

Figure 20 shows the sectional view according to the semiconductor equipment of the modification instance of the 4th embodiment;

Figure 21 shows the sectional view according to the semiconductor equipment of the 5th embodiment;

Figure 22 A and Figure 22 B show the plane graph according to the semiconductor equipment of the 5th embodiment;

Figure 23 shows the plane graph according to the semiconductor equipment of the modification instance of the 5th embodiment;

Figure 24 shows the sectional view according to the semiconductor equipment of first instance of revising embodiment;

Figure 25 shows the sectional view according to the semiconductor equipment of second instance of revising embodiment; And

Figure 26 shows the sectional view according to the semiconductor equipment of the 3rd instance of revising embodiment.

Embodiment

Below with reference to the description of drawings example embodiment.In following embodiment, adopt part or part of equal value like the similar Reference numeral representation class.

(first embodiment)

Below first embodiment will be described.Fig. 1 shows the plane graph according to the schematic configuration of the semiconductor equipment of first embodiment.For the sake of simplicity, Fig. 1 not shown in Semiconductor substrate or on the parts such as some element, interlayer dielectric, diaphragm that form.Fig. 2 is the sectional view along the II-II line intercepting of Fig. 1.For the sake of simplicity, the not shown interlayer dielectric of Fig. 2, diaphragm etc.

As depicted in figs. 1 and 2, in Semiconductor substrate 10, formed insulated trench 30.Insulated trench 30 separates element-formation zone 11 and element-formation zone 12.Two-face electrode member 50 is formed the element in each element-formation zone 11,12.Here, two-face electrode member 50 is in a broad sense corresponding to having a pair of positive 10a of Semiconductor substrate 10 and the active element of the electrode on the 10b of the back side of laying respectively at, and it is constructed to make electric current between said pair of electrodes, to flow.From more concrete meaning, two-face electrode member 50 is corresponding to having the active element that is in the drift region in the PN cylindricality layer 13, and is as mentioned below.Two-face electrode member 50 is corresponding to (for example) vertical-type transistor unit.In the present embodiment, adopt the example of vertical MOS transistor element as two-face electrode member 50.

As shown in Figure 2, Semiconductor substrate 10 comprises the PN cylindricality zone 13 that is in the zone that forms two-face electrode member 50.PN cylindricality zone 13 comprises a plurality of P conductive type semiconductor parts 14 and a plurality of N conductive type semiconductor parts 15.Said a plurality of P conductive type semiconductor part 14 and said a plurality of N conductive type semiconductor parts 15 are along the adjacent and arranged alternate of direction that is basically perpendicular to the thickness direction of Semiconductor substrate 10.The direction that will be basically perpendicular to the thickness direction of Semiconductor substrate 10 in the text again is called laterally.Can be through to by having the N conduction type, for example, the substrate applications trench fill method that the bulk single crystal si of N-conduction type constitutes and form said PN cylindricality zone 13, thus said a plurality of P and N conductive type semiconductor part 14,15 are arranged according to strip pattern.Perhaps; Said P conductive type semiconductor part 14 can have another kind of structure with N conductive type semiconductor part 15; As long as said another kind of structure can provide following function: two-when face electrode member 50 was in conducting state, P or N conductive type semiconductor part 14,15 played a part the drift region; Two-when face electrode member 50 was in cut-off state, each PN junction of 13 extended depletion layer from PN cylindricality zone in the horizontal, so that PN cylindricality zone 13 exhausts fully; And guarantee the puncture voltage of expecting.

Insulated trench 30 through formation in Semiconductor substrate 10 makes the PN cylindricality zone 13 in element-formation zone 11 isolate or separate with the PN cylindricality regional 13 in another element-formation zone 12.Each element- formation zone 11,12 all has PN cylindricality zone 13 separately, and it is that corresponding elements- formation zone 11,12 plays the effect of the drift region of two-face electrode member 50 (that is, 50a, 50b).

In element-formation zone 11, in the front surface 10a of Semiconductor substrate 10 side base region 16a is formed with PN cylindricality zone 13 and directly to contact.Base region 16a is a channel formation region, and has the N conduction type.In the surface portion of base region 16a, form source area 17a selectively.Source area 17a has the P conduction type, for example, and the P+ conduction type.Source area 17a is electrically connected with source electrode 18a.Source electrode 18a is first electrode of two-face electrode member 50a.Gate electrode 19a has groove structure.Gate electrode 19a is configured to run through source area 17a and base region 16a.The end portion of gate electrode 19a has been projected in the P conductive type semiconductor part 14.Gate electrode 19a has a plurality of parts of arranging according to bar paten.The a plurality of parts that make each all roughly the have vertical bar shaped layout that is parallel to each other basically.The bar paten of said gate electrode 19b is basically parallel to the bar paten in PN cylindricality zone 13.Gate electrode 19a is covered by gate insulating film.Source electrode 18a and gate electrode 19a are through interlayer dielectric (not shown) electrically insulated from one another.In back surperficial 10b one side of Semiconductor substrate 10 drain region 20a is formed with PN cylindricality zone 13 and directly to contact.Drain region 20a has the P conduction type, for example, and the P+ conduction type.Drain region 20a is electrically connected with drain electrode 21.Drain electrode 21 is second electrodes of two-face electrode member 50a.

As two-face electrode member 50 of one type, with the P channel-type two-face electrode member 50a is configured in element-formations regional 11 of Semiconductor substrate 10.Said P channel-type is two-and P conductive type semiconductor part 14 that face electrode member 50a adopts PN cylindricality zone 13 is as the drift region.More specifically, P channel-type vertical MOS transistor arrangements of components is arrived in element-formation zone 11.

In element-formation zone 12, the base region 16b that on the front surface 10a of Semiconductor substrate 10 side, will have the P conduction type forms with PN cylindricality zone 13 and directly contacts.Base region 16b plays a part channel formation region.In the surface portion of base region 16b, form source area 17b selectively.Source area 17b has the N conduction type, for example, and the N+ conduction type.Source area 17b is electrically connected with source electrode 18b.Source electrode 18b is first electrode of two-face electrode member 50b.Gate electrode 19b has groove structure.Gate electrode 19b formed run through source area 17b and base region 16b.The end portion of gate electrode 19b has been projected in the N conductive type semiconductor part 15.Gate electrode 19b has a plurality of parts of arranging according to bar paten.The a plurality of parts that make each roughly the have vertical bar shaped layout that is parallel to each other basically.The bar paten of said gate electrode 19b is basically parallel to the bar paten in PN cylindricality zone 13.Gate electrode 19b is covered by gate insulating film.Source electrode 18b and gate electrode 19b are through interlayer dielectric (not shown) electrically insulated from one another.In back surperficial 10b one side of Semiconductor substrate 10 drain region 20b is formed with PN cylindricality zone 13 and directly to contact.Drain region 20b has the N conduction type, for example, and the N+ conduction type.Drain region 20b is electrically connected with drain electrode 21.Drain electrode 21 is the common elements between drain region 20a and the drain region 20b.When the drain potentials of element 50a, 50b is identical, can realize above-mentioned structure with shared or public drain electrode 21.In the present embodiment, drain electrode 21 is arranged on the whole surperficial 10b in back of Semiconductor substrate 10 equably.

As two-face electrode member 50 of another kind of type, with the N channel-type two-face electrode member 50b is configured in element-formations regional 12 of Semiconductor substrate 10.Said N channel-type is two-and N conductive type semiconductor part 15 that face electrode member 50b adopts PN cylindricality zone 13 is as the drift region.More specifically, N channel-type vertical MOS transistor arrangements of components is arrived in element-formation zone 12.

As depicted in figs. 1 and 2, insulated trench 30 is formed each in the element-formation zone 11 and 12.Insulated trench 30 makes element- formation zone 11 and 12 mutually insulateds and isolates.In the present embodiment, insulated trench 30 is the grooves that adopt insulator (for example, dielectric) to fill.Surperficial 10b runs through Semiconductor substrate 10 to insulated trench 30 to the back from front surface 10a.The end portion of the insulated trench 30 on front surface 10a one side contacts with local oxidation of silicon (LOCOS) film 31.The other end of insulated trench 30 on surperficial 10b one side in back contacts with drain electrode 21.As above the insulated trench 30 of structure centers on each element- formation zone 11,12 separately, and single insulated trench 30 is between element- formation zone 11 and 12.

According to an example of the semiconductor equipment 100 of present embodiment, element-the formations zone 11 and 12 that is used for two-face electrode member 50 (that is, 50a and 50b) has the PN cylindricality regional 13 of the drift region that is used for said pair-face electrode member 50 (that is, 50a and 50b) respectively.Because PN cylindricality zone 13 provides the drift region by the way, thereby a plurality of two-face electrode member 50a and each among the 50b that are arranged in the single Semiconductor substrate 10 can have high-breakdown-voltage and low on-state resistance.

In addition, the element- formation zone 11 and 12 that is used for each pair- face electrode member 50a, 50b is through insulated trench 30 mutually insulateds and isolation around each element-formation zone 11,12.Owing to take to insulate isolated groove 30 as element isolation zone, thereby element isolation zone is narrowed down, and can reduce the area of element isolation zone, keep puncture voltage constant simultaneously.Therefore, can reduce the size of semiconductor equipment 100.In addition, with regard to the size that keeps constant semiconductor equipment 100, a kind of semiconductor equipment 100 that has higher integrated level than the situation that adopts PN junction to isolate can be provided.In addition, a kind of semiconductor equipment 100 with high-breakdown-voltage can be provided, the width or the area of its element isolation zone then remain unchanged.This is because the potential barrier of insulated trench 30 is greater than the potential barrier of PN junction isolation.

In correlation technique, adopt PN junction to isolate as element isolation zone.The charge balance that possibly cause in the PN cylindricality zone that applies of transient signal becomes unusually, in other words, possibly cause in the PNPN structure, locking taking place.Because the influence of above-mentioned ghost effect, maybe be in the source be short-circuited around electrode 18a or the 18b.For example, said transient signal is surge, noise, the interference sections of AC signal, for example dv/dt surge etc.

In the present embodiment, on the other hand, adopt insulated trench 30 as element isolation zone.Therefore, even when having applied such transient signal (for example, surge), the possibility that is short-circuited because of ghost effect also is lower than the situation of PN junction isolation as element isolation zone that adopt.Therefore, can have the structure that restriction is short-circuited because of transient signal when less size is provided for semiconductor equipment 100 according to the semiconductor equipment 100 of present embodiment.Said structure comprises two-face electrode member 50a, the 50b in a plurality of PN of having cylindricalitys zone 13.

In addition, each element- formation zone 11,12 has PN cylindricality zone 13 respectively.Therefore, as stated, can the P channel-type is two-face electrode member 50a be integrated into in the semi-conductive substrate 10 with N channel-type pair-face electrode member 50b.

In addition, source electrode 18a and 18b are respectively first electrodes of a plurality of couples- face electrode member 50a, 50b, and all are positioned on front surface 10a one side of Semiconductor substrate 10.Drain electrode 21 is second electrodes of a plurality of couples- face electrode member 50a, 50b, and is positioned on back surperficial 10b one side of Semiconductor substrate 10.Therefore; All be positioned at front surface 10a one side and one of surperficial 10b one side in back last time at the first all electrodes; And when second electrode is arranged on another of front surface 10a one side and surperficial 10b one side in back, can simplify the structure and the manufacture process of semiconductor equipment 100.

Semiconductor equipment 100 with above-mentioned structure is applicable to the synchronous commutation type switching circuit such as circuit shown in Figure 3.Fig. 3 shows the sketch map that can use according to an example of the synchronous commutation type switching circuit of the semiconductor equipment of present embodiment.Switching circuit shown in Figure 3 (that is step-down, (step-down) circuit) comprises the P channel MOS transistor element that is on high-end and is in the N-channel MOS transistor unit on the low side.In said switching circuit, the drain electrode of two elements is set to have identical electromotive force.In said switching circuit, will be positioned at the same semi-conductive substrate 10 that MOS transistor element on high-end and the low side is integrated into semiconductor equipment 100.More specifically, adopt above-mentioned P channel-type two-face electrode member 50a is as being positioned at the MOS transistor on high-end (that is the anode of high potential end or DC power supply).The MOS transistor that is positioned on high-end plays a part the primary switch element.Adopt the N channel-type two-face electrode member 50b is as being positioned at the MOS transistor on the low side (that is the negative terminal of low potential end or direct current).Be positioned at the element that MOS transistor on the low side plays a part to be used for synchronous rectification.Said switching circuit also comprises inductance 111 and smmothing capacitor 112.

Below with reference to the exemplary fabrication method that semiconductor equipment 100 is described to Fig. 7 according to Fig. 4 of present embodiment.Fig. 4 shows and the forming process of insulated trench and the relevant sectional view of before forming insulated trench, carrying out of process.The sectional view of the forming process of the part of Fig. 5 shows two-face electrode member, said part is positioned on front surface one side of Semiconductor substrate.Fig. 6 shows the sectional view of the thinning process of Semiconductor substrate.Fig. 7 shows the sectional view of other part of the two-face electrode member on the back surperficial side of Semiconductor substrate.

Preparation has the Semiconductor substrate 10c (being wafer) in PN cylindricality zone 13.Obtain Semiconductor substrate 10c through using (for example) trench fill method or multistage epitaxial growth method.For example, in the present embodiment, preparation has the single crystalline silicon substrate such as the N conduction type of N-conduction type.Form a plurality of grooves.Afterwards, adopt the epitaxial loayer have with the conduction type (for example, P conduction type) of the conductivity type opposite of Semiconductor substrate 10c to fill said groove.Thus, as shown in Figure 4, formed PN cylindricality zone 13, it comprises each other alternately the P conductive type semiconductor part 14 and N conductive type semiconductor part 15 of arranged adjacent.

After forming PN cylindricality zone 13; Form groove through the etching of (for example) anisotropic dry at Semiconductor substrate 10c from front surface 10a one side with desired depth; Thereby make said groove not extend to the back surperficial 10b of said Semiconductor substrate 10c; And make said insulated trench surround each element-formation zone 11,12, as shown in Figure 4.Adopt insulator (for example, silica) to fill said groove through thermal oxidation, chemical vapour deposition (CVD) etc., form insulated trench 30a thus.The front surface 10a of Semiconductor substrate 10c is corresponding to the front surface in the Semiconductor substrate 10 of wafer being carried out provide after the scribing.Should be noted that as shown in Figure 4ly, insulated trench 30a is in the non-state that runs through fully, that is to say, insulated trench 30a has the bottom that is within the Semiconductor substrate 10c, thereby does not penetrate Semiconductor substrate 10c fully.In the present embodiment, the degree of depth of insulated trench 30a equals the degree of depth in PN cylindricality zone 13 basically.Because the same degree of depth, in following process of Semiconductor substrate 10c being carried out attenuate, the end that becomes and might not only expose the end of insulated trench 30a but also expose PN cylindricality zone 13, the two all is positioned at surperficial 10b one side in back.

Afterwards, as shown in Figure 5, in corresponding elements- formation zone 11,12, form each the two-face electrode member 50a on front surface 10a one side that is in Semiconductor substrate 10c, the part of 50b.More specifically, in the present embodiment, through known method, from front surface 10a one side of Semiconductor substrate 10c form the P channel-type two-part of the part of face electrode member 50a and N channel-type pair-face electrode member 10b.Part to be formed comprises base region 16a and 16b, source area 17a and 17b, source electrode 18a and 18b, gate electrode 19a and 19b, distribution (line) (not shown), interlayer dielectric (not shown) and diaphragm (not shown).

Afterwards, as shown in Figure 6, with Semiconductor substrate 10c attenuate, that is, remove the back surface portion of Semiconductor substrate 10c through a kind of like this mode, be in up to exposure till the end of the insulated trench 30a on surperficial 10b one side in back.For example, the method for the back surface portion of removal Semiconductor substrate 10c is mechanical polishing (for example, chemico-mechanical polishing) or etching.For example, in the present embodiment, carry out mechanical polishing, afterwards, burnishing surface is carried out wet etching, to remove the affected layer that causes by polishing.The thickness of the Semiconductor substrate 10 that thus, the thickness of the Semiconductor substrate 10c with wafer form is become after wafer scribe, provide no better than.In addition, because attenuate, be in the non-insulated trench 30a that runs through state fully and become that surperficial 10b penetrates the groove of Semiconductor substrate 10c to the back from front surface 10a, it makes element-also isolation of formations zone 11 and 12 mutually insulateds.In addition, the PN cylindricality zone 13 back surperficial 10b from Semiconductor substrate 10c are come out.

Perhaps, can be only through etching with Semiconductor substrate 10c attenuate.In this case, because the difference of etching speed, surperficial 10b gives prominence to the insulator in the insulated trench (for example, silica) from the back.The ledge of said insulator can be column.In this case, can handle the insulator part that removal is column through the HF after (for example) etching.

After Semiconductor substrate 10c is carried out attenuate, inject implanted dopant in Semiconductor substrate 10c from the surperficial 10b in back through (for example) ion.Thus, as shown in Figure 7, formed respectively P channel-type and N channel-type two-face electrode member 50a, the drain region 20a of 50b, 20b.Afterwards, form public drain electrode 21, distribution (not shown), interlayer dielectric (not shown), diaphragm (not shown) etc.Afterwards, Semiconductor substrate 10c is diced into Semiconductor substrate 10, and semiconductor equipment 100 is provided.

According to the above-mentioned exemplary method of present embodiment, formation is in the non-insulated trench 30a that runs through state fully, forms the part of two- face electrode member 50a, 50b afterwards in the front surface 10a of Semiconductor substrate 10c one side.Perhaps, in the middle of the part that is in two-face electrode member 50a on front surface 10a one side of Semiconductor substrate 10c, 50b, can at first form the specific part that is positioned at Semiconductor substrate 10c.Said specific part comprises base region 16a, 16b and source area 17a, 17b.Afterwards, can form the two-face electrode member 50a that is on front surface 10a one side, the remainder (for example, source electrode 18a, 18b) of 50b.And, can form the element on the front surface 10a that will be positioned at said Semiconductor substrate.The element that will be positioned on front surface 10a one side comprises distribution, interlayer dielectric and diaphragm.

According to the above-mentioned exemplary constructions of first embodiment, surperficial 10b runs through Semiconductor substrate 10 to insulated trench 30 to the back from front surface 10a.In addition, said a plurality of two- face electrode member 50a, 50b have public drain electrode 21, in other words, a plurality of two- face electrode member 50a, 50b provide single output circuit.Thereby drain region 20a, 20b have electromotive force much at one.Perhaps, can construct semiconductor equipment as follows with public drain electrode 21.As shown in Figure 8, make a plurality of two- face electrode member 50a, 50b insulation and the insulated trench 30 of isolating can extend to the end portion in PN cylindricality zone 13 from the front surface 10a of Semiconductor substrate 10, said end portion is positioned at surperficial 10b one side in back.Under above-mentioned alternative case, owing to can reduce the degree of depth of insulated trench 30, thereby make to become and be more prone to.Fig. 8 shows the sectional view of the semiconductor equipment of revising according to first of first embodiment.Fig. 8 is corresponding to Fig. 2.

According to the above-mentioned exemplary constructions of first embodiment, base region 16a, 16b are arranged as the end portion that directly contacts PN cylindricality zone 13 in front surface 10a one side.Perhaps, in each element as shown in Figure 9-formation zone 11,12, can be respectively resilient coating 22a, 22b with conduction type identical with raceway groove be arranged between end and base region 16a, the 16b in the PN cylindricality zone 13 on front surface 10a one side.More specifically, the P channel-type two-face electrode member 50a in, can the resilient coating 22a with P conduction type be arranged between the end and base region 16a in the PN cylindricality zone 13 on front surface 10a one side.The N channel-type two-face electrode member 50b in, can the resilient coating 22b with N conduction type be arranged between the end and base region 16b in the PN cylindricality zone 13 on front surface 10a one side.In addition, the impurity concentration of resilient coating 22a, 22b can be more than or equal to the impurity concentration of P conductive type semiconductor part 14 and the impurity concentration of N conductive type semiconductor part 15, and smaller or equal to the impurity concentration of source area 17a, 17b.In above-mentioned constructive alternative, it is big that the current delivery path becomes between source electrode 18a, 18b and drain electrode 21.Therefore, can improve current transfer efficient.That is to say, can reduce the on state resistance of two-face electrode member 50a, 50b.Fig. 9 shows the sectional view according to the semiconductor equipment of second modification of first embodiment, and it is corresponding to Fig. 2.

According to an exemplary constructions of present embodiment, shown in Figure 10 A, the bar paten of gate electrode 19a, 19b is basically parallel to the bar paten in PN cylindricality zone 13.Figure 10 A shows the diagram of PN cylindricality zone 13 with respect to the layout of gate electrode 19a.Above-mentioned structure minimizes the current path with respect to the PN post, thereby can guarantee maximum current.Perhaps, the bar paten of each gate electrode 19a, 19b can be not parallel to the bar paten in PN cylindricality zone 13.For example, shown in Figure 10 B, the bar paten of each gate electrode 19a can be basically perpendicular to the bar paten in PN cylindricality zone 13.Above-mentioned constructive alternative does not need gate electrode 19a, 19b highly precisely to aim at respect to PN cylindricality regional 13.Thereby, can reduce the manufacturing cost of semiconductor equipment 100.Figure 10 A is the diagram that schematically shows according to the gate electrode of the present embodiment a kind of example layout regional with respect to the PN cylindricality.Figure 10 B is the diagram that schematically shows according to the gate electrode of the present embodiment another kind of example layout regional with respect to the PN cylindricality.

Said exemplary constructions according to present embodiment; PN cylindricality zone 13 is configured to, make a plurality of P conductive type semiconductor parts 14 and a plurality of N conductive type semiconductor parts 15 along the direction of the front surface 10a that is parallel to Semiconductor substrate according to the bar paten arranged alternate.Perhaps, for example, can do, make each have a plurality of N conductive type semiconductor parts 15 periodic arrangement in P conductive type semiconductor part 14 of shapes such as polygon, circle PN column region domain construction.Perhaps, for example, can do, make each have a plurality of P conductive type semiconductor parts 14 periodic arrangement in N conductive type semiconductor part 15 of shapes such as polygon, circle PN column region domain construction.The inventor discloses such structure in JP-A-2007-13003.

(second embodiment)

To Figure 13 second embodiment is described below with reference to Figure 11.Figure 11 is a sectional view, and it shows the forming process of the part of the two-face electrode member on front surface one side, and relevant with the process of before the described two-face electrode member part that is on front surface one side of formation, carrying out.Figure 12 shows the sectional view of the forming process of insulated trench.The sectional view of the forming process of the part of the two-face electrode member after Figure 13 shows on the surperficial side.

According to a kind of exemplary fabrication method of first embodiment, formation is in the insulated trench that does not run through state fully.Afterwards, with Semiconductor substrate 10c attenuate, surperficial 10b penetrates Semiconductor substrate 10c to the back from front surface 10a thereby make insulated trench 30 through the back surface portion of removing Semiconductor substrate 10c.Insulated trench 30 makes element- formation zone 11 and 12 mutually insulateds and isolates.In method, form the two-face electrode member 50a that is on front surface 10a one side, the part of 50b according to present embodiment.And, on front surface 10a, form dielectric film (that is front surface side dielectric film).Afterwards, through adopting said dielectric film as stopper, surperficial 10b one side forms insulated trench in Semiconductor substrate 10 from the back.

For example, can adopt interlayer dielectric (for example, bpsg film) as the dielectric film that in the forming process of insulated trench 30, plays a part stopper.Perhaps, can adopt LOCOS or sti oxide film on the surface portion of the front surface 10a that is formed at Semiconductor substrate 10 as dielectric film.In above-mentioned dielectric film, the LOCOS oxidation film can provide the selectivity of height between Semiconductor substrate and LOCOS oxidation film, and the sti oxide film also can provide the selectivity of height between Semiconductor substrate and sti oxide film.

Hereinafter the manufacturing approach according to the semiconductor equipment 100 of present embodiment will be described more particularly.Essential structure through the semiconductor equipment 100 made according to the method for present embodiment basic identical with according to first embodiment.Shown in figure 11, preparation has the Semiconductor substrate 10c (that is wafer) in PN cylindricality zone 13.Form each the two-face electrode member 50a on front surface 10a one side that is in Semiconductor substrate 10c, the part of 50b in the corresponding elements of a plurality of P in having PN cylindricality zone 13 and the semiconductor portions 14,15 of N conduction type-formation zone 11,12.More specifically, from front surface 10a one side of Semiconductor substrate 10c form the P channel-type two-part of the part of face electrode member and N channel-type pair-face electrode member 50b.Formed part comprises base region 16a and 16b, source area 17a and 17b, source electrode 18a and 18b, gate electrode 19a and 19b, distribution (not shown), LOCOS oxidation film 31, interlayer dielectric (not shown) and diaphragm (not shown).

Afterwards, from the back surperficial 10b one side with Semiconductor substrate 10c attenuate.Thus, shown in figure 11, PN cylindricality zone 13 will be exposed from back surperficial 10b one side of Semiconductor substrate 10c.For example, carry out attenuate through mechanical polishing (for example, chemico-mechanical polishing), etching etc.

Afterwards; Shown in figure 12; Through adopting LOCOS oxidation film 31 as stopper; Surperficial 10b one side forms groove at Semiconductor substrate 10c from the back through the anisotropic dry etching, thereby makes formed groove arrive at LOCOS oxidation film 31, and makes formed groove circumscribe element-formation zone 11,12.Form insulated trench 30 through adopting insulator (for example, silica) to fill said groove.Correspondingly, element- formation zone 11 and 12 is isolated and insulation each other.

After forming insulated trench 30; Shown in figure 13; Through ion inject to form corresponding P raceway groove two with the N raceway groove-face electrode member 50a, the drain region 20a of 50b, 20b, said ion injection mode does, implanted dopant in the back surperficial 10b one side direction Semiconductor substrate 10c.Afterwards, form public drain electrode 21, distribution (not shown), interlayer dielectric (not shown), diaphragm (not shown) etc.Afterwards, Semiconductor substrate 10c is diced into Semiconductor substrate 10, semiconductor equipment 100 is provided thus.

The method that realizes by the way according to present embodiment can provide semiconductor equipment 100.

A kind of exemplary fabrication method according to present embodiment; After formation comprises the dielectric film of LOCOS oxidation film 31 and interlayer dielectric 32; Surperficial 10b one side forms insulated trench 30 at Semiconductor substrate 10c from the back as stopper to adopt dielectric film (that is, the LOCOS oxidation film 31).Therefore; Run through Semiconductor substrate 10c and surrounded each element-formation zone at 11,12 o'clock in that insulated trench 30 is formed; To keep the connection between the zone of Semiconductor substrate such as the existence of the dielectric film of LOCOS oxidation film 31 and interlayer dielectric 32, the zone that is connected comprises element-formation zone 11 and 12.Thereby, avoided element- formation zone 11,12 being come off because of forming groove.

According to a kind of exemplary fabrication method of present embodiment, after with Semiconductor substrate 10c attenuate, form insulated trench 30.Therefore, becoming is easy in Semiconductor substrate 10c, form groove, and is easy to adopt insulator to fill said groove.In addition, although as stated, insulated trench 30 has the insulator film that is in the groove, need not to carry out the process of the surface of dielectric film in the groove and the common existence of Semiconductor substrate 10c being carried out attenuate.If carry out attenuate through CMP, the stress that brings owing to polishing so possibly concentrate on the dielectric film and the border between the Semiconductor substrate 10c in the groove.Thereby, can avoid in Semiconductor substrate 10c, forming crackle.In addition, if carried out attenuate, can avoid so because of existing the difference of etching speed to form step between dielectric film in the groove and the Semiconductor substrate 10c through etching.That is to say, with the even attenuate of back surperficial 10b that makes Semiconductor substrate 10c.

According to the above-mentioned exemplary method of present embodiment, after forming insulated trench 30, on the surperficial 10b in back, formed the part of two- face electrode member 50a, 50b, said part comprises drain electrode 21b.Perhaps, the two-face electrode member 50a that is on surperficial 10b one side in back, central drain region 20a, the 20b of part of 50b can be formed on, insulated trench 30 can be formed afterwards.Afterwards, can form public drain electrode 21.

According to the above-mentioned exemplary method of present embodiment, on surperficial 10b one side in back, form the part of two- face electrode member 50a, 50b after, carry out process, to reduce the thickness of Semiconductor substrate 10c with Semiconductor substrate 10c attenuate.Perhaps, can not carry out the process of Semiconductor substrate 10c being carried out attenuate according to the thickness of Semiconductor substrate 10c.

(the 3rd embodiment)

Below with reference to Figure 14 the 3rd embodiment is described.Figure 14 shows the sectional view according to the semiconductor equipment of present embodiment.According to Figure 14 of present embodiment corresponding to Fig. 2 according to first embodiment.

According to first embodiment, a plurality of two-electric leakage of face electrode member 50a, 50b public electrode 21 very.According to present embodiment, shown in figure 14, make the P channel-type two-drain electrode of face electrode member 50a and N channel-type be two-the drain electrode 21b electricity of face electrode member 50b isolates or separation.Insulated trench 30 around each element- formation zone 11 and 12 runs through Semiconductor substrate 10 from front surface 10a to back surperficial 10b.Make the P channel-type two-the source electrode 18a of face electrode member 50a and N channel-type be two-the source electrode 18b electricity of face electrode member 50b isolates or separation.That is to say, make be used for the P channel-type two-pair of electrodes of face electrode member 50a be used for the N channel-type two-the pair of electrodes electricity of face electrode member 50b isolates.

Because said structure, can individual drive or operation two-face electrode member 50a, 50b.That is to say that said semiconductor equipment has the multichannel structure.Various circuit can be provided.

Manufacturing approach according to first or second embodiment can provide the semiconductor equipment with above-mentioned structure 100 according to present embodiment.For example, when the back surperficial 10b from Semiconductor substrate 10c forms insulated trench 30, after forming drain electrode 21a and 21b, can form insulated trench 30.

(the 4th embodiment)

To Figure 17 the 4th embodiment be described with reference to Figure 15 hereinafter.Figure 15 shows the sectional view according to the semiconductor equipment of present embodiment.Figure 15 is corresponding to the Fig. 2 according to first embodiment.Figure 16 shows the curve chart of the relation between leakage current (Id) and the drain electrode-source voltage (Vds).Figure 16 shows the leakage current (i) that is on the logarithmic scale.Figure 17 A is each diagram that shows the Potential Distributing in the semiconductor equipment under the puncture situation to Figure 17 C.Figure 17 A shows the situation according to the semiconductor equipment of present embodiment.Figure 17 B and Figure 17 C show the situation according to the semiconductor equipment of first and second comparison example respectively.Except following difference, according to the semiconductor equipment of first and second comparison example shown in Figure 17 B and Figure 17 C with basic identical according to the semiconductor equipment of present embodiment.In first comparison example shown in Figure 17 B, the insulated trench that is in the both sides in element-formation zone all is electrically connected with source electrode (that is first electrode).In second comparison example shown in Figure 17 C: the groove in the both sides that are arranged in element-formation zone, one and source electrode (that is, first electrode) electrical connection, another and drain electrode (that is second electrode) are electrically connected.In Figure 17 C, show one at right-hand side, side shows another leftward.

According to the foregoing description, insulated trench 30 is configured to, adopt insulator (for example, dielectric) to fill said groove.According to present embodiment, insulated trench 30 has different structures.For example, shown in figure 15, semiconductor equipment 100 has insulated trench 30, and it is constructed to, and trench insulating film 30b is positioned on the trench wall of insulated trench 30, and adopts conductor 30c to fill said groove via trench insulating film 30b.

Owing to adopt conductor 30c to fill groove via trench insulating film 30b, thereby the capacitor parasitics of two series connection be provided between adjacent component forming region 11 and 12.In said two capacitor parasiticses each has the dielectric that is provided by trench insulating film 30b.The total capacitance of above-mentioned structure with parasitic capacitance is less than the total capacitance of the structure with the single capacitor parasitics that is provided by the single insulated trench of having filled insulator (for example, dielectric).Thereby, can make response voltage fluctuation and the displacement current that flows is reduced to minimum.In addition, when transient signal was propagated between capacitor parasitics, said transient signal will be because of its energy of resistance loss.Therefore, can reduce or limit the propagation of transient signal (for example, surge) effectively according to the semiconductor equipment of present embodiment.

In addition, according to exemplary constructions shown in Figure 15, conductor 30c is electrically connected with drain electrode 21, thereby makes conductor 30c and drain electrode 201 have essentially identical electromotive force.Can the electric charge of parasitic capacitance stored be discharged in drain electrode 21 1 sides.Therefore, can more effectively limit propagation such as the transient signal of surge etc.In above-mentioned exemplary constructions, conductor 30c is electrically connected with drain electrode 21.Perhaps, conductor 30c is electrically connected with source electrode 18a, 18b.Perhaps, conductor 30c is electrically connected with element on front surface 10a one side that is positioned at Semiconductor substrate 10.For example, said element is the distribution (for example, GND pattern) with predetermined potential.That is to say that the structure that can be fixed as predetermined value by the electromotive force with conductor 30c more effectively limits the propagation such as the transient signal of surge etc.

Make the fixing situation of electromotive force of conductor 30c compare with the element on being positioned at front surface 10a one side, shown in figure 15, when conductor 30c was connected with drain electrode 21, said semiconductor equipment can have the structure of simplification.This is because electrode, distribution etc. are concentrated in front surface 10a one side.

In addition, the situation that equals the electromotive force of source electrode 18a, 18b (that is, first electrode) with the electromotive force of conductor 30c is basically compared, and can improve the puncture voltage of two-face electrode member 50a, 50b.The inventor has disclosed above-mentioned advantage based on numerical simulation.Shown in the solid line of Figure 16, said numerical simulation shows, has guaranteed the puncture voltage of 189.5V according to the semiconductor equipment 100 of present embodiment.In semiconductor equipment 100, the conductor 30c and the drain electrode 21 (that is second electrode) of the corresponding insulated trench of the both sides that are positioned at element-formation zone 11 are connected.Shown in the dotted line of Figure 16, numerical simulation shows to have the puncture voltage of 139.8V according to the semiconductor equipment of first comparison example.According to first comparison example, be positioned at the conductor 30c and source electrode 18 (that is first electrode) connection of the corresponding insulated trench on the both sides in element-formation zone 11.Shown in the chain-dotted line among Figure 16 (dashed-tow dotted line), numerical simulation shows to have the puncture voltage of 140.3V according to the semiconductor equipment of second comparison example.According to second comparison example, of conductor 30c of insulated trench who is arranged in the both sides of component forming region 11 is connected with source electrode 18, and another among the said conductor 30c is connected with drain electrode 21.

According to first and second comparison example 1 and 2 shown in Figure 17 B and Figure 17 C, equipotential surface bends around insulated trench 30, thereby has caused high electrical potential gradient and high electric field strength, and wherein insulated trench 30 has the conductor 30c that is connected with source electrode 18.Be lower than the intensity of the electric field with regard to first or second comparison example 1 or 2 with regard to the intensity of the electric field with regard to the semiconductor equipment 100 of present embodiment.Said simulation shows, the electrical connection between the conductor 30c of insulated trench 30 and the drain electrode 21 (that is second electrode) has improved the puncture voltage of two- face electrode member 50a, 50b.

The semiconductor equipment 100 that can have above-mentioned structure through the method manufacturing shown in first or second embodiment.To the process that form insulated trench 30 from back surperficial 10b at Semiconductor substrate 10c be described with reference to Figure 18 and Figure 19 hereinafter.Figure 18 be with the trench wall that is positioned at groove on the forming process of dielectric film, and with the relevant sectional view of before forming said dielectric film, carrying out of process.Figure 18 shows the sectional view of the process that adopts conductor filled groove.

Adopt with the similar mode shown in second embodiment and form the part on front surface one side, carry out thinning process afterwards as required.Afterwards, shown in figure 18, surperficial 10b one side is injected into impurity in the Semiconductor substrate 10c from the back through the injection of (for example) ion.Thus, formed corresponding P raceway groove and N channel-type two-face electrode member 50a, the drain region 20a of 50b, 20b.Afterwards,, formed groove 30d through the anisotropic dry etching, thereby made groove 30d extend to LOCOS oxidation film 31 through adopting LOCOS oxidation film 31 as stopper, and around element-formation zone 11,12.On the trench wall of groove 30d, form the trench insulating film 30b that processes by (for example) silica through thermal oxidation, CVD etc.In said process, be not to adopt trench insulating film 30b complete filling groove 30d, but have cavity along the central shaft of groove 30d, shown in figure 18.

Adopt the cavity of conductive member 23 filling groove 30d, and conductive member 23 is deposited on the back surperficial 10b of Semiconductor substrate 10c.Formed insulated trench 30 by the way, and formed the drain electrode 21 that provides by conductive member 23 with the conductive member 23 that is positioned at groove.Semiconductor equipment 100 is provided as conductor 30c and drain electrode 21 with mutual electrical connection.

According to the above-mentioned example procedure of present embodiment, after forming drain region 20a, 20b, form groove 30d and trench insulating film 30b.Perhaps, can before forming drain region 20a, 20b, form groove 30d and trench insulating film 30b.

Perhaps, can form insulated trench 30 from front surface 10a one side at Semiconductor substrate 10c according to similar mode with the mode shown in first embodiment.Under above-mentioned alternative case, can form insulated trench 30a: on the trench wall of groove 30d, form trench insulating film 30b, thereby make groove 30d have cavity through following process; Depositing electrode conductive member 23 in said cavity.Formed insulated trench 30a is in and non-ly runs through under the state fully, and has the conductor 30c that provides through the conductive member in the groove 30d 23.After having formed insulated trench 30a, Semiconductor substrate 10c is carried out attenuate, till exposing conductor 30c.Afterwards, form the two-face electrode member 50a that is on surperficial 10b one side in back, the part of 50b, thereby semiconductor equipment 100 is provided as conductor 30c and the drain electrode 21 with mutual electrical connection.

According to the above-mentioned example procedure of present embodiment, the conductor 30c of insulated trench 30 is electrically connected at back surperficial 10b one side and the drain electrode 21 (that is second electrode) of Semiconductor substrate 10.Perhaps, shown in figure 20, can also on the front surface of Semiconductor substrate 10, form conductor 30c, and conductor 30c is electrically connected with distribution 24, wherein, said distribution 24 is isolated with source electrode 18a, 18b electricity.Under above-mentioned situation, can be through the electromotive force of distribution 24 with conductor 30c monitoring drain electrode.Owing to can make tester contact the electromotive force of measuring drain electrode 21, thereby can the simplified measurement device through (for example) with the pad of distribution.Figure 20 shows the sectional view according to the modification instance of the semiconductor equipment of present embodiment.Figure 20 is corresponding to Fig. 2.

In order between the conductor 30c and the distribution 24 that are on front surface 10a one side of Semiconductor substrate 10, electrical connection to be provided, can adopt following manufacture process.Form groove 30d.On the trench wall of groove 30d, form trench insulating film 30b, make in groove, to keep cavity.Afterwards, through adopting distribution 24, adopt anisotropic etching (for example ion beam milling) to remove the trench insulating film 30b of the bottom that is positioned at groove 30d and the part of LOCOS oxidation film 31 as stopper.The bottom of groove 30d is positioned on front surface 10a one side.Afterwards, adopt the cavity of conductive member 23 filling groove 30d.

According to modification instance shown in Figure 20, can through with front surface 10a one side of Semiconductor substrate 10 on the electromotive force of the distribution 24 monitoring drain electrodes 21 that are connected of conductor 30c.Perhaps, conductor 30c is electrically connected through distribution 24 with other element, described other element be positioned on the Semiconductor substrate 10 be different from that drain electrode is electrically connected with target conductor 30c pair-element of face electrode member 50a, 50b.In above-mentioned constructive alternative, can improve and comprise the function that is in the circuit of a plurality of elements in the semi-conductive substrate 10.For example, said function is based on the FEEDBACK CONTROL of the electromotive force of drain electrode 21.

(the 5th embodiment)

Below with reference to Figure 21 and Figure 22 the 5th embodiment is described.Figure 21 shows the sectional view according to the semiconductor equipment of present embodiment.Figure 21 is corresponding to the Fig. 2 according to first embodiment.Figure 22 A and Figure 22 B show the plane graph according to the semiconductor equipment of present embodiment.

According to the foregoing description, make single insulated trench 30 between element-formation zone 11 and 12.In the present embodiment, a plurality of insulated trenchs 30 are between element-formation zone 11 and 12.For example, shown in figure 22, two insulated trenchs 30 are arranged between element-formation zone 11 and 12.In two insulated trenchs 30 each is configured to, adopts insulator (for example, dielectric) filling groove.Zone between two insulated trenchs 30 is the interelement zone 33 between element-formation zone 11 and 12.Interelement zone 33 comprises the PN cylindricality zone with a plurality of P conduction type parts and a plurality of N conduction type part.Interelement zone 33 is electrically connected with drain electrode 21.The electromotive force in interelement zone 33 equals the electromotive force of drain electrode 21 basically.

Owing between element- formation zone 11 and 12, be provided with a plurality of insulated trenchs 30, thereby between element- formation zone 11 and 12, two or more series connection capacitor parasiticses be provided.Each capacitor parasitics has the dielectric that is provided by the insulator in the groove.The total capacitance of above-mentioned structure with two or more capacitor parasiticses is less than the total capacitance of the structure with the single capacitor parasitics that is provided by the single insulated trench that is filled with insulator (for example, dielectric).Thereby, can make response voltage fluctuation and the displacement current that flows is reduced to minimum.When transient signal was perhaps propagated between capacitor parasitics through capacitor parasitics, transient signal will be because of the resistance loss of energy in interelement zone 33.Therefore, the semiconductor equipment according to present embodiment can reduce or limit transient signal (for example, surge) propagation effectively.

Shown in figure 21, because interelement zone 33 has PN cylindricality zone 13, thereby in interelement zone 33, provide the employing depletion layer as dielectric capacitor parasitics.That is to say that the capacitor parasitics that between adjacent element- formation zone 11 and 12, provides can have less capacitance.Therefore, can more effectively limit propagation such as the transient signal of surge etc.Perhaps, interelement zone 33 can comprise the semiconductor regions with (for example) N conduction type or N+ conduction type, rather than PN cylindricality zone 13.

In addition, shown in figure 21, interelement zone 33 is electrically connected with drain electrode 21.Can the electric charge of capacitor parasitics stored be discharged in drain electrode 21 1 sides.Therefore, can more effectively limit propagation such as the transient signal of surge etc.In above-mentioned exemplary constructions, interelement zone 33 is connected with drain electrode 21.Perhaps, interelement zone 33 is connected with source electrode 18a, 18b.Perhaps, interelement zone 33 is electrically connected with element on front surface 10a one side that is positioned at Semiconductor substrate 10.For example, said element is the distribution (for example, GND pattern) with predetermined potential.That is to say, when interelement zone 33 is configured to have the electromotive force of the predetermined value of being fixed to, can more effectively limit propagation such as the transient signal of surge etc.

Compare with the situation that the element on being positioned at front surface 10a one side has been fixed the electromotive force of conductor 30c, when shown in figure 21, when interelement zone 33 was connected with drain electrode 21, said semiconductor equipment can have the structure of simplification.This is because electrode, distribution etc. concentrates on front surface 10a one side of Semiconductor substrate 10.

Figure 22 A and Figure 22 B show the example of a plurality of insulated trenchs between adjacent elements-formation zone 11 and 12.Particularly, in the example shown in Figure 22 A, a plurality of (that is, two) insulated trench 30 is only in the zone between component forming region 11 and 12.Single insulated trench 30 is in the zone except the zone between element- formation zone 11 and 12 in element-formation zone 11 and 12.In above-mentioned structure, only between element- formation zone 11 and 12, provide the interelement zone 33 (that is, sandwiching the zone).When the size of semiconductor equipment 100 kept constant, element- formation zone 11,12 can occupy big space.Perhaps, semiconductor equipment 100 can have littler size.In another exemplary constructions shown in Figure 22 B, each in single insulated trench 30 embracing elements- formation zone 11 and 12, the integral body in another single insulated trench 30 embracing elements-formation zone 11 and 12.In above-mentioned structure, surround each element-forms whole circumference of regional 11,12 by a plurality of insulated trenchs 30 and interelement zone 33.Can limit the transient signal propagation in zone to the periphery.In addition, a plurality of insulated trenchs 30 can improve puncture voltage.

According to the exemplary constructions of present embodiment, be configured to adopt insulator (that is dielectric) to fill each groove a plurality of insulated trenchs 30 in adjacent element-formation zone 11, between 12.Perhaps,, can insulated trench 30 be configured to, make dielectric film be positioned at the trench wall of groove, and adopt conductor filled said groove via said dielectric film with similar according to the situation of the 4th embodiment.

According to a kind of exemplary constructions of present embodiment, two insulated trenchs 30 are between adjacent element-formation zone 11 and 12.Perhaps, the quantity of insulated trench 30 can be above two.Perhaps, the quantity of the insulated trench relevant with element-formation zone 11 can be different from the quantity of the insulated trench of being correlated with element-formations regional 12.For example, shown in figure 23, adopt three insulated trench 30 embracing elements-formation zone 11, element-formation zone 12 is then mainly surrounded by two insulated trenchs 30.Three insulated trenchs 30 are arranged between adjacent element-formation zone 11 and 12.According to above-mentioned structure, can two- face electrode member 50a, 50b with different puncture voltages be integrated in the single Semiconductor substrate 10.Figure 23 shows the plane graph according to the modification instance of the semiconductor equipment of present embodiment.

(modification embodiment)

Can pass through modified in various manners the foregoing description.The example of revising embodiment will be described below.

According to the foregoing description, Semiconductor substrate 10,10c are processed by silicon.Perhaps, Semiconductor substrate 10,10c can be made up of other semi-conducting material such as carborundum (SiC).

According to the foregoing description, adopt the vertical MOS transistor element as the example that utilizes PN cylindricality zone 13 as the two-face electrode member 50 (50a, 50b) of drift region.Perhaps, can adopt another active element as two-face electrode member 50 (50a, 50b).For example, said another active element is igbt (IGBT).Perhaps, except two-face electrode member 50 (50a, 50b), can other arrangements of elements be arrived with in the semi-conductive substrate 10.For example, said other element is diode, resistance etc., and wherein each is configured to, and the pair of electrodes of said other element is laid respectively on front surface 10a one side and surperficial 10b one side in back, and electric current flows between said pair of electrodes.Under above-mentioned situation, can said element (for example, diode) be configured to have or not have a PN cylindricality zone 13.

According to the foregoing description, two-face electrode member 50a, the gate electrode 19a of 50b, 19b have groove structure.Perhaps, the gate electrode of two- face electrode member 50a, 50b can have planar structure or sunk structure.

According to the foregoing description, semiconductor equipment 100 comprises two two-face electrode members 50, and each two-face electrode member 50 adopts PN cylindricality zone 13 as the drift region.Perhaps, semiconductor equipment 100 can comprise a plurality of pairs-face electrode member 50, and for example, semiconductor equipment 100 can comprise plural pair-face electrode member 50.

According to the foregoing description, through the P channel-type two-face electrode member 50a and N channel-type pair-face electrode member 50b provides said a plurality of (that is, two) two-face electrode member 50.Perhaps, said a plurality of two-face electrode member 50 can be a plurality of P channel-types two-face electrode member 50a, also can be a plurality of N channel-types two-face electrode member 50b.For example, shown in figure 24, semiconductor equipment 100 comprise two N channel-types two-face electrode member 50b (that is N channel-type vertical MOS transistor element) as a plurality of two-face electrode member 50.Figure 24 shows the sectional view according to the semiconductor equipment of revising embodiment.The drain electrode 21b of semiconductor equipment 100 shown in Figure 24 isolates each other and separates.Perhaps, can drain electrode 21b be integrated in the public electrode.Perhaps, semiconductor equipment 100 can comprise a plurality of P channel-types two-face electrode member 50a and a plurality of two-face electrode member 50b.

According to the foregoing description, semiconductor equipment comprises that a plurality of pairs-face electrode member 50 is as the element that is arranged in the Semiconductor substrate 10.Said semiconductor equipment can also comprise the single-side electrode element, and it is positioned at and the element that is used for two-face electrode member 50-different zone, formation zone.Said single-side electrode element has pair of electrodes, and two electrodes all are positioned on surperficial 10b one side of front surface 10a one side or back of Semiconductor substrate 10.In said single-side electrode element, electric current flows between described pair of electrodes.For example, shown in figure 25, semiconductor equipment 100 comprise above-mentioned a plurality of two-face electrode member 50 (50a, 50b), also comprise single-side electrode element 51 (51a, 51b).(51a, source electrode 51b) and drain electrode are positioned on front surface 10a one side of Semiconductor substrate 10 each single-side electrode element 51.Semiconductor equipment 100 shown in Figure 25 has and is used for corresponding single-side electrode element 51 (51a, element 51b)-formation zone 27,28.Single-side electrode element 51a is the lateral type mos transistor element as P channel-type single-side electrode element.Single-side electrode element 51b is the lateral type mos transistor element as N channel-type single-side electrode element.In such structure, two-face electrode member 50 is integrated in the single Semiconductor substrate 10 with the single-side electrode element.Semiconductor equipment with integral control circuit or integrated protective circuit (that is, mixing IC or compound IC) can be provided.In addition, shown in figure 25, a plurality of (for example, two) insulated trench 30 two-face electrode member 50 and single-side electrode element 51 respectively residing adjacent element-formations regional 12, between 27.Because being used for the two-face electrode member 50 of power application and the electrical potential difference between the single-side electrode element 51 possibly be big electrical potential difference, thereby can preferably make a plurality of insulated trenchs 30 between element-formation zone 12 and 27.Said a plurality of insulated trench can be divided voltage or electrical potential difference.Figure 25 shows the sectional view according to the semiconductor equipment of revising embodiment.Said single-side electrode element 51 can be a lateral type mos transistor.Perhaps, said single-side electrode element 51 can be bipolar transistor elements, complementary MOS transistor element, diode, capacitor, resistance, wiring etc.

Perhaps, shown in figure 26, semiconductor equipment 100 also comprises area with high mercury 29a, the 29b that is in respectively in element-formation zone 11,12.Each area with high mercury 29a, 29b are in the end in PN cylindricality zone 13 along the laminating direction in PN cylindricality zone 13.On the PN cylindricality zone of area with high mercury 29a is positioned at the P channel-type two-face electrode member 50a, and be positioned at that contact with insulated trench 30 and as the P channel-type two-the P conductive type semiconductor part 14 of the regional end of the PN cylindricality of face electrode member 50a on.Area with high mercury 29a is positioned on front surface 10a one side, and is positioned at just under the LOCOS oxidation film 31.Area with high mercury 29a has P conduction type, the for example impurity range of P+ conduction type.Area with high mercury 29a is formed along insulated trench 30 embracing elements-formation zone 11.On the PN cylindricality zone of area with high mercury 29b is positioned at the P channel-type two-face electrode member 50b, and be positioned at that contact with insulated trench 30 and as the N channel-type two-the N conductive type semiconductor part 15 of the regional end of the PN cylindricality of face electrode member 50b on.Area with high mercury 29b is positioned on front surface 10a one side, and is positioned at just under the LOCOS oxidation film 31.Area with high mercury 29a has N conduction type, the for example impurity range of N+ conduction type.Area with high mercury 29b is formed along insulated trench 30 embracing elements-formation zone 12.Each area with high mercury 29a, 29b have the contact member (not shown), and are electrically connected with electrode special through said contact member.Figure 26 shows the sectional view according to the semiconductor equipment of revising embodiment.

According to the foregoing description, the two all is positioned at the source electrode 18a of corresponding two- face electrode member 50a, 50b, 18b (that is first electrode) on front surface 10a one side of Semiconductor substrate 10.(21a 21b) or as the drain electrode of second electrode all is positioned on back surperficial 10b one side of Semiconductor substrate 10 to be used for the public electrode 21 of each pair-face electrode member 50a, 50b.Perhaps, one of source electrode 18a, 18b can be positioned on front surface 10a one side of Semiconductor substrate 10, and among the source electrode 18a, 18b another can be positioned on surperficial 10b one side in back.In addition, one of drain electrode 21a, 21b can be positioned on front surface 10a one side of Semiconductor substrate 10, and another among drain electrode 21a, the 21b can be positioned on surperficial 10b one side in back.

According to the foregoing description, insulated trench 30 is configured to, adopt insulator to fill said groove, perhaps adopt conductor 30c to fill said groove, thereby make it to be positioned within the trench insulating film 30b.Perhaps, can insulated trench 30 be configured to, the inside that makes said groove is hollow, perhaps is filled with air.When a plurality of insulated trenchs 30 were positioned at Semiconductor substrate 10, an insulated trench 30 can have one of above-mentioned three kinds of structures, and other insulated trench 30 can have other structure in above-mentioned three kinds of structures.The a plurality of insulated trenchs 30 that are positioned at semi-conductive substrate 10 can have various structure.

According to the foregoing description, drain region 20a, 20b with respect to the thickness direction of Semiconductor substrate 10 between PN cylindricality zone 13 and drain electrode 21.Perhaps, drain region 20a, 20b can comprise buffering area.Buffering area is between drain region 20a, 20b, and PN cylindricality zone (for example, P conductive type semiconductor part 14) has and drain region 20a, conduction type that 20b is identical, and has than drain region 20a, impurity concentration that 20b is low.

According to the first aspect of said example embodiment, a kind of semiconductor equipment is provided.Said semiconductor equipment comprises the Semiconductor substrate 10 that has each other relative first surface 10a and second surface 10b and have a plurality of elements-formation zone 11,12,27.Said semiconductor equipment also comprises the insulated trench 30 that centers on each in said a plurality of elements-formation zone 11,12,27,28 and make said a plurality of element-formation zone 11,12,27,28 mutually insulateds and isolation.Said semiconductor equipment also comprises a plurality of elements 50,50a, 50b, 51,51a, the 51b that lays respectively in a plurality of elements-formation zone 11,12,27,28.Said a plurality of element 50,50a, 50b, 51,51a, 51b comprise two two-face electrode members 50,50a, 50b at least.Each two-face electrode member 50,50a, 50b comprise the first electrode 18a, the 18b on one of the first surface 10a that is positioned at Semiconductor substrate 10 and second surface 10b.Each two-face electrode member 50,50a, 50b also comprise second electrode 21,21a, the 21b on another person of the first surface 10a that is arranged in Semiconductor substrate 10 and second surface 10b.Each two-face electrode member 50,50a, 50b are configured to, electric current is flowed between the first electrode 18a, 18b and second electrode 21,21a, 21b.Each two-face electrode member 50,50a, 50b also comprise PN cylindricality zone 13, and it is positioned at Semiconductor substrate 10, and comprise a plurality of P conductive type semiconductor parts 14 and a plurality of N conductive type semiconductor parts 15.Said a plurality of P conductive type semiconductor part 14 and the direction adjacent and arranged alternate of said a plurality of N conductive type semiconductor parts 15 edges perpendicular to the thickness direction of Semiconductor substrate 10.Each two-face electrode member 50,50a, 50b also comprise the drift region that is provided by one of a plurality of P conductive type semiconductor parts 14 in PN cylindricality zone 13 and a plurality of N conductive type semiconductor parts 15.

According to said semiconductor equipment, each of element- formations zone 11 and 12 that is used for two- face electrode member 50,50a, 50b comprises the PN cylindricality regional 13 that is in the Semiconductor substrate 10.The drift region of each two- face electrode member 50,50a, 50b is provided through PN cylindricality zone 13 in addition.Therefore, be arranged in among a plurality of two-face electrode member 50 in the semi-conductive substrate 10,50a, the 50b each and can have high-breakdown-voltage and lower passband resistance.

In addition, each among a plurality of pairs-face electrode member 50 of insulated trench 30 encirclements, 50a, the 50b.Each a plurality of two- face electrode member 50,50a, 50b with PN cylindricality zone 13 isolates and insulation through insulated trench 30 each other.Therefore, under the identical situation of puncture voltage, and provide the situation of element isolation zone to compare at interval through PN junction, said semiconductor equipment can have the element isolation zone that width is littler or area is littler.Therefore, can provide size littler semiconductor equipment.Perhaps, under measure-alike situation, can provide integrated level higher semiconductor equipment.In addition, can reduce manufacturing cost.Have at element isolation zone under the situation of identical size or area identical, and provide the situation of element isolation zone to compare at interval, the semiconductor equipment with higher puncture voltage can also be provided through PN junction.

In addition, owing to adopt insulated trench 30 as element isolation zone, thereby, if applied transient signal, can more effectively limit or reduce the generation of the short circuit that causes by ghost effect so.Said transient signal possibly be the redundance of surge (for example, dv/dt surge) or AC signal.

By the way; Can provide a kind of and comprise that each all has the semiconductor equipment of the two-face electrode member 50 in PN cylindricality zone 13,50a, 50b; Said semiconductor equipment can have littler size, and can limit the generation of the short circuit that is caused by transient signal.

Said two- face electrode member 50,50a, 50b can be active elements; It has on one of a pair of first and second surperficial 10a that lay respectively at Semiconductor substrate 10,10b electrode (promptly; The first electrode 18a, 18b and second electrode 21,21a, 21b); And have the drift region that is provided by PN cylindricality zone 13, it also is constructed to make electric current between the described first and second electrode 18a, 18b, 21,21a, 21b, to flow in addition.Two-face electrode member 50 like this, 50a, 50b can be the vertical-type transistor units.More specifically, two- face electrode member 50,50a, 50b can be the vertical MOS transistor elements.Perhaps, have the first electrode 18a on one of the first and second surperficial 10a and the 10b of Semiconductor substrate of laying respectively at 10,18b and second electrode 21,21a, two-face electrode member 50 of 21b, 50a, 50b can be diode or resistor.Said diode or resistor can comprise PN cylindricality zone 13.

Can said semiconductor equipment be configured to: at least two two- face electrode members 50,50a, 50b comprise at least two P channel-types two- face electrode member 50,50a and at least two N channel-types be two-one of face electrode member 50,50b; By a plurality of P conductive type semiconductor parts 14 in PN cylindricality zone 13 provide each P channel-type two-drift region of face electrode member 50,50a; By a plurality of N conductive type semiconductor parts 15 in PN cylindricality zone 13 provide each N channel-type two-drift region of face electrode member 50,50b.

According to above-mentioned structure, a plurality of two- face electrode member 50,50a, the 50b that can set up the raceway groove with identical conduction type have been integrated in the Semiconductor substrate 10.In such structure, can only integrated a plurality of N channel-types two- face electrode member 50,50b, also can only integrated a plurality of P channel-types two-face electrode member 50,50a.Perhaps, can a plurality of N channel-types are two- face electrode member 50,50b and a plurality of P channel-type be two- face electrode member 50,50a be integrated into in the semi-conductive substrate 10.

Can said semiconductor equipment be configured to: at least two two- face electrode members 50,50a, 50b comprise at least one P channel-type two- face electrode member 50,50a and at least one N channel-type be two- face electrode member 50,50b; By said a plurality of P conductive type semiconductor parts 14 provide the P channel-type two-drift region of face electrode member 50,50a; By a plurality of N conductive type semiconductor parts 15 in PN cylindricality zone 13 provide the N channel-type two-drift region of face electrode member 50,50b.

According to above-mentioned structure, as stated, each element- formation zone 11,12 that is used for two- face electrode member 50,50a, 50b has a plurality of P conductive type semiconductor parts 14 and N conductive type semiconductor part 15.Therefore, can the N channel-type is two- face electrode member 50,50b and P channel-type be two- face electrode member 50,50a be integrated into in the semi-conductive substrate 10.

Can said semiconductor equipment be configured to: each two- face electrode member 50,50a, 50b have channel region 16a, 16b; Channel region 16a, 16b are positioned at Semiconductor substrate 10; Channel region 16a, 16b are between the PN of Semiconductor substrate 10 cylindricality zone 13 and first surface 10a; The conductivity type opposite of the drift region of the channel region 16a of each two- face electrode member 50,50a, 50b, the conduction type of 16b and two- face electrode member 50,50a, 50b; The first electrode 18a of each two- face electrode member 50,50a, 50b, 18b, 18a, 18b and second electrode 21,21a, 21b lay respectively on the first surface 10a and second surface 10b of Semiconductor substrate 10.According to above-mentioned structure, can simplify the structure of semiconductor equipment, and can simplify manufacture process.

Can said semiconductor equipment be configured to; Corresponding second electrode 21,21a, the 21b of at least two two- face electrode members 50,50a, 50b are integrated in the public electrode 21, thereby make corresponding second electrode 21,21a, the 21b of at least two two- face electrode members 50,50a, 50b have identical electromotive force.

Perhaps, can said semiconductor equipment be configured to: the first electrode 18a, the isolation of 18b electricity of another among the first electrode 18a of one of at least two two- face electrode members 50,50a, 50b, 18b and said at least two two- face electrode members 50,50a, the 50b; The second electrode 21a, the 21b electricity of another among the second electrode 21a of one of said at least two two- face electrode members 50,50a, 50b, 21b and said at least two two- face electrode members 50,50a, the 50b are isolated.According to above-mentioned structure, can provide a plurality of two- face electrode member 50,50a, the 50b of many raceway groove structures to drive at least one said a plurality of pairs- face electrode member 50,50a, the 50b separately or independently from another.Therefore, various circuit can be provided.

Can said semiconductor equipment be configured to, make insulated trench 30 run through Semiconductor substrate 10 to second surface 10b from first surface 10a.According to above-mentioned structure, can make a plurality of two- face electrode member 50,50a, 50b isolates each other and insulate, and does not consider to provide public electrode 21.

With second electrode 21,21a, when 21b is integrated in the public electrode 21, can said semiconductor equipment be configured to: make shared public electrode 21 at least two two- face electrode members 50,50a, 50b is through insulated trench 30 mutually insulateds and isolate; Said insulated trench 30 extends to the end in PN cylindricality zone 13 from the first surface 10a of Semiconductor substrate 10, and said end is positioned on second surface 10b one side of Semiconductor substrate 10.According to above-mentioned structure, because the degree of depth of insulated trench 30 is shoaled, thereby manufacturing becomes easy.

Can said semiconductor equipment be configured to: make said a plurality of element 50,50a, 50b, 51,51a, 51b also comprise at least one single-side electrode element 51,51a, 51b; Each single-side electrode element 51,51a, 51b have the pair of electrodes 25,26 as third electrode 25 and the 4th electrode 26; The two all is positioned at third electrode 25 and the 4th electrode 26 on one of first surface 10a and the second surface 10b of Semiconductor substrate 10.According to above-mentioned structure; Owing to two- face electrode member 50,50a, 50b and single-side electrode element 51,51a, 51b have been integrated into in the semi-conductive substrate 10, thereby a kind of play a part to comprise the mixing IC of integral control circuit and integrated protection electric current or the semiconductor equipment of compound IC can be provided.Said two- face electrode member 50,50a, 50b can be bipolar transistor elements, lateral type mos transistor element, complementary MOS transistor element, diode, capacitor, resistor etc.

Can said semiconductor equipment be configured to: make said insulated trench 30 have trench wall; Make insulator that said insulated trench 30 has a filling groove wall and be positioned at one of cavity of trench wall.

Can said semiconductor equipment be configured to: make insulated trench 30 have trench wall, be positioned at trench insulating film 30b and conductor 30c on the trench wall; And adopt the conductor 30c that is positioned within the trench insulating film 30b to fill said insulated trench 30.According to above-mentioned structure; Since each utilize trench insulating film 30b as dielectric a plurality of (for example; Two) capacitor parasitics is series between the adjacent elements, thereby the capacitance of said a plurality of capacitor parasiticses or total capacitance value are greater than the capacitance with regard to a capacitor parasitics.Therefore, can reduce the response voltage fluctuation and mobile displacement current.In addition, when transient signal was propagated between capacitor parasitics, said transient signal will be because of its energy of resistance loss.Therefore, can reduce or limit the propagation of transient signal (for example, surge) effectively.

Can said semiconductor equipment be configured to, the current potential of conductor 30c is fixed as predetermined value.According to above-mentioned structure, can be discharged in the member of electromotive force that electromotive force equals conductor 30c basically being stored in electric charge in the capacitor parasitics.Therefore, can more effectively limit propagation such as the transient signal of surge etc.

Can said semiconductor equipment be configured to, conductor 30c is electrically connected with second electrode 21,21a, 21b, thereby make the electromotive force of conductor 30c equal the electromotive force of second electrode 21,21a, 21b basically.According to above-mentioned structure; With (for example) situation that conductor 30c and the first electrode 18a, 18b are configured to have essentially identical electromotive force is compared; Can improve the puncture voltage of two- face electrode member 50,50a, 50b, shown in the performed above-mentioned simulation of the inventor.In addition; Because the electrode of element, distribution etc. can concentrate on first surface 10a one side of Semiconductor substrate 10; Compare with adopting first surface 10a one side, the use of second surface 10b one side of Semiconductor substrate 10 has been simplified makes conductor 30c have the structure of specifying electromotive force.

Said semiconductor equipment can also comprise the wiring members 24 on the first surface 10a that is positioned at Semiconductor substrate 10.Wiring members 24 can be electrically connected with conductor 30c, thereby can monitor the electromotive force of second electrode 21,21a, 21b through wiring members 24 and conductor 30c.According to above-mentioned structure, can on the first surface 10a of Semiconductor substrate 10 side, carry out measurement to the electromotive force of second electrode 21,21a, 21b.

Perhaps; Said semiconductor equipment can also comprise on first surface 10a one side that is positioned at Semiconductor substrate 10 and the wiring members 24 that is electrically connected with conductor 30c, and wherein: said a plurality of element 50,50a, 50b, 51,51a, 51b comprise according to first element that provides with said at least two two- face electrode members 50,50a, mode that 50b is different; And conductor 30c is electrically connected with said first element through wiring members 24.According to above-mentioned structure, can improve the function of the circuit that comprises a plurality of elements 50 of being positioned at Semiconductor substrate 10,50a, 50b, 51,51a, 51b.For example, said function is based on the FEEDBACK CONTROL of the electromotive force of second electrode 21,21a, 21b.

Can said semiconductor equipment be configured to: insulated trench 30 is first insulated trench 30; Said semiconductor equipment also comprises second insulated trench 30; The part of said second insulated trench 30 and the part of said first insulated trench 30 are in adjacent element- formation zone 11,12,27, between 28; The said therebetween interelement regional 33 that defines of the said part of said second insulated trench 30 and said first insulated trench 30; Said interelement zone 33 is in adjacent element- formation zone 11,12,27, between 28.According to above-mentioned structure; Because each all utilizes trench insulating film 30b to be series between the adjacent elements as dielectric at least two capacitor parasiticses; Thereby the capacitance of said a plurality of capacitor parasiticses or total capacitance value are greater than the capacitance with regard to a capacitor parasitics.Therefore, can reduce the response voltage fluctuation and mobile displacement current.In addition, when transient signal was propagated between capacitor parasitics, said transient signal will be because of its energy of resistance loss.Therefore, can reduce or limit the propagation of transient signal (for example, surge) effectively.

Can said semiconductor equipment be configured to the PN cylindricality zone 13 that interelement zone 33 is comprised have above-mentioned structure.According to above-mentioned structure, between element, provide and utilized depletion layer as dielectric capacitor parasitics.Therefore, can more effectively reduce or limit the propagation of transient signal (for example, surge).

Can said semiconductor equipment be configured to, the electromotive force in interelement zone 33 is fixed as predetermined value.According to above-mentioned structure, can be discharged in the member of electromotive force that electromotive force equals interelement zone 33 basically being stored in electric charge in the capacitor parasitics.Therefore, can more effectively limit propagation such as the transient signal of surge etc.

Can said semiconductor equipment be configured to, interelement zone 33 is electrically connected with second electrode 21,21a, 21b.That is to say that the electromotive force in interelement zone 33 equals the electromotive force of second electrode 21,21a, 21b basically.Concentrate on first surface 10a one side of Semiconductor substrate 10 because the electrode of element, distribution etc. are available; Thereby compare with the situation that adopts first surface 10a one side, the use of second surface 10b one side of Semiconductor substrate 10 has been simplified makes the interelement zone have the structure of specifying electromotive force.

Can said semiconductor equipment be configured to: the insulated trench 30 with above-mentioned structure is first insulated trench 30; Said semiconductor equipment also comprises second insulated trench 30; In said first insulated trench 30 and second insulated trench 30 each is surrounded at least one in a plurality of elements- formation zone 11,12,27,28.According to above-mentioned structure, can not only more effectively limit the propagation of transient signal (for example, surge) through the zone between the element 33 but also through outer peripheral areas.

According to the second aspect of said example embodiment, a kind of process for semiconductor devices that is used to make is provided.Said method comprises that preparation has the Semiconductor substrate 10c of each other relative first surface 10a and second surface 10b.Said semiconductor equipment 10c comprises the PN cylindricality zone 13 with a plurality of P conductive type semiconductor parts 14 and a plurality of N conductive type semiconductor parts 15.Said a plurality of P conductive type semiconductor part 14 and a plurality of N conductive type semiconductor parts 15 edges replace arranged adjacent each other perpendicular to the direction of the thickness direction of said Semiconductor substrate 10c.Said method also comprises from first surface 10a one side of Semiconductor substrate 10c and forms insulated trench 30a at Semiconductor substrate 10c, is positioned at the openend and the bottom that is positioned at Semiconductor substrate 10c on first surface 10a one side thereby insulated trench 30a is had.Insulated trench 30a defines a plurality of elements-formation zone 11,12.Insulated trench 30a isolates and insulation said a plurality of element-formation zone 11,12 each other.Said insulated trench 30a is formed, make each element-formation zone have a plurality of P conductive type semiconductor parts 14 and a plurality of N conductive type semiconductor parts 15.Said method also is included in the part that forms two-face electrode member 50,50a, 50b on first surface 10a one side in each element of Semiconductor substrate 10c-formation zone 11,12.Said two-part of face electrode member 50,50a, 50b comprises the first electrode 18a, 18b.Said method also comprises: after forming insulated trench 30a and on first surface 10a one side, form after the part of two-face electrode member 50,50a, 50b; Through the second surface 10b part of removing Semiconductor substrate 10c with Semiconductor substrate 10c attenuate, thereby insulated trench 30a is exposed from second surface 10b one side of Semiconductor substrate 10c.Said method also comprises: after Semiconductor substrate 10c is carried out attenuate, on second surface 10b one side in each element-formation zone 11,12, form other part of two-face electrode member 50,50a, 50b.Said other part comprises opposite with the said first electrode 18a, 18b second electrode 21,21a, 21b.With said two-face electrode member 50,50a, 50b form, and electric current is flowed between the first electrode 18a, 18b and second electrode 21,21a, 21b.

According to said method, for example, can make above-mentioned semiconductor equipment: be in non-insulated trench 30, the 30c that runs through state fully from the first surface 10a one side formation of Semiconductor substrate 10,10c through following process; From second surface 10b one side Semiconductor substrate 10,10c are carried out attenuate, thereby make insulated trench 30,30a run through Semiconductor substrate 10,10c fully.The advantage of the semiconductor equipment of making through the said method advantage with semiconductor equipment mentioned above basically is similar.

Can said method be designed to: the formation of insulated trench 30a comprises that (i) forms trench insulating film 30b on the trench wall of insulated trench 30a; Thereby in trench wall, stay cavity; And (ii) deposited conductor material in said cavity; Thereby in trench insulating film 30b, adopt conductor 30c to fill insulated trench 30a, wherein, said conductor 30c is made up of electric conducting material; Semiconductor substrate 10c is carried out attenuate, till exposing conductor 30c; Other part that on second surface 10b one side, forms two- face electrode member 50,50a, 50b comprises makes conductor 30c be electrically connected with second electrode 21,21a, 21b.According to said method, a kind of semiconductor equipment with conductor 30c can be provided, said conductor 30c is positioned at the trench wall of insulated trench 30,30a, and has the electromotive force of the electromotive force that is substantially equal to second electrode 21,21a, 21b.

According to the third aspect of said example embodiment, a kind of process for semiconductor devices that is used to make is provided.Said method comprises that preparation has the Semiconductor substrate 10c of each other relative first surface 10a and second surface 10b.Said Semiconductor substrate 10c also comprises the PN cylindricality zone 13 with a plurality of P conductive type semiconductor parts 14 and a plurality of N conductive type semiconductor parts 15.Said a plurality of P conductive type semiconductor part 14 and a plurality of N conductive type semiconductor parts 15 edges replace arranged adjacent each other perpendicular to the direction of the thickness direction of said Semiconductor substrate 10c.Semiconductor substrate 10c has a plurality of elements-formation zone 11,12.Said method also is included in the part that forms two-face electrode member 50,50a, 50b on first surface 10a one side in each element of Semiconductor substrate 10c-formation zone 11,12.Said two-part of face electrode member 50,50a, 50b comprises the first electrode 18a, 18b.Said method also is included in the dielectric film 31 that forms first surface 10a one side on first surface 10a one side of said Semiconductor substrate 10c.Said method also comprises: on first surface 10a one side, form after the part of two-face electrode member 50,50a, 50b; And after the dielectric film 31 that has formed first surface 10a one side; Form insulated trench 30a from second surface 10b one side of Semiconductor substrate 10c, thereby make insulated trench 30a arrive at the dielectric film 31 of first surface 10a one side.Insulated trench 30a isolates and insulation said a plurality of element-formation zone 11,12 each other.Said insulated trench 30a surrounds each in said a plurality of element-formation zone 11,12.Said insulated trench 30a is formed, make each element-formation zone 11,12 comprise a plurality of P conductive type semiconductor parts 14 and a plurality of N conductive type semiconductor part 15.Said method also comprises: on first surface 10a one side, formed after the part of two-face electrode member 50,50a, 50b, on second surface 10b one side in each element-formations zone 11,12 of Semiconductor substrate 10c, formed pair-face electrode member 50, other part of 50a, 50b.Said other part comprises opposite with the said first electrode 18a, 18b second electrode 21,21a, 21b.With said two-face electrode member 50,50a, 50b form, and electric current is flowed between the first electrode 18a, 18b and second electrode 21,21a, 21b.

According to said method; Can make above-mentioned semiconductor equipment through (for example) following process:, on the first surface 10a of Semiconductor substrate 10,10c one side, form said part except forming on the first surface 10a of Semiconductor substrate 10,10c the dielectric film 31 of first surface 10a one side; The dielectric film 31 that adopts first surface 10a one side is as stopper, from second surface 10b one side formation insulated trench 30, the 30c of Semiconductor substrate 10,10c.The advantage with above-mentioned semiconductor equipment is similar basically for the advantage of the semiconductor equipment of making through said method.

When adopting said method; If formed the trench wall that runs through Semiconductor substrate 10,10c that surrounds each element- formation zone 11,12, the dielectric film 31 through first surface 10a one side on the first surface 10a that is formed at Semiconductor substrate 10,10c interconnects the zone that comprises said a plurality of element- formation zone 11,12 so.Therefore, can avoid element- formation zone 11,12 to come off.

Said method can also comprise: on first surface 10a one side, form after the part of two- face electrode member 50,50a, 50b; Forming insulated trench 30a and before forming the part of two- face electrode member 50,50a, 50b on second surface 10b one side, through the second surface 10b part of removing Semiconductor substrate 10c with Semiconductor substrate 10c attenuate.

According to said method, can easily carry out the formation of insulated trench 30,30a, more specifically, can easily carry out the formation of trench wall, perhaps easily carry out trench insulating film 30b and the formation of conductor 30c in trench wall.In addition, have under the situation that is in the insulator film in the groove, there is no need to carry out process the surperficial attenuate of dielectric film in the groove and Semiconductor substrate 10c coexistence at insulated trench 30,30a.Therefore, if carry out attenuate, so owing to polish the stress that brings and to concentrate on the border between trench insulating film 30b and Semiconductor substrate 10, the 10c through CMP.Thereby, can avoid in Semiconductor substrate 10,10c, forming crackle.In addition, if carry out attenuate, can avoid so because of existing the difference of etching speed to form step between trench insulating film 30b and Semiconductor substrate 10, the 10c through etching.That is to say, can be to the second surface 10b of Semiconductor substrate 10,10c attenuate equably.

Can said method be designed to: the formation of insulated trench 30a comprises that (i) forms trench insulating film 30b on the trench wall of insulated trench 30a; Thereby being had, insulated trench 30a is in the cavity in the trench wall; (ii) deposits conductive material in said cavity afterwards; Thereby adopt conductor 30c to fill insulated trench 30a via trench insulating film 30b, wherein, said conductor 30c is made up of electric conducting material; Be included in deposits conductive material on the second surface 10b of Semiconductor substrate 10c in the part that forms two- face electrode member 50,50a, 50b on second surface 10b one side, to form second electrode 21,21a, the 21b that constitutes by electric conducting material.According to said method, a kind of semiconductor equipment with insulated trench 30,30a can be provided, said insulated trench 30, the electromotive force that 30a has to be equated with the electromotive force of second electrode 21,21a, 21b basically.

Although preceding text have been described the present invention with reference to its each embodiment, should be appreciated that to the invention is not restricted to the foregoing description and structure.The present invention is intended to cover various modifications and equivalents.In addition, although imagined above-mentioned various combination and structure embodies the present invention, it is contemplated that also other comprises that more, element still less perhaps includes only the combination and the structure of discrete component, these also drop in the scope of embodiment.

Claims (23)

1. semiconductor equipment comprises:

Semiconductor substrate (10), it has each other relative first surface (10a) and second surface (10b), and has a plurality of elements-formation zone (11,12,27,28);

Insulated trench (30), it surrounds the every person in said a plurality of element-formation zone (11,12,27,28), and makes said a plurality of element-formation zone (11,12,27,28) mutually insulated and isolation; And

Lay respectively at a plurality of elements in said a plurality of element-formation zone (11,12,27,28) (50,50a, 50b; 51,51a, 51b), wherein, said a plurality of elements (50,50a; 50b, 51,51a, 51b) comprise at least two two-face electrode members (50,50a; 50b), wherein, each two-face electrode member (50,50a 50b) comprising:

First electrode (18a, 18b), it is positioned on one of first surface (10a) and the second surface (10b) of said Semiconductor substrate (10);

Second electrode (21,21a, 21b); It is arranged on another of said first surface (10a) and said second surface (10b) of said Semiconductor substrate (10), wherein, with said two-face electrode member (50; 50a, (18a is 18b) with said second electrode (21 at said first electrode 50b) to be configured such that electric current; 21a flows between 21b);

PN cylindricality zone (13); It is positioned at said Semiconductor substrate (10); And comprise a plurality of P conductive type semiconductor parts (14) and a plurality of N conductive type semiconductor part (15); Wherein, said a plurality of P conductive type semiconductor parts (14) and said a plurality of N conductive type semiconductor parts (15) edge replace arranged adjacent perpendicular to the direction of the thickness direction of said Semiconductor substrate (10); And

The drift region, its by said a plurality of P conductive type semiconductors parts (14) in said PN cylindricality zone (13) and said a plurality of N conductive type semiconductors partly one of (15) provide,

Wherein, said at least two two-face electrode members (50,50a, 50b) comprise at least one P channel-type two-the face electrode member (50,50a) with at least one N channel-type two-the face electrode member (50,50b);

Said at least one P channel-type is two-and the face electrode member (50,50a) utilize said a plurality of P conductive type semiconductor parts (14) as said drift region; And

Said at least one N channel-type is two-and the face electrode member (50,50b) utilize said a plurality of N conductive type semiconductor parts (15) as said drift region.

2. semiconductor equipment according to claim 1, wherein:

Each two-face electrode member (50,50a, 50b) have channel region (16a, 16b);

(16a 16b) is positioned at said Semiconductor substrate (10) to said channel region, and is positioned between the said first surface (10a) of said PN cylindricality zone (13) and said Semiconductor substrate (10);

Each two-face electrode member (50,50a, said channel region 50b) (16a, and conduction type 16b) and said pair-face electrode member (50,50a, the conductivity type opposite of said drift region 50b); And

Each two-face electrode member (50,50a, (18a, 18b) (21,21a 21b) lays respectively on the said first surface (10a) and said second surface (10b) of said Semiconductor substrate (10) said first electrode 50b) with said second electrode.

3. semiconductor equipment according to claim 2, wherein:

With said at least two two-face electrode members (50,50a, (21,21a 21b) is integrated in the public electrode (21) corresponding second electrode 50b).

4. semiconductor equipment according to claim 2, wherein:

Said two-the face electrode member (50,50a, one said first electrode in 50b) (18a, 18b) with another pair-face electrode member (50,50a, said first electrode 50b) (18a, 18b) electricity is isolated; And

Said two-the face electrode member (50,50a, said one said second electrode in 50b) (21a, 21b) with said another pair-face electrode member (50,50a, said second electrode 50b) (21a, 21b) isolate by electricity.

5. semiconductor equipment according to claim 1, wherein:

Said insulated trench (30) runs through said Semiconductor substrate (10) from said first surface (10a) to said second surface (10b).

6. semiconductor equipment according to claim 3, wherein:

Utilize said insulated trench (30) make shared said public electrode (21) said at least two two-face electrode members (50,50a, 50b) mutually insulated and isolating; And

Said insulated trench (30) extends to the end in said PN cylindricality zone (13) from the said first surface (10a) of said Semiconductor substrate (10), and said end is positioned on said second surface (10b) side of said Semiconductor substrate (10).

7. semiconductor equipment according to claim 1, wherein:

Said a plurality of element (50,50a, 50b, 51,51a, 51b) also comprise at least one single-side electrode element (51,51a, 51b);

(51,51a 51b) has pair of electrodes (25,26) to each single-side electrode element, and said pair of electrodes (25,26) is third electrode (25) and the 4th electrode (26); And

The two all is positioned at said third electrode (25) and said the 4th electrode (26) on one of said first surface (10a) and the said second surface (10b) of said Semiconductor substrate (10).

8. semiconductor equipment according to claim 1, wherein:

Said insulated trench (30) has trench wall; And

Said insulated trench (30) has the insulator that is filled in the said trench wall and is positioned at one of cavity of said trench wall.

9. semiconductor equipment according to claim 1, wherein:

Said insulated trench (30) has trench wall, is positioned at trench insulating film (30b) and conductor (30c) on the said trench wall; And

Employing is positioned at the said conductor (30c) of said trench insulating film (30b) and fills said insulated trench (30).

10. semiconductor equipment according to claim 9, wherein:

The electromotive force of said conductor (30c) is fixed on predetermined value.

11. semiconductor equipment according to claim 10, wherein:

(21,21a 21b) is electrically connected said conductor (30c) with said second electrode.

12. semiconductor equipment according to claim 11 also comprises:

Be positioned at the wiring members (24) on the said first surface (10a) of said Semiconductor substrate (10), wherein:

Said wiring members (24) is electrically connected with said conductor (30c), thus can through said wiring members (24) and said conductor (30c) monitor said second electrode (21,21a, electromotive force 21b).

13. semiconductor equipment according to claim 11 also comprises:

Wiring members (24), its said first surface (10a) that is positioned at said Semiconductor substrate (10) is gone up and is electrically connected with said conductor (30c), wherein:

Said a plurality of element (50,50a, 50b, 51,51a, 51b) comprise according to said at least two two-face electrode members (50,50a, 50b) first element that is provided with of different mode; And

Said conductor (30c) is electrically connected with said first element through said wiring members (24).

14. semiconductor equipment according to claim 1, wherein, insulated trench according to claim 1 (30) is first insulated trench (30), and said semiconductor equipment also comprises:

Second insulated trench (30), wherein:

The part of the part of said second insulated trench (30) and said first insulated trench (30) is positioned between adjacent element-formation zone (11,12,27,28);

The said part of the said part of said second insulated trench (30) and said first insulated trench (30) defines therebetween interelement zone (33); And

Said interelement zone (33) is positioned between said adjacent element-formation zone (11,12,27,28).

15. semiconductor equipment according to claim 14, wherein:

Said interelement zone (33) has PN cylindricality zone (13), and its structure and each two-face electrode member (50,50a, the structure in PN cylindricality zone (13) 50b) is identical.

16. semiconductor equipment according to claim 14, wherein:

The electromotive force in said interelement zone (33) is fixed on predetermined value.

17. semiconductor equipment according to claim 16, wherein:

(21,21a 21b) is electrically connected with said second electrode in said interelement zone (33).

18. according to any one the described semiconductor equipment in the claim 1 to 17, wherein, insulated trench according to claim 1 (30) is first insulated trench (30), said semiconductor equipment also comprises:

Second insulated trench (30), wherein:

In said first insulated trench (30) and said second insulated trench (30) each is surrounded at least one in said a plurality of element-formation zone (11,12,27,28).

19. the manufacturing approach of a semiconductor equipment, said method comprises:

Preparation Semiconductor substrate (10c); It has each other relative first surface (10a) and second surface (10b); Wherein, Said Semiconductor substrate (10c) comprises PN cylindricality zone (13), and wherein, said PN cylindricality zone (13) has a plurality of P conductive type semiconductor parts (14) and a plurality of N conductive type semiconductor part (15); Wherein, said a plurality of P conductive type semiconductor parts (14) and said a plurality of N conductive type semiconductor parts (15) edge replace arranged adjacent each other perpendicular to the direction of the thickness direction of said Semiconductor substrate (10c);

Form insulated trench (30a) from first surface (10a) side of said Semiconductor substrate (10c) in said Semiconductor substrate (10c); Thereby being had, said insulated trench (30a) is positioned at the openend and the bottom that is positioned at said Semiconductor substrate (10c) on said first surface (10a) side; Wherein, said insulated trench (30a) defines a plurality of elements-formation zone (11,12); Wherein, Said insulated trench (30a) is isolated said a plurality of element-formation zone (11,12) each other and is insulated, wherein; Said insulated trench (30a) formed make each element-formation zone have PN cylindricality zone (13), said PN cylindricality zone (13) has a plurality of P conductive type semiconductors parts (14) and said a plurality of N conductive type semiconductors partly (15);

On said first surface (10a) side in each element of said Semiconductor substrate (10c)-formation zone (11,12), form two-face electrode member (50,50a; Part 50b), wherein, said pair-face electrode member (50; 50a, said part 50b) comprise first electrode (18a, 18b);

Forming said insulated trench (30a) afterwards; And on said first surface (10a) side, form said pair-face electrode member (50; 50a; After said part 50b), second surface (10b) part through removing said Semiconductor substrate (10c) makes said insulated trench (30a) come out from second surface (10b) side of said Semiconductor substrate (10c) said Semiconductor substrate (10c) attenuate; And

After said Semiconductor substrate (10c) is carried out attenuate, and said pair-face electrode member of formation on said second surface (10b) side in each element-formation zone (11,12) (50,50a; Other part 50b), wherein, said other part comprises and said first electrode (18a, 18b) relative second electrode (21; 21a, 21b), wherein; With said two-(50,50a 50b) forms and makes electric current at the said first electrode (18a face electrode member; 18b) (21,21a flows between 21b) with said second electrode.

20. method according to claim 19, wherein:

The formation of said insulated trench (30a) comprising:

(i) on the trench wall of said insulated trench (30a), form trench insulating film (30b), thereby in said trench wall, stay cavity, and

(ii) deposits conductive material in said cavity, thus in said trench insulating film (30b), adopt conductor (30c) to fill said insulated trench (30a), and wherein, said conductor (30c) is processed by electric conducting material;

Carry out the attenuate step of said Semiconductor substrate (10c), till said conductor (30c) is come out; And

Said pair-face electrode member of formation on said second surface (10b) side (50,50a, the step of said other part 50b) comprises that (21,21a 21b) is electrically connected with said second electrode with said conductor (30c).

21. the manufacturing approach of a semiconductor equipment, said method comprises:

Preparation comprises the Semiconductor substrate (10c) of each other relative first surface (10a) and second surface (10b); Wherein, said Semiconductor substrate (10c) also comprises PN cylindricality zone (13), wherein; Said PN cylindricality zone (13) has a plurality of P conductive type semiconductor parts (14) and a plurality of N conductive type semiconductor part (15); Wherein, said a plurality of P conductive type semiconductor parts (14) and said a plurality of N conductive type semiconductor parts (15) edge replace arranged adjacent each other perpendicular to the direction of the thickness direction of said Semiconductor substrate (10c), wherein; Said Semiconductor substrate (10c) has a plurality of elements-formation zone (11,12);

On first surface (10a) side in each element of said Semiconductor substrate (10c)-formation zone (11,12), form two-face electrode member (50,50a; Part 50b), wherein, said pair-face electrode member (50; 50a, said part 50b) comprise first electrode (18a, 18b);

On said first surface (10a) side of said Semiconductor substrate (10c), form the dielectric film (31) of first surface (10a) side;

Form insulated trench (30a) from second surface (10b) side of said Semiconductor substrate (10c), thereby make said insulated trench (30a) extend to the dielectric film (31) of said first surface (10a) side, wherein; Said insulated trench (30a) makes said a plurality of element-formation zone (11; 12) isolate each other and insulate, wherein, said insulated trench (30a) surrounds said a plurality of elements-formations regional (11; 12) each in; Wherein, said insulated trench (30a) is formed make each element-formation zone (11,12) comprise said a plurality of P conductive type semiconductor parts (14) and said a plurality of N conductive type semiconductors partly (15); And

On said second surface (10b) side in each element of said Semiconductor substrate (10c)-formation zone (11,12), form said two-the face electrode member (50,50a, other part 50b); Wherein, said other part comprise with said first electrode (18a, 18b) relative second electrode (21,21a; 21b), wherein, with said two-the face electrode member (50,50a; 50b) form and make electric current (18a, 18b) (21,21a flows between 21b) with said second electrode at said first electrode.

22. method according to claim 21 also comprises:

On said first surface (10a) side, form said pair-face electrode member (50; 50a after said part 50b), is forming said insulated trench (30a) before; And on said second surface (10b) side, form said pair-face electrode member (50; 50a before said part 50b), comes said Semiconductor substrate (10c) is carried out attenuate through second surface (10b) part of removing said Semiconductor substrate (10c).

23. method according to claim 21, wherein:

The formation of said insulated trench (30a) comprising:

(i) on the trench wall of said insulated trench (30a), form trench insulating film (30b), thereby make said insulated trench (30a) have the cavity that is positioned at said trench wall, then

(ii) deposits conductive material in said cavity, thus adopt conductor (30c) to fill said insulated trench (30a) via said trench insulating film (30b), and wherein, said conductor (30c) is processed by said electric conducting material; And

On said second surface (10b) side, form said pair-face electrode member (50; 50a; The step of said part 50b) comprises: go up the said electric conducting material of deposition at the said second surface (10b) of said Semiconductor substrate (10c); Thereby said second electrode that formation is processed by said electric conducting material (21,21a, 21b).

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