CN101410841B - 支持用于仿真结果观测的信号规范的方法、系统和程序产品 - Google Patents

支持用于仿真结果观测的信号规范的方法、系统和程序产品 Download PDF

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CN101410841B
CN101410841B CN2007800115291A CN200780011529A CN101410841B CN 101410841 B CN101410841 B CN 101410841B CN 2007800115291 A CN2007800115291 A CN 2007800115291A CN 200780011529 A CN200780011529 A CN 200780011529A CN 101410841 B CN101410841 B CN 101410841B
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signal
entity
signal group
signals
design entity
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CN101410841A (zh
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G·波波克
W·勒斯纳
D·E·威廉斯
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Core Usa Second LLC
GlobalFoundries Inc
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International Business Machines Corp
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Stored Programmes (AREA)
CN2007800115291A 2006-05-03 2007-05-02 支持用于仿真结果观测的信号规范的方法、系统和程序产品 Expired - Fee Related CN101410841B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/381,437 US7711537B2 (en) 2006-05-03 2006-05-03 Signals for simulation result viewing
US11/381,437 2006-05-03
PCT/EP2007/054255 WO2007128753A1 (en) 2006-05-03 2007-05-02 Method, system and program product supporting specification of signals for simulation result viewing

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CN101410841A CN101410841A (zh) 2009-04-15
CN101410841B true CN101410841B (zh) 2011-01-12

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US (2) US7711537B2 (https=)
EP (1) EP2021963A1 (https=)
JP (1) JP5039130B2 (https=)
CN (1) CN101410841B (https=)
WO (1) WO2007128753A1 (https=)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7146260B2 (en) 2001-04-24 2006-12-05 Medius, Inc. Method and apparatus for dynamic configuration of multiprocessor system
US8160857B2 (en) 2008-12-16 2012-04-17 International Business Machines Corporation Selective compilation of a simulation model in view of unavailable higher level signals
US8453080B2 (en) * 2008-12-16 2013-05-28 International Business Machines Corporation Model build in the presence of a non-binding reference
US9665916B2 (en) 2010-08-10 2017-05-30 X Systems, Llc System and method for analyzing data
US9665836B2 (en) * 2010-08-10 2017-05-30 X Systems, Llc System and method for analyzing data
US9652726B2 (en) 2010-08-10 2017-05-16 X Systems, Llc System and method for analyzing data
JP6101725B2 (ja) * 2015-03-24 2017-03-22 アンリツ株式会社 フェージングシミュレータ及び移動体端末試験システム
JP6307474B2 (ja) * 2015-07-17 2018-04-04 アンリツ株式会社 フェージングシミュレータ及びフェージング信号生成方法
US10635766B2 (en) 2016-12-12 2020-04-28 International Business Machines Corporation Simulation employing level-dependent multitype events
CN109918742B (zh) * 2019-02-15 2023-09-08 湖南高至科技有限公司 一种基于仿真系统的数据分发及管理方法
CN113779918A (zh) * 2021-08-03 2021-12-10 北京爱芯科技有限公司 SoC仿真方法、装置、计算设备和计算机存储介质
CN116776787B (zh) * 2023-08-22 2023-11-17 北京云枢创新软件技术有限公司 信号别名的自动识别方法、电子设备和介质

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6053947A (en) * 1997-05-31 2000-04-25 Lucent Technologies, Inc. Simulation model using object-oriented programming
CN1560743A (zh) * 2004-03-11 2005-01-05 浙江大学 多媒体处理器协同仿真验证平台

Family Cites Families (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5212650A (en) 1986-09-12 1993-05-18 Digital Equipment Corporation Procedure and data structure for synthesis and transformation of logic circuit designs
US5369763A (en) 1989-02-01 1994-11-29 Kansas State University Research Foundation Data storage and retrieval system with improved data base structure
JPH03116276A (ja) * 1989-09-29 1991-05-17 Ricoh Co Ltd 論理シミュレーションの波形データ処理方法
ATE170642T1 (de) 1990-06-15 1998-09-15 Compaq Computer Corp Mehrstufeneinschluss in mehrstufigen cache- speicherhierarchien
JPH05151304A (ja) * 1991-11-28 1993-06-18 Nec Corp 電子回路波形解析装置
JP3140174B2 (ja) * 1992-06-09 2001-03-05 株式会社リコー 波形データ表示装置
US5604895A (en) 1994-02-22 1997-02-18 Motorola Inc. Method and apparatus for inserting computer code into a high level language (HLL) software model of an electrical circuit to monitor test coverage of the software model when exposed to test inputs
US6117181A (en) 1996-03-22 2000-09-12 Sun Microsystems, Inc. Synchronization mechanism for distributed hardware simulation
AU5365998A (en) 1996-11-27 1998-06-22 1 Vision Software, L.L.C. File directory and file navigation system
US5842213A (en) 1997-01-28 1998-11-24 Odom; Paul S. Method for modeling, storing, and transferring data in neutral form
JP3028792B2 (ja) * 1997-08-25 2000-04-04 日本電気株式会社 シミュレーション解析装置及びシミュレーション解析方法
US6052809A (en) * 1997-10-16 2000-04-18 Teradyne, Inc. Method for generating test patterns
KR100492007B1 (ko) 1997-12-30 2005-08-29 매그나칩 반도체 유한회사 내부상태궤적비교에의한칩검증방법
US7152027B2 (en) 1998-02-17 2006-12-19 National Instruments Corporation Reconfigurable test system
US20020152060A1 (en) 1998-08-31 2002-10-17 Tseng Ping-Sheng Inter-chip communication system
US6195627B1 (en) 1998-11-09 2001-02-27 International Business Machines Corporation Method and system for instrumenting simulation models
US6195629B1 (en) 1998-11-09 2001-02-27 International Business Machines Corporation Method and system for selectively disabling simulation model instrumentation
US6202042B1 (en) 1998-11-09 2001-03-13 International Business Machines Corporation Hardware simulator instrumentation
US6295623B1 (en) * 1999-01-29 2001-09-25 Credence Systems Corporation System for testing real and simulated versions of an integrated circuit
US6438735B1 (en) 1999-05-17 2002-08-20 Synplicity, Inc. Methods and apparatuses for designing integrated circuits
US6470478B1 (en) * 1999-06-29 2002-10-22 International Business Machines Corporation Method and system for counting events within a simulation model
US20030121011A1 (en) 1999-06-30 2003-06-26 Cirrus Logic, Inc. Functional coverage analysis systems and methods for verification test suites
US6720565B2 (en) 1999-06-30 2004-04-13 Applied Materials, Inc. Real-time prediction of and correction of proximity resist heating in raster scan particle beam lithography
US6263302B1 (en) 1999-10-29 2001-07-17 Vast Systems Technology Corporation Hardware and software co-simulation including simulating the cache of a target processor
US6751583B1 (en) 1999-10-29 2004-06-15 Vast Systems Technology Corporation Hardware and software co-simulation including simulating a target processor using binary translation
US6230114B1 (en) 1999-10-29 2001-05-08 Vast Systems Technology Corporation Hardware and software co-simulation including executing an analyzed user program
US6581191B1 (en) 1999-11-30 2003-06-17 Synplicity, Inc. Hardware debugging in a hardware description language
US6687710B1 (en) 1999-12-03 2004-02-03 Synchronicity Software, Inc. Intellectual property library management system
US8302072B2 (en) 2000-06-05 2012-10-30 National Instruments Corporation System and method for programmatically generating a graphical program based on a sequence of motion control, machine vision, and data acquisition (DAQ) operations
US6546532B1 (en) 2000-06-20 2003-04-08 Unisys Corporation Method and apparatus for traversing and placing cells using a placement tool
WO2002003310A1 (en) 2000-07-05 2002-01-10 Meyer Steven J Mixed signal simulation
JP2002073719A (ja) * 2000-08-31 2002-03-12 Hitachi Ltd 回路動作モデル記述の生成方法および論理設計検証装置
US6920418B2 (en) 2000-12-30 2005-07-19 International Business Machines Corporation Detecting events within simulation models
US20020128809A1 (en) 2000-12-30 2002-09-12 International Business Machines Corporation Randomized simulation model instrumentation
DE10127170A1 (de) 2001-06-05 2002-12-19 Infineon Technologies Ag Fehlersuchverfahren und Fehlersuchvorrichtung
US6754763B2 (en) 2001-07-30 2004-06-22 Axis Systems, Inc. Multi-board connection system for use in electronic design automation
US7050923B2 (en) 2001-08-15 2006-05-23 National Instruments Corporation Network-based system for configuring a measurement system using configuration information generated based on a user specification
US7224689B2 (en) 2001-08-17 2007-05-29 Sun Microsystems, Inc. Method and apparatus for routing of messages in a cycle-based system
US6957318B2 (en) 2001-08-17 2005-10-18 Sun Microsystems, Inc. Method and apparatus for controlling a massively parallel processing environment
US7080365B2 (en) 2001-08-17 2006-07-18 Sun Microsystems, Inc. Method and apparatus for simulation system compiler
US7143019B2 (en) 2001-10-30 2006-11-28 International Business Machines Corporation Maintaining data integrity within a distributed simulation environment
DE10329147A1 (de) * 2003-06-27 2005-01-20 Siemens Ag Verknüpfung und Darstellung von Signalen einer Vorrichtung zur Hardware-Simulation und Elementen eines Listings eines Programms
US7283944B2 (en) * 2003-12-15 2007-10-16 Springsoft, Inc. Circuit simulation bus transaction analysis
US20060015314A1 (en) * 2004-06-30 2006-01-19 International Business Machines Corporation Methods, systems and program products for annotating system traces with control program information and presenting annotated system traces
US7437282B2 (en) * 2005-09-22 2008-10-14 International Business Machines Corporation Method and apparatus to provide alternative stimulus to signals internal to a model actively running on a logic simulation hardware emulator

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6053947A (en) * 1997-05-31 2000-04-25 Lucent Technologies, Inc. Simulation model using object-oriented programming
CN1560743A (zh) * 2004-03-11 2005-01-05 浙江大学 多媒体处理器协同仿真验证平台

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
IEEE Computer Society.IEEE Standard Verilog®Hardware Description Language.IEEE Standard.The Institute of Electrical and Electronics Engineers, Inc.,2001,325. *
Simucad Inc.Silos User"s Manual(Version 2001.1).Silos User"s Manual(Version 2001.1).2001,第2-1至2-29页、第5-40页. *

Also Published As

Publication number Publication date
US7711537B2 (en) 2010-05-04
US20080229193A1 (en) 2008-09-18
EP2021963A1 (en) 2009-02-11
JP5039130B2 (ja) 2012-10-03
US7617085B2 (en) 2009-11-10
JP2009535726A (ja) 2009-10-01
WO2007128753A1 (en) 2007-11-15
CN101410841A (zh) 2009-04-15
US20070260443A1 (en) 2007-11-08

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