CN101232273A

CN101232273A - Differential common collector amplifying circuit

Info

Publication number: CN101232273A
Application number: CNA2007100367006A
Authority: CN
Inventors: 黄骐
Original assignee: Individual
Current assignee: Individual
Priority date: 2007-01-22
Filing date: 2007-01-22
Publication date: 2008-07-30

Abstract

The invention relates to a difference common collector amplifying circuit which is a device of an amplifying signal current for decreasing the distortion factor of a power amplification circuit. At present, a well-known current amplifying circuit of a station amplifier generally adopts an OCL circuit, in which the utility ratio of a power supply is higher, the direct coupling is realized, the circuit is simple and the power is big, but the performance of common-mode interference resistance of the circuit is reduced because non-equilibrium design is adopted, and the distortion is larger. Based on a traditional monotube common collector amplifying circuit, the difference common collector amplifying circuit introduces a difference structure, and a fully symmetrical and balanceable circuit structure is used for resisting the common-mode interference. The invention can be mainly used in the fields of low-frequency signal current amplification, aural signal current amplification, amplifier impedance match, an amplifier high input impedance input circuit, an amplifier low input impedance output circuit, single end-balanced signal transformation, etc.

Description

Differential common collector amplifying circuit

Affiliated technical field

Patent of the present invention relates to a kind of device of amplifying signal electric current, especially can reduce the power amplification circuit distortion factor.

Background technology

At present, known power amplifier current amplification circuit generally adopts the OCL circuit.The power utilization rate is higher, can realize direct coupling.Circuit is simple, and power is big.But its non-equilibrium design makes the decreased performance of the anti-common mode disturbances of circuit, and distortion is bigger.

Summary of the invention

Bad in order to overcome the anti-common mode disturbances performance of existing current amplification circuit, the deficiency that distortion is bigger, patent of the present invention provides a kind of differential common collector amplifying circuit, and this circuit can effectively anti-common mode disturbances, the signal to noise ratio height, distortion is little.

Patent of the present invention solves the technical scheme that its technical problem adopts: on the basis of traditional single tube common collector amplifying circuit, introduce differential configuration.By the circuit structure of complete symmetry, balance, come anti-common mode disturbances.When input signal was disturbed, the shared emitter resistance of two transistor suppressed the common-mode signal composition in the circuit.Circuit is: two (or a plurality of even number parallel connection) transistor base signal inputs, emitting stage output.

The beneficial effect of patent of the present invention is, input resistance is big, and output resistance is little, power utilization rate height, and anti-common mode disturbances ability is strong, and distortion is little, and is simple in structure, and cost is low.

Below in conjunction with drawings and Examples patent of the present invention is further specified.

Fig. 1 be patent of the present invention based on adopting common NPN transistor basic circuit schematic diagram.

Fig. 2 is that the process of patent of the present invention is optimized improved circuit theory diagrams.

Fig. 3 is that the process of patent of the present invention is optimized improved current source loads circuit theory diagrams.

Fig. 4 be patent of the present invention based on adopting FET basic circuit schematic diagram.

The signal-balanced input of 1. (1A.) among the figure, 2. power supply positive potential end, 2A. power-potential end, 3. (3A.) signal-balanced output, 4. (4A.) transistor, 5. transistor upper offset resistance, 6. signal end earth resistance, the shared emitter resistance .8. of 7 transistors transistor below-center offset resistance, 9. resistance, 10. transistor, 11. resistance, 12. transistor base resistor c. FETs.

Embodiment

In Fig. 1, signal is imported by signal-balanced input (1. (1A.)) balance.Export by signal-balanced output (3. (3A.)) balance.Circuit by power supply positive potential end (2.), power-potential end (2A.) respectively with the positive and negative level of power supply to connecing, to circuit supply.Two transistors (4. (4A.)) are: same model, same specification.By transistor upper offset resistance (5.) transistor is realized quiescent biasing,, select transistorized quiescent point with by adjusting the method for its resistance.Realize the balance of the positive and negative half cycle amplitude of signal input by signal end earth resistance (6.).Provide common-mode signal negative feedback by the shared emitter resistance of transistor (7) to this circuit.But both balance inputs of input also can single-endedly be imported.During single-ended input, any end input of signal from balance input (1. (1A.)), the other end is ground connection then.But both balance output of output also can single-endedly be exported.During single-ended output, any end output of signal from balance input (1. (1A.)), the other end is then unsettled.

In Fig. 2, signal is imported by signal-balanced input (1. (1A.)) balance.Export by signal-balanced output (3. (3A.)) balance.Circuit by power supply positive potential end (2.), power-potential end (2A.) respectively with the positive and negative level of power supply to connecing, to circuit supply.Two transistors (4. (4A.)) are: same model, same specification.Jointly transistor is realized quiescent biasing by transistor upper offset resistance (5.) and transistor below-center offset resistance (8.),, select transistorized quiescent point with by adjusting the method for its resistance.Realize the balance of the positive and negative half cycle amplitude of signal input by signal end earth resistance (6.).Provide common-mode signal negative feedback by the shared emitter resistance of transistor (7) to this circuit.Improve signal to transistorized driving by transistor base resistor (12.).

In Fig. 3, circuit is played the shared emitter resistance of transistor (7) that suppresses the common mode disturbances effect made the transistor constant current source load into.This transistor constant current source load is by resistance (9.), transistor (10.), and resistance (11.) constitutes.Common-mode signal negative feedback to this circuit is provided.Improve signal to transistorized driving by transistor base resistor (12.).

In Fig. 4, amplifier element has made FET into by normal transistor, and principle is identical.

Claims

1. differential common collector amplifying circuit is on the basis of traditional single tube common collector amplifying circuit, introduces differential configuration.By the circuit structure of complete symmetry, balance, come anti-common mode disturbances.When input signal was disturbed, the shared emitter resistance of two transistor suppressed the common-mode signal composition in the circuit.It is characterized in that: circuit adopts differential configuration, and the amplifying circuit type is common collector connection (also can make collect-to miss altogether altogether method according to the characteristic of difference channel).

2. differential common collector amplifying circuit according to claim 1 is characterized in that: circuit is made of two (or a plurality of even number parallel connection) transistors.And have all characteristics of difference channel.Simultaneously, can be used for the improvement of difference channel, this circuit is suitable equally.

3. differential common collector amplifying circuit according to claim 1 is characterized in that: according to the characteristic of difference channel, but the both balance inputs of this circuit, balance output; Can single-endedly import balance output again; But also balance input, single-ended output; Also can single-endedly import single-ended output.And be emitter current output.