CN101110438A - 应用于晶片级封装的影像传感器结构及其制造方法 - Google Patents
应用于晶片级封装的影像传感器结构及其制造方法 Download PDFInfo
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- CN101110438A CN101110438A CNA2007101090429A CN200710109042A CN101110438A CN 101110438 A CN101110438 A CN 101110438A CN A2007101090429 A CNA2007101090429 A CN A2007101090429A CN 200710109042 A CN200710109042 A CN 200710109042A CN 101110438 A CN101110438 A CN 101110438A
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Abstract
本发明揭示一晶片级封装的影像传感器模块及其制造方法。其影像传感器模块包含一金属合金基材、一晶片级封装、一透镜座以及软性印刷电路板(FPC)。其具有复数个影像传感器芯片与复数个锡球的晶片级封装黏附于金属合金基材。复数个透镜置于透镜座内,且其透镜座位于影像传感器之上。其透镜座置于软性电路板,且其软性电路板具有复数个耦合至锡球的焊点(Solder Joint),以利影像传感器芯片信号传输。再者,影像传感器芯片可与被动组件或其它具有并排或堆栈结构的芯片封装。本发明的影像传感器模块与晶片级封装能减少封装结构的成本,并提高其产量。再者,本发明的封装尺寸能易于适应至测试设备、封装设备等等。
Description
技术领域
本发明是关于影像传感器模块,特别是关于影像传感器模块与制造晶片级封装的结构及其方法,能降低其成本,提高产量与可靠度。
背景技术
半导体技术快速发展,且半导体芯片有近趋微小化的趋势。然而,半导体芯片功能的需求却趋向多样化。此意味着半导体芯片必须在其较小的区域内有较多的输入/输出接点,因此其接脚的密度快速增加。此将导致半导体芯片的封装产量减少且变得较困难。
封装结构的主要目的为保护芯片免于遭受外部的破坏。再者,自芯片所产生的热能须通过封装结构有效散热,以确保芯片的操作。
因其接脚的密度很高,较早的导线架(Lead Frame)封装技术已经不适用于先进半导体芯片。因此,发展了新颖的球门阵列(Ball Grid Array,BGA)封装技术以满足先进半导体芯片封装的需求。球门阵列封装的球面接脚具有比导线架的接脚较短间距(Pitch)的优点,且其接脚较不易毁损与变形。另外较短的信号传输距离有助于提高操作频率,以符合较高效率的需求。大多数的封装技术是于晶片上分离个别芯片成为单一的芯片,而后再个别封装并测试芯片。另一种称为「晶片级封装(Wafer Level Package,WLP)」的技术,主要在于切割芯片前,封装制作于晶片上的芯片。晶片级封装的技术具有多项优点,例如较短生产周期时间、较低成本,且无须底部填充胶(Under-fill)或灌胶(Molding)。
前述的芯片,例如影像传感器的芯片,现今影像传感器模块是通过COB(Chip on Board)或LCC(Leaded/Leadless Chip Carrier)等方式所制造。使用COB方法有一缺点,因为微粒污染其感测区域所致,在封装制程期间具有较低的生产率。此外,LCC方法有数项缺点,例如,因为其封装材质缘故,需要较高的封装成本,以及微粒污染其感测区域所致,在封装制程期间具有较低的生产率。此外,SHELL CASE公司也发展出晶片级封装的技术,通过SHELL CASE封装影像传感器芯片,然,因其封装必须有两片玻璃片及复杂的程序,此制程需要较高的生产成本。因为环氧类树脂(Epoxy)覆盖其外,其透明度较差,且可能减少其可靠度。
因此,鉴于前述先前技术的缺失,本发明的目的是提供一新式影像感测模块。
发明内容
鉴于前述先前技术的缺失,本发明的目的是提供一新式影像感测模块及用于制造晶片级封装的方法与结构。
本发明的另一目的为提供一影像传感器,用以方便执行晶片级封装的最终测试。
本发明的又一目的是降低封装结构的成本。
本发明的又一目的是提高封装结构的产量。
本发明的又一目的是提供厚度较薄的影像传感器封装及模块。
本发明的又一目的是提供具有高产量及可靠度的封装结构,并可应用至半导体及液晶显示器产业。
基于上述的目的,本发明提供一应用于晶片级封装的影像传感器模块及其制造方法。其影像传感器模块包含金属合金基材、晶片级封装、透镜座与软性印刷电路板(Flexible Printed Circuits,FPC)。金属合金基材的材质包括Fe-Ni合金、Fe-Ni-Co合金、Cu-Fe合金、Cu-Cr合金、Cu-Ni-Si合金、Cu-Sn合金或Fe-Ni合金层压而成的玻璃纤维(Fiber Glass)材质。其晶片级封装具有复数个影像传感器芯片与复数个锡球或凸块附着于其基材。复数个透镜置于透镜座,且其透镜座装配于影像传感器芯片上。其透镜座置于软性印刷电路板,且其电路板具有复数个耦合至锡球的焊点,以利影像传感器芯片的信号传输。另外,影像传感器芯片可与被动组件或其它并排(Side by Side)或堆栈结构形式的芯片封装。
本发明也提供一晶片级封装结构。其封装结构包含一金属合金基材,一第一芯片与一第二芯片、一第一介电层、一第二介电层、一接触导电层、一隔离层与锡球。第一芯片与第二芯片黏附于金属合金基材。第一介电层形成于金属合金基材,且填充于金属合金基材上的第一芯片与第二芯片以外的空隙。第二介电层形成于第二芯片上。接触导电层形成于第一芯片的第一金属接点与第二芯片的第二金属接点上,用以覆盖其第一金属接点与第二金属接点,且接触导电层个别地电性耦合至第一金属接点与第二金属接点。隔离层形成于接触导电层上,且其隔离层具有于接触导电层上的开口。锡球(或凸块(Bumps))焊于其开口之上,且个别地与接触导电层电性耦合。第一芯片可由数字信号处理器(DSP)的芯片、主动芯片(Active Die)、被动芯片(Passive Die)、支持性芯片、中央处理器的芯片或处理器的芯片等上述芯片选择的,且第二芯片为互补式金氧半导体(CMOS)影像传感器芯片。其影像传感器芯片可与数字信号处理器芯片、主动芯片、被动芯片、支持性芯片、中央处理器的芯片或并排结构的处理器芯片封装。
本发明还提供一晶片级封装结构。其封装结构包含一金属合金基材,一第一芯片与一第二芯片、一第一介电层、一第二介电层、一第一接触导电层与第二接触导电层、一隔离层与锡球。第一芯片黏附于金属合金基材。第一介电层形成于金属合金基材,且填充于金属合金基材上的第一芯片以外的空隙。第一接触导电层形成于第一芯片的第一金属接点上,用以覆盖其第一金属接点,且第一接触导电层个别地电性耦合至第一金属接点。第二芯片黏附至第一芯片。第二介电层形成于该第一介电层上,且填充于第二芯片以外的空隙,其第二介电层具有形成于第一接触导电层上的导孔(Via Hole)。第三介电层,形成于第二芯片上。第二接触导电层,形成于第二芯片的第二金属接点上,且填充于导孔,以覆盖第二金属接点,且第二接触导电层电性耦合至第二金属接点与第一接触导电层。隔离层形成于第二接触导电层上,且隔离层具有于第二接触导电层上的开口。锡球焊于其开口之上,且个别地与第二接触导电层电性耦合。第一芯片可由数字信号处理器的芯片、主动芯片、被动芯片、支持性芯片、中央处理器的芯片或处理器的芯片等上述芯片选择的,且第二芯片为互补式金氧半导体影像传感器芯片。其影像传感器芯片可与数字信号处理器芯片、主动芯片、被动芯片、支持性芯片、中央处理器的芯片或堆栈结构的处理器芯片封装。
本发明还提供一晶片级封装的方法。首先,形成一第一光阻图案于晶片上的复数个芯片的金属接点上,用以覆盖其金属接点。形成一二氧化硅层于第一光阻图案与复数个芯片上。而后,固化(Curing)二氧化硅层。移除第一光阻图案。切割于晶片上的复数个芯片以形成个别芯片。而后,选择适合的芯片并附着于金属合金基材。固化金属合金基材。形成一材料层于金属合金基材,以填充金属合金基材上的复数个芯片间空隙。固化材料层。形成第二介电层于材料层与金属接点上。此程序后,蚀刻金属接点上第二介电层部份区域,以形成于金属接点上的第一开口。固化第二介第层。形成接触导电层于第一开口上,以个别地与金属接点电性耦合。形成第二光阻层于接触导电层上。随后,移除第二光阻层的部分区域以形成第二光阻图案,并暴露接触导电层以形成第二开口。形成导电线路于第二光阻图案与第二开口上,且个别与接触导电层耦合。移除剩余的第二光阻层。随后,形成隔离层于倒电线路与第二介电层上。移除导电线路上的隔离层部分区域,以形成开口。固化隔离层。最终,焊接锡球于第三开口上。
本发明的影像传感器模块与晶片级封装能减少封装结构的成本,并提高其产量。再者,本发明的封装尺寸能易于适应至测试设备、封装设备等等。
附图说明
图1根据本发明的实施例,为影像传感器模块概要的示意图。
图2根据本发明的实施例,为并排结构封装的概要示意图。
图3根据本发明的实施例,为堆栈结构封装的概要示意图。
图4A至图4J根据本发明的实施例,为晶片级封装制造方法的概要示意图。
图5根据本发明的实施例,为多芯片级封装(Multi-CSP)的概要示意图。
图6根据本发明的实施例,为本发明应用于液晶显示器产业的概要示意图。
附图标号:
100 金属合金基材
101 晶片级封装
102 透镜座
103 软性电路板
104 影像传感器芯片
105 芯片
106 黏性材质
107 金属锡球
108 介电层
109 接触导电层
110 薄膜层
111 过滤层
112 隔离层
113 透镜
114 透镜
115 金属接点
116 金属接点
117 锡焊点
200 金属合金基材
201 影像传感器芯片
202 芯片
203 黏性材质
204 金属接点
205 第一介电层
206 接触导电层
207 第二介电层
208 锡球
209 隔离层
210 金属接点
300 金属合金基材
301 影像传感器芯片
302 芯片
303 第一介电层
304 第二介电层
305a 接触导电层
305b 接触导电层
306 隔离层
307 锡球
308 金属接点
309 金属接点
310a 黏性材质
310b 黏性材质
311 第三介电层
312 导孔
400 芯片
401 金属接点
402 第一光阻图案
403 介电层
404 切割线
405 金属合金基材
406 黏性材质
407 材料层
408 第一开口
409 第二介电层
410 接触导电层
411 第二光阻图案
412 第二开口
413 导线
414 隔离层
415 第三开口
416 锡球
417 切割线
600 基板
601 芯片级封装
具体实施方式
本发明某些类似的实施例将不详细描述其细节。然而,应理解者为本发明中所有的较佳实施例仅为例示之用,并非用以限制,因此除文中的较佳实施例外,本发明还可广泛地应用在其它实施例中。
不同组件的构成间并不特别描述其尺寸,放大某些相关组件的维度并省略无意义部分,以明白叙述并强调本发明的内容。
本发明的芯片(Die)可与被动组件(例如电容器)或其它具有并排(Side bySide)或堆栈结构的芯片封装。此集成电路(IC)封装技术得应用于半导体、液晶显示器及印刷电路板相关产业。
由上述可知,本发明提供一影像传感器模块,如图1所示。如组件101所示,为本发明的晶片级封装结构的横切面图。影像传感器模块包含一金属合金基材100、一晶片级封装101、一透镜座102以及软性电路板103。例如,金属合金基材100的材质包含Fe-Ni合金、Fe-Ni-Co合金、Cu-Fe合金、Cu-Cr合金、Cu-Ni-Si合金、Cu-Sn合金或Fe-Ni合金层压而成的玻璃纤维(FiberGlass)材质等等,其中基材的外型可为圆形或矩形。例如,Fe-Ni合金包含42%的Ni与58%的Fe。合金42的主要特性包含约4.0~4.7(ppm/℃)的热膨胀系数(CTE)、约12(W/m-℃)的导热度(thermal conductivity)、约70(μΩ-cm)的电阻率(electrical resistivity)以及大约620MPa的屈从弯曲疲乏强度(Yield BendFatigue Strength)。另外,Fe-Ni-Co合金包含ASTM F15或Kovar(29Ni17Co54Fe),其中Fe-Ni-Co合金的成分包含29%的Ni、17%的Co以及54%的Fe。同样地,Kovar的主要特性包含约5.1~8.7(ppm/℃)的热膨胀系数、约40(W/m-℃)的导热度以及约49(μΩ-cm)的电阻率。换言之,本发明的金属合金可利用于导线/导线架合金。如ASTMF30或合金42以及ASTMF15或Kovar等特别材质的合金已经获得较多接受度,因为上述合金的热膨胀系数与陶瓷匹配,且其具有较高的成型度(Formability)。本发明采用合金42与Kovar作为芯片载体。由上述可知,上述两组材质的热膨胀系数与热膨胀系数为2.3ppm/℃的硅材质,以及陶瓷基材的热膨胀系数(3.4-7.4ppm/℃)良好匹配。Kovar与合金42也具有较高的疲乏强度。合金42与大多数仅有380-550Mpa的铜合金相比,具有620Mpa的疲乏强度。其导线材质应为适合导电,以利信号的电气路径。此外,其导线材质应能抗腐蚀,以防护导线因为腐蚀所引起的电阻增加,导致电气故障,最终产生机械结构的断裂(Fracture)。本发明的导线材质可包含Fe-Ni合金、Fe-Ni-Co合金、Cu-Fe合金、Cu-Cr合金、Cu-Ni-Si合金、Cu-Sn合金或Fe-Ni合金层压而成的玻璃纤维材质等等。
晶片级封装101具有复数个影像传感器芯片104与芯片105,例如并排结构的数字信号处理(Digital Signal Process,DSP)芯片。请注意,芯片105为选择性的配置。影像传感器芯片104可为互补式金氧半导体影像传感器芯片。芯片105可自数字信号处理器的芯片、主动芯片(Active Die)、被动芯片(PassiveDie)、支持性芯片(support die)、中央处理器的芯片或处理器的芯片等上述芯片选择。影像传感器芯片104与芯片105通过并排结构的方式封装的。于晶片级封装101,影像传感器芯片104与芯片105利用具有良好导热性的紫外线固化(UV Curing)及/或热固化(Heat Curing)形式的黏性材质106,黏附至金属合金基材100。晶片级封装101具有复数个金属锡球107,做为信号传输途径。其金属锡球107可为锡球或凸块(Bumps)。
介电层108形成于金属合金基材100,且填充于金属合金基材100上的影像传感器芯片104与芯片105以外的空隙。介电层108的材质可为以硅胶为基(Silicon Rubber Based)的材质。
接触导电层109形成于影像传感器芯片104的金属接点115与芯片105的金属接点116上,用以覆盖金属接点115与金属接点116。此意味着,接触导电层109可个别电性耦合至金属接点115及金属接点116。接触导电层109的材质可自镍、铜、银及以上材质的组合选择的。
再者,覆盖薄膜层110于影像传感器芯片104上。薄膜层110的材质为二氧化硅、氧化铝(Al2O3)或氟聚合物(Fluoro polymer),通过旋转涂布(SOG)的方式以形成防护层。薄膜层110的厚度最好控制于0.2um以下,如此则不影响影像传感器芯片104的工作。薄膜层110可包含一过滤层111(非必需),例如,形成红外线过滤层于薄膜层110上,以做为一滤光器。
隔离层112形成于接触导电层109上,且隔离层112具有于接触导电层109上的开口。隔离层112并无覆盖于影像传感器芯片104的影像感测区域上,以利其感测影像。隔离层112的材质可自环氧类树脂(Epoxy)、树脂、硅氧类高分子(Siloxane polymer,SINR)、BCB(Benzocyclobutene)、PI(Polyimide)及以上材质的组合选择的。
透镜座102置于影像传感器芯片104之上,且透镜113与透镜114放置于透镜座102内。透镜座102置于软性电路板103内,且软性电路板103具有复数个耦合至金属锡球107的锡焊点117,以利传输信号。因此,本发明的透镜座102与软性电路板103的组合将具有如同探针卡(Probe Card)的功能,且能应用于多芯片级封装(Multi-CSP)的最终测试,如图5所示。
本发明也提供一晶片级封装结构,如图2所示。其封装结构包含金属合金基材200、影像传感器芯片201与芯片202、第一介电层205、接触导电层206、隔离层209以及锡球208。于一较佳实施例,金属合金基材200的材质包含Fe-Ni合金、Fe-Ni-Co合金、Cu-Fe合金、Cu-Cr合金、Cu-Ni-Si合金或Cu-Sn合金等,其中其基材的外形可为圆形或矩形。影像传感器芯片201与芯片202可通过并排结构的方式封装。影像传感器芯片201与芯片202利用具有良好导热性的紫外线固化及/或热固化形式的黏性材质203黏附至金属合金基材200。第一介电层205形成于金属合金基材200上,且填充于金属合金基材200上的影像传感器芯片201与芯片202以外的空隙。第一介电层205的材质可为以硅胶为底的材质。
第二介电层207形成于影像传感器芯片201之上,以覆盖影像传感器芯片201的感测区域。第二介电层207的材质为二氧化硅、氧化铝或氟聚合物,用以做为一防护层。此外可形成于一过滤层于第二介电层207,例如红外线过滤层,使做为一滤光器之用。于切割硅晶片程序之前,能通过晶片级的制程形成第二介电层207。
接触导电层206形成于影像传感器芯片201的金属接点210与芯片202的金属接点204之上,用以覆盖金属接点210与金属接点204。如此则接触导电层206将可个别电性耦合至金属接点210与金属接点204。接触导电层206的材质可自镍、铜、银及上述材质的组合选择的。金属接点210与金属接点204可为铝材质的接点。隔离层209形成于接触导电层206之上,且隔离层209具有于接触导电层206之上的开口。隔离层209的材质可自环氧类树脂、树脂、硅氧类高分子、BCB或PI选择。金属锡球208通过焊接的方式形成于其开口上,使金属锡球208能个别与接触导电层206电性耦合。金属锡球208可为锡球或锡凸块。
可选择芯片202为数字信号处理器的芯片、主动芯片、被动芯片、支持性芯片、中央处理器的芯片或处理器的芯片,且影像传感器芯片201为互补式金氧半导体影像感测芯片。影像传感器芯片201通过并排结构的方式与芯片202封装的。
再者,本发明也提供另一晶片级封装结构,如图3所示。于一较佳实施例,其芯片通过堆栈结构的方式封装的。其封装结构包含金属合金基材300、影像传感器芯片301与芯片302、第一介电层303、第二介电层304、第三介电层311、接触导电层305a、接触导电层305b、隔离层306以及锡球307。例如,金属合金基材300的材质包含Fe-Ni合金、Fe-Ni-Co合金、Cu-Fe合金、Cu-Cr合金、Cu-Ni-Si合金、Cu-Sn合金或Fe-Ni合金层压而成的玻璃纤维材质。其基材的外形可为圆形或矩形。影像传感器芯片301与芯片302是通过堆栈结构的方式封装的。芯片302利用具有良好导热性的紫外线固化及/或热固化形式的黏性材质310a黏附至金属合金基材300。第一介电层303形成于金属合金基材300之上,且填充于金属合金基材300上的芯片302以外的空隙。第一介电层303的材质可为以硅胶为基的材质。
接触导电层305a形成于芯片302的金属接点309之上,覆盖金属接点309,用以个别电性耦合至金属接点309。影像传感器芯片301利用具有良好导热性的紫外线固化及/或热固化形式的黏性材质310b黏附至芯片302。第二介电层304形成于第一介电层303之上,并填充于影像传感器芯片301以外的空隙,且第二介电层304具有形成于接触导电层305a上的导孔312。第二介电层304的材质可为硅胶、PI、硅氧类高分子、BCB等等。
此外,第三介电层311形成于影像传感器芯片301之上,藉以覆盖影像传感器芯片301的感测区域。然而,第三介电层311并不影响影像传感器芯片301的功能。第三介电层311的材质为二氧化硅、氧化铝或氟聚合物,藉以做为一防护层。可特别形成一过滤层于影像传感器芯片301的第三介电层311之上,例如一红外线过滤层,使其如同一滤光器般动作。于切割硅晶片的程序前,能通过晶片级制程形成第三介电层311。
接触导电层305b形成于影像传感器芯片301的金属接点308之上,且填充于导孔312,藉以覆盖金属接点308。此即,接触导电层305b能电性耦合至金属接点308与接触导电层305a。接触导电层305a与接触导电层305b的材质可自镍、铜、银及以上材质的组合选择。金属接点308与金属接点309可为铝接点。隔离层306形成于接触导电层305b之上,且隔离层306具有于接触导电层305b上的开口。隔离层306的材质可自环氧类树脂、树脂、硅氧类高分子、BCB、PI及以上材质的组合选择。
金属锡球307通过焊接的方式形成于其开口上,使其个别与接触导电层305b电性耦合。金属锡球307可为锡球或凸块。
可选择芯片302为数字信号处理器的芯片、主动芯片、被动芯片、支持性芯片、中央处理器的芯片或处理器的芯片,且影像传感器芯片301为互补式金氧半导体影像感测芯片。影像传感器芯片301通过堆栈结构的方式与芯片302封装的。
根据本发明的实施例,图4A至图4J为晶片级封装制造方法的概要示意图。
本发明提供一晶片级封装的方法。首先第一光阻图案402形成于一晶片上的复数个芯片400的金属接点401之上,藉以覆盖金属接点401,如图4A所示。一第一介电层形成于第一光阻图案402与芯片400之上。而后,固化其第一介电层。移除第一光阻图案402以形成一介电层403。介电层403是通过旋转涂布(SOG)的方式形成,使其动作如同一防护层,且其材质为二氧化硅。沿切割线404切割于晶片上的复数个芯片400,藉以形成个别的芯片,如图4B所示。可形成一过滤层于介电层403之上,且其过滤层可为红外线过滤层,如上述实施例所示。
于移除第一光阻图案402后,将加工的晶片进行背部研磨(Back Lapping)的程序,使晶片的厚度约为50-金属合金基材300μm。具有上述厚度的加工晶片易于切割,使于其晶片上的芯片400切割为个别的芯片。若加工晶片并不难切割,其背部研磨的步骤则可省略。芯片400包含至少两种类型的芯片。
而后,测试已切割的芯片,以自其中挑选合格良好的芯片400。筛选与安置(Pick and Place)合格的芯片400至两邻接芯片间较宽距离的金属合金基材405上,且其芯片400利用具有良好导热性的紫外线固化及/或热固化形式的黏性材质406,黏附至金属合金基材405。如图4C所示,通过紫外线光或热能的方式固化金属合金基材405。涂布黏性材质406于金属合金基材405之上,且黏性材质406的厚度最好为20-60μm。金属合金基材405的材质包含Fe-Ni合金、Fe-Ni-Co合金、Cu-Fe合金、Cu-Cr合金、Cu-Ni-Si合金、Cu-Sn合金或Fe-Ni合金层压而成的玻璃纤维材质等等,且其中其基材的外形可为圆形或矩形。
芯片400于其上表面具有金属接点401。本发明的黏性材质406最好为良好导热性的材质,因此能避免自芯片400与金属合金基材405间的温度差所产生的问题(例如应力)。
材料层407形成于金属合金基材405之上,以填充于芯片400与其邻近芯片400间的空隙,且材料层407的表面与芯片400的表面维持相同高度,如图4D所示。材料层407的材质可为紫外线固化或热固化形式的材质。随后,通过紫外线或热能固化材料层407。可通过网印法(Screen Printing)或微影法(Photolithography)形成材料层407。材料层407的功能如同一缓冲层,以减少因温度所产生的应力。材料层407可为紫外线固化及/或热固化的材质,例如,硅胶、环氧类树脂、树脂、BCB、硅氧类高分子、PI等等。涂布第二介电层409于材料层407与金属接点401上。第二介电层409的材质可为硅氧类高分子、BCB、PI、环氧类树脂等等。
而后,使用光罩以移除于金属接点401上的第二介电层409的部分区域,使形成第一开口408于金属接点401上,随后并通过紫外线或热能固化第二介电层409,如图4E所示。可使用电浆蚀刻(反应离子蚀刻(RIE))清洁金属接点401的表面,以确保无残留物质于金属接点401之上。
接触导电层410形成于第一开口408之上,用以个别与金属接点401电性耦合,如图4E所示。接触导电层410的较适合的材质为钛(Ti)、铜或其组合。金属接点401能通过物理方式、化学方式,或两者的组合的方式形成,例如化学气相沉积法(CVD)、物理气相沉积法(PVD)、溅镀法及电镀法。
形成一第二光阻层于接触导电层410上。使用光罩曝光及显影其第二光阻层的部分区域,以形成一第二光阻图案411,并曝光接触导电层410以形成第二开口412,如图4G所示。
随后,通过电镀法形成导线413于第二开口412上,使其个别与导线413耦合,如图4H所示。导线413的材质较适合为铜、钛、银或其组合。导线413称为重布层(RDL)。
移除剩余第二光阻图案411部分。形成一隔离层于导线413与第二介电层409上。移除隔离层的部份区域,以形成一隔离层414与于导线413上的第三开口415,如图4I所示。其隔离层能通过旋转涂布法或网印法移除。
本发明可选择性包含形成一环氧类树脂层(未显示)于金属合金基材405的背部表面。
固化隔离层414。凸块底层金属(Under Bump Metallization,UBM)(未显示)与锡球416形成于第三开口415上,如图4J所示。锡球416可通过网印法置于第三开口415上,且锡球416能通过红外线回焊法(IR Reflow)与导线413的表面接合。
最终,沿切割线417切割金属合金基材405,以分离个别的集成电路封装。
因此,本发明的影像传感器模块与晶片级封装能减少封装结构的成本,并提高其产量。再者,本发明的封装尺寸能易于适应至测试设备、封装设备等等。
此外,本发明能应用至半导体设备的封装与液晶显示器/印刷电路板设备的集成电路封装。图6根据本发明的实施例,为本发明应用于液晶显示器产业的概要示意图。形成面板级封装(PSP’s)601于基板600上。
对熟悉此领域技艺者,本发明虽以较佳实例阐明如上,然其并非用以限定本发明的精神。在不脱离本发明的精神与范围内所作的修改与类似的配置,均应包含在的权利要求内,此范围应覆盖所有类似修改与类似结构,且应做最宽广的诠释。
Claims (10)
1.一种应用于晶片级封装的影像传感器模块,其特征在于,该影像传感器模块包含:
一金属合金基材,其中该金属合金基材的材质包括Fe-Ni合金、Fe-Ni-Co合金、Cu-Fe合金、Cu-Cr合金、Cu-Ni-Si合金、Cu-Sn合金或Fe-Ni合金层压而成的玻璃纤维材质;
一影像传感器芯片,具有复数个耦合至所述的金属合金基材的锡球;
一防护层,形成于所述的影像传感器芯片的微透镜区域上;
一透镜座,具有复数个透镜,装配于所述的影像传感器芯片上;及
软性印刷电路板,具有复数个耦合至所述的锡球的导电性的焊点,用以传送所述的影像传感器芯片的信号,其中所述的透镜座置于所述的软性印刷电路板。
2.如权利要求1所述的应用于晶片级封装的影像传感器模块,其特征在于,所述的影像传感器模块包含一第二芯片,通过一并排结构或一堆栈结构的方式,与该影像传感器芯片封装。
3.如权利要求2所述的应用于晶片级封装的影像传感器模块,其特征在于,所述的第二芯片可由数字信号处理器的芯片、主动芯片、被动芯片、支持性芯片中央处理器的芯片或处理器的芯片等上述芯片选择的。
4.如权利要求2所述的应用于晶片级封装的影像传感器模块,其特征在于,该影像传感器模块还包含:
一第一介电层,形成于所述的金属合金基材上,且填充于所述的影像传感器芯片与所述的第二芯片以外的空隙;
一第二介电层,形成于所述的第二芯片上;
一接触导电层,形成于所述的影像传感器芯片的一第一金属接点上与所述的第二芯片的一第二金属接点上,以覆盖该第一金属接点与该第二金属接点,所述的接触导电层个别地电性耦合至所述的第一金属接点与所述的第二金属接点;
一隔离层,形成于所述的接触导电层上,且该隔离层具有于该接触导电层上的开口;以及
凸块底层金属与锡球(或凸块)焊于所述的开口之上,且个别地与所述的接触导电层电性耦合。
5.如权利要求4所述的应用于晶片级封装的影像传感器模块,其特征在于,所述的第一介电层的材质为硅胶。
6.如权利要求4所述的应用于晶片级封装的影像传感器模块,其特征在于,所述的第二介电层的材质为环氧类树脂、硅氧类高分子、BCB或PI。
7.如权利要求4所述的应用于晶片级封装的影像传感器模块,其特征在于,所述的隔离层的材质是由环氧类树脂、树脂、硅胶、硅氧类高分子、BCB、PI及以上材质的组合选择的。
8.如权利要求2所述的应用于晶片级封装的影像传感器模块,其特征在于,该影像传感器模块还包含:
一第一介电层,形成于所述的金属合金基材上,且填充于所述的第二芯片以外的空隙;
一第一接触导电层,形成于该第二芯片的一第一金属接点上,以完全覆盖所述的第一金属接点,所述的第一接触导电层电性耦合至该第一金属接点;
一影像传感器芯片,堆栈并附着至所述的第二芯片;
一第二介电层,形成于所述的第一介电层上,且填充于所述的影像传感器芯片以外的空隙,该第二介电层具有形成于所述的第一接触导电层上的导孔;
一第三介电层,形成于所述的影像传感器芯片上;
一第二接触导电层,形成于所述的影像传感器芯片的一第二金属接点上,且填充于所述的导孔,以覆盖该第二金属接点,该第二接触导电层电性耦合至第二金属接点与第一接触导电层;
一隔离层,形成于所述的第二接触导电层上,且该隔离层具有于该第二接触导电层上的开口;以及
锡球(或凸块)焊于所述的开口之上,且个别地与所述的第二接触导电层电性耦合。
9.如权利要求8所述的应用于晶片级封装的影像传感器模块,其特征在于,所述的第一介电层的材质为硅胶。
10.如权利要求8所述的应用于晶片级封装的影像传感器模块,其特征在于,所述的第二介电层的材质为PI、BT、硅氧类高分子、环氧类树脂或硅胶。
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- 2007-05-09 TW TW096116557A patent/TW200807702A/zh unknown
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- 2007-06-15 CN CNA2007101090429A patent/CN101110438A/zh active Pending
- 2007-07-10 DE DE102007031966A patent/DE102007031966A1/de not_active Ceased
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Also Published As
Publication number | Publication date |
---|---|
TW200807702A (en) | 2008-02-01 |
KR20080008255A (ko) | 2008-01-23 |
DE102007031966A1 (de) | 2008-01-31 |
US20080017941A1 (en) | 2008-01-24 |
SG139625A1 (en) | 2008-02-29 |
US20080020511A1 (en) | 2008-01-24 |
JP2008042899A (ja) | 2008-02-21 |
US7498646B2 (en) | 2009-03-03 |
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