CN101010655B - 协调多核处理器中的空闲状态转换 - Google Patents

协调多核处理器中的空闲状态转换 Download PDF

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CN101010655B
CN101010655B CN200580029671XA CN200580029671A CN101010655B CN 101010655 B CN101010655 B CN 101010655B CN 200580029671X A CN200580029671X A CN 200580029671XA CN 200580029671 A CN200580029671 A CN 200580029671A CN 101010655 B CN101010655 B CN 101010655B
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CN101010655A (zh
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A·纳维
A·门德尔森
I·安娜蒂
E·韦斯曼
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InterDigital CE Patent Holdings SAS
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Intel Corp
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
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    • G06F1/26—Power supply means, e.g. regulation thereof
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    • G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
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    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
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Abstract

管理处理器的系统和方法，用于在具有多个核心的处理器的核心检测命令，其中该命令请求将该核心转换到空闲状态。根据该命令和多核的每一个多核的空闲状态情况来管理该核心的功率消耗。

Description

协调多核处理器中的空闲状态转换
技术领域
本发明的一个或多个实施例一般地涉及功率管理。特别地，某些实施例涉及在多核处理器中的功率消耗管理。
背景技术
随着具有更多晶体管和更高频率的先进的中央处理单元(CPU)继续发展的趋势，计算机设计者和制造商通常会面临相应的功率和能量消耗的增加。另外，提供了更快和更小的部件的制造技术，同时也可能导致泄漏功率的增加。特别在移动计算的环境下，功率消耗的增加会导致过热，这会从负面影响性能，并会严重减少电池寿命。因为电池通常都具有有限的电量，所以移动计算系统的处理器超出必要的运转会比预期更快地耗尽该电量。
一些现代的移动计算系统尝试通过当没有指令要执行时，使处理器处于不同功率/空闲状态，来节省功率。然而应该注意，这些解决方法通常都是为单核处理器设计的。结果，在管理功率和进行功率状态转换决定时传统的方法只需要考虑单核的状态。另外，通常都是在操作系统(OS)层来实现功率管理，随着处理器结构变得更复杂，可能会使操作系统变得太慢。
发明内容
本发明一方面公开了一种用于协调多核处理器的空闲状态转换的方法。所述方法包括：在所述多核处理器的核心检测到请求将所述核心转换到空闲状态的命令；以及根据所述检测到的命令和所述多核中每一个核心的空闲状态情况，来管理所述核心的功率消耗。其中，管理所述核心的功率消耗包括：在将所述核心转换到空闲状态之前，在所述核心中启动专用的功率节约特性；判断所述多个核心中的每一个核心是否准备好进入空闲状态，即判断所述多个核心中的每一个核心是否都不是活动的；如果所述多个核心中的每一个核心都准备好进入空闲状态，则判断所述多个核心中的每一个核心是否检测到请求转换到公共的空闲状态的命令，所述转换到公共的空闲状态的命令请求将所述多个核心中的每一个核心都转换到相同的空闲状态；如果不是所有的核心都检测到所述请求转换到公共的空闲状态的命令，则将所述多个核心中的最浅的状态选择为空闲状态；启动共享的功率节约特性，所述启动共享的功率节约特性包括启动从降低所述处理器的性能状态、关闭共享的锁相环以及保存所述处理器的执行环境中选出的过程；以及将所述多个核心转换到空闲状态，其中将所述多个核心转换到空闲状态包括向芯片组发出信号，所述信号从包括读取事务、总线消息以及边带信号的组中选出。
本发明另一方面公开了一种设置在多核处理器中用于协调所述多核处理器的空闲状态转换的装置。所述装置包括硬件协调逻辑，所述硬件协调逻辑用于在所述多核处理器的核心检测到请求将所述核心转换到空闲状态的命令时根据所述检测到的命令和所述多个核心中每一个核心的空闲状态情况来管理所述核心的功率消耗。其中，所述硬件协调逻辑包括：用于在将所述核心转换到空闲状态之前在所述核心中启动专用的功率节约特性的部件；用于判断所述多个核心中的每一个核心是否准备好进入空闲状态、即判断所述多个核心中的每一个核心是否都不活动的部件；用于若所述多个核心中的每一个核心都准备好进入空闲状态则判断所述多个核心中的每一个核心是否检测到请求转换到公共的空闲状态的命令的部件，所述转换到公共的空闲状态的命令请求将所述多个核心中的每一个核心都转换到相同的空闲状态；用于如果不是所有的核心都检测到所述请求转换到公共的空闲状态的命令则将所述多个核心中的最浅的状态选择为空闲状态的部件；用于启动共享的功率节约特性的部件，该部件启动从降低所述处理器的性能状态、关闭共享的锁相环以及保存所述处理器的执行环境中选出的过程；以及用于将所述多个核心转换到空闲状态的部件，该部件向芯片组发出从包括读取事务、总线消息以及边带信号的组中选出的信号。
附图说明
通过阅读下面的说明书和附加的权利要求，并参考附图，本发明的实施例的各种优点对于本领域技术人员将会变得更加清楚，其中：
图1是根据本发明的一个实施例的多核处理器的例子的框图；
图2是根据本发明的一个实施例的计算系统的例子的框图；
图3是根据本发明的一个实施例的管理核心空闲功率的方法的例子的流程图；
图4是根据本发明的一个实施例的管理功率消耗的过程的例子的流程图；
图5A是根据本发明的一个实施例的启动专用功率节约特性的过程的例子的流程图；
图5B是根据本发明的一个实施例的启动共享功率节约特性的过程的例子的流程图；
图6A是根据本发明的一个实施例的探测命令的过程的例子的流程图；
图6B是根据本发明的一个替代实施例的探测命令的过程的例子的流程图；
图7是根据本发明的一个实施例的功率管理状态机的例子的状态图。
具体实施方式
图1示出了具有多个核心12(12a-12b)的处理器10，其中每个核心12都具有指令获取单元、指令解码器、一级(L1)缓存14(14a-14b)、执行单元等等。尽管这里描述的处理器10有两个核心12，本发明的实施例并不限于此。事实上，这里描述的技术对于需要关注功率消耗问题的任何多核结构都是有用的。因而，在不脱离这里描述的实施例的精神和范围的情况下，可以使用任意数量的核心。
每个核心12都能够探测请求将该核心12转换到空闲状态的命令。该命令可以发自于核心12内部或者来自核心12外部。空闲状态可以是一种处理器功率状态，诸如先进配置功率接口规范(ACPI，Ver.x285，2004年6月)中描述的“C状态”中的一个状态。通常，更深的空闲状态是与更低的功率消耗和更长的退出等待时间相关联的。下表给出了一种指定C状态等待时间的方法。还可以使用其他方法。
  域   字节长度   字节偏移  描述
  P_LVL2_LAT   2   96  进入和退出C2状态的最坏情况硬件等待时间，微秒为单位。值＞100指示该系统不支持C2状态。
  P_LVL3_LAT   2   98  进入和退出C3状态的最坏情况硬件等待时间，微秒为单位。值＞1000指示该系统不支持C3状态。
表1
处理器10可以具有由核心12共享的二级(L2)缓存20。另一方面，L1缓存14可以专用于它们各自的核心12。如下面将更详细讨论的，L1缓存14的专用性质提供了为每个核心进行功率管理的机会。核心12还具有专用的时钟输入15(15a-15b)，该时钟输入可以被选通以获得以每个核心为基础的功率节约。硬件协调逻辑16可以根据命令和多个核心12的每一个的空闲状态情况18(18a-18b)来管理给定核心12的功率消耗。通过协调多个核心12和多个空闲状态情况18，图示的处理器10能够支持更复杂的结构，并能够比传统的软件方法更快地响应环境的改变。图示的处理器10还可以使用协调逻辑16来在实际的功率状态转换之前启动功率节约特性。结果可以节约更多的功率。
例如，基于缺乏利用，可以确定C4状态适于第一核心12a。与其他C状态相比更深的C4状态通常与共享的资源相关，诸如封装宽度电压和/或频率设置。另一方面，第二核心12b可以处于活动状态。在这样的情况下，协调逻辑16可以将第一核心转换到“临时”状态，该状态可以涉及启动某些专用的功率节约特性，从而第一核心12a仍然能够节约功率。而且，如果第二核心12b接着接收到转换到C4状态的请求，协调逻辑16还可以启动共享功率节约特性，以在核心12被转换到C4状态期间节约更多功率。通过检测何时所有核心转换到相同的状态，可以为其它空闲状态获得相似的优点。
图2示出了具有处理器10’的系统22，该处理器具有多个核心12’(12a’-12b’)和硬件协调逻辑16’，如已经描述过的。图示的系统22还包括通过芯片组30耦合到处理器10’的一个或多个输/输出(I/O)设备24、随机存取存储器(RAM)26和只读存储器(ROM)28。RAM 26和ROM 28存储可以被核心12’作为一个或多个线程和/或进程来执行的指令32，而该指令32的执行可以导致功率消耗增加。当核心12’从芯片组30和/或操作系统(OS)接收到空闲状态转换命令，硬件协调逻辑16’就能够充分地减少系统22的功率消耗。
现在转到图3，示出了一种管理核心空闲功率的方法34。可以采用硬件和/或软件编程技术的任意组合来实现该方法34。例如，该方法34可以作为固定的功能性硬件、微码、或者其任意的组合实现于精简指令集计算机(RISC)多核处理器之中。特别地，处理框36用于在具有多个核心的处理器的核心检测命令。该命令可以请求该核心转换到空闲状态。在框38，根据该命令以及多个核心的每一个的空闲状态情况，来管理该核心的功率消耗。从而，当管理一个核心的空闲功率时，可以考虑到另一个核心的状态。
图4在框38’更详细地示出了一种管理功率消耗的方法。图示的框40用于在将核心转换到空闲状态之前，在该核心中启动专用的功率节约特性。这样的方法使得核心能够进入与空闲状态相当的状态，并可以使核心能够获得超过由空闲状态本身所提供的功率节约的功率节约。例如，如果所请求的空闲状态通常与专用时钟的选通(gating)相关联，框40就可以合并这样的特性。框42用于确定多个核心的每一个是否准备好进入空闲状态(也就是多个核心都不是活动的)。如果是这样，框43用于确定多个核心的每一个是否已经检测到请求转换到公共的(即相同的)空闲状态的命令。
如果不是所有的核心都转换到相同的空闲状态，在框52，将多个核心中的最浅的状态选择为空闲状态。这样，如果第一核心处于C2等同状态(即“CC2”状态)并且第二核心处于C3等同状态(即“CC3”状态)，最浅的状态将是C2/CC2等同状态。因此，尽管处理器内部会经历多个不同的空闲状态，但是芯片组会经历到该处理器的统一接口。这样的方法明显有别于传统的单核和多处理器结构。一旦已经识别了适当的空闲状态，在框44就启动共享功率节约特性。应该注意的是转换到空闲状态通常涉及选通时钟和暂停执行。然而，在框40和44启动的功率节约特性是在时钟可用并且一个或多个核心仍处于运转的期间实现的。该技术可以提供比传统方法明显的优点。
在框46，在共享状态进入过程正在进行期间，要防止诸如中断(interrupt)、异常、和监控事件的外部的中断(break)事件到达这多个核心。可以用多种方法来禁止中断事件。例如，一种方法是为进入每个核心的中断逻辑提供特殊的接口。另一种方法是将核心与所有的中断源物理地分开。如果在达到共享状态之后检测到中断事件，该共享状态被退出。可以用几种方法来实现这种退出。例如，芯片组可以检测中断事件和/或启动该退出序列，或者可以在处理器中提供逻辑来检测中断事件和/或启动该退出序列。当多核处理器退出空闲状态，就可以停止对外部中断事件的禁止。框48用于把多个核心转换到空闲状态。将这些核心转换到空闲状态可以涉及向芯片组发出诸如读取事务、特殊的总线消息或者边带信号(sidebandsignal)的信号。例如，一种方法是启动与芯片组的公知握手序列，其中在处理器和芯片组之间传输睡眠(即SLP)、深睡眠(即DPSLP)、更深睡眠(即DPRSLP)状态信号。
如果在框42确定多核的一个或多个核心是活动的，框56用于确定该空闲状态是否与多个核心共享的资源相关联。如已经说明的，该共享的资源可以是频率和/或核心电压设置。这样的状态的例子可以是C4状态。如果该空闲状态与共享的资源关联，在框58，该核心被转换到临时状态，直到多核的每一个都检测到请求转换到空闲状态的命令。否则，在框57，该核心可以被转换到所请求的状态。框50用于暂停该核心的执行。
现在转到图5A和5B，在框40’和44’分别对启动专用的和共享的功率节约特性的方法进行详细示出。特别地，在框60，L1缓存被清空到L2缓存中，并且在框62，该L1缓存被置于低功率的不可侦测(non-snoopable)状态。如果被清空的数据不是已经在L2缓存(当L1缓存处于不可侦测状态时，它处理侦测(snoop))中，该数据被进一步清空到系统存储器中。L1清空特性可以被用于C3和C33状态。框64用于选通该核心的专用时钟。
如果所有核心都准备好进入空闲状态，框66用于降低处理器的性能状态。性能状态典型地涉及调整共享资源设置，诸如核心电压和/或频率。下表描述了可以用于处理器核心的多个性能状态设置的例子。
  P状态   频率   电压
  P0   1.6GHz   1.484V
  P1   1.4GHz   1.420V
  P2   1.2GHz   1.276V
  P3   1.0GHz   1.164V
  P4   800MHz   1.036V
  P5   600MHz   0.956V
表II
在框70可以保存处理器的执行环境，并且在框68可以关闭共享的锁相环(PLL)。在图示的方法中，可以在已经完成了芯片组握手序列(handshake sequence)之后执行PLL关闭。如已经说明的，通过在核心还能够执行指令的时期启动诸如这些的先进功率节约特性，图示的方法相对于传统的技术提供有显著的优点。
图6A在框72更详细地示出了检测空闲状态转换命令的一种方法。这样，框72可以很容易地替代上述的框36(图3)。特别地，图示的框76用来检测标识地址的第一命令。一种这样的命令可以是MONITOR命令。在框76检测到第二命令，该第二命令指示核心在空闲状态中等待，直到遇到该地址。一种这样的命令可以是MWAIT(Cx)命令，其中“x”表示目标空闲状态。该MWAIT方法可以在优化为支持多核操作的处理器驱动器中实现。
图6B在框72’更详细地示出了用于检测空闲状态转换命令的一种替代方法。这样，框72’可以很容易地替代上述的框36。特别地，图示的框78用于接收标识空闲状态的I/O读取事务。一种这样的事务可以是Levelx_Rd事务，其中“x”表示目标空闲状态。这种类型的命令可以由芯片组和/或OS发出。框80用于将该I/O读取事务翻译为第二命令，该命令指示核心在空闲状态等待，直到遇到一个地址。这样，I/O读取事务可以被翻译成MWAIT命令。
现在转到图7，示出了一种多核状态机82的特定示例。为了便于讨论，将结合C4状态的目标状态来描述状态机82。例如，考虑两个核心都处于图示为状态84和86的活动状态C0的情况。如果第一核心(即core_0)接收到MWAIT(C4)命令(或I/O读取事务)，该第一核心会在箭头88被置于临时状态90。该临时状态90被图示为“CC3(C4)”。第一核心将启动各种专用的功率节约特性，诸如清空L1缓存并选通第一核心的专用时钟。如果遇到了中断或者指定的MONITOR地址，第一核心会在箭头92“中断”到活动状态84。当第一核心处于临时状态90，硬件协调逻辑会监控第二核心(即core_1)，以检测该第二核心何时准备好转换到C4状态。如果当第一核心处于临时状态90期间，第二核心接收到转换到C4状态的请求，该第二核心将在箭头96转换到临时状态94。
然后硬件协调逻辑会确定两个核心都已经检测到请求转换到C4状态的命令，并可以启动更先进的功率节约特性，诸如性能状态降低、关闭共享的PLL或者保存处理器的执行环境。在状态98，协调逻辑还可以禁止外部中断事件到达核心。一旦外部中断事件已经被禁止，协调逻辑可以将两个核心都转换到C4状态。特别地，在箭头100，可以发出I/O读取事务到芯片组，而核心在状态102等待完成通知。当接收到芯片组确认(例如STPCLK pin声明)和I/O循环完成通知，在箭头104，协调逻辑向芯片组发出一个停止准许(stop grant)信号，并在Stop_GNT状态106等待。然后整个处理器顺序通过睡眠(即SLP)、深睡眠(即DPSLP)、和更深睡眠(即DPRSLP)状态，其中深睡眠状态和更深睡眠状态分别对应于传统的C3和C4状态。
因而，通过这里描述的各种技术，可以获得一些优点。例如，使得软件能够为每个核心启动不同的空闲状态命令，这提供了最大的灵活性和功率节约。而且，通过以每个核心为基础在内部分析目标空闲状态(对比于仅外部的先后排序)，可以在时钟可用且一个或多个核心还在运转的时候启动先进的功率管理活动。还应该说明的是，当发送公共的“最浅”状态到芯片组和其他系统部件的时候，可以为每个核心建立独立的空闲状态。结果是获得了一种高度可扩展而复杂的方案。简而言之，这里讨论的在多核环境下对空闲状态的硬件协调可以提供相对于传统的结构和/或技术的显著的优点。
从前面的描述中本领域的技术人员可以理解，本发明的实施例的主要技术可以以各种形式来实现。因此，尽管这里结合特定的示例对本发明的实施例进行了描述，本发明的实施例的真实范围不应该被这样限制，因为熟练的专业人员可以通过学习附图、说明书和下面的权利要求，而清楚其它的修改。

Claims (17)

1.一种用于协调多核处理器的空闲状态转换的方法，包括：
在所述多核处理器的核心检测到请求将所述核心转换到空闲状态的命令；以及
根据所述检测到的命令和所述多核中每一个核心的空闲状态情况，来管理所述核心的功率消耗，
其中，管理所述核心的功率消耗包括：
在将所述核心转换到空闲状态之前，在所述核心中启动专用的功率节约特性；
判断所述多个核心中的每一个核心是否准备好进入空闲状态，即判断所述多个核心中的每一个核心是否都不是活动的；
如果所述多个核心中的每一个核心都准备好进入空闲状态，则判断所述多个核心中的每一个核心是否检测到请求转换到公共的空闲状态的命令，所述转换到公共的空闲状态的命令请求将所述多个核心中的每一个核心都转换到相同的空闲状态；
如果不是所有的核心都检测到所述请求转换到公共的空闲状态的命令，则将所述多个核心中的最浅的状态选择为空闲状态；
启动共享的功率节约特性，所述启动共享的功率节约特性包括启动从降低所述处理器的性能状态、关闭共享的锁相环以及保存所述处理器的执行环境中选出的过程；以及
将所述多个核心转换到空闲状态，其中将所述多个核心转换到空闲状态包括向芯片组发出信号，所述信号从包括读取事务、总线消息以及边带信号的组中选出。
2.权利要求1的方法，其中，将所述多个核心转换到空闲状态包括：
选通与所述空闲状态相关联的时钟；以及
暂停所述多个核心的执行。
3.权利要求1的方法，其中，在启动共享的功率节约特性期间：
禁止外部中断事件到达所述多个核心。
4.权利要求1的方法，其中，所述管理所述核心的功率消耗还包括：
如果所述多个核心中的一个或多个核心没有准备好进入所述空闲状态，则确定所述空闲状态是否与所述多个核心共享的资源相关联；
如果所述空闲状态与被所述多个核心共享的资源相关联，则将所述核心转换到临时状态，直到所述多个核心中每一个核心都已经检测到请求转换到空闲状态的命令。
5.权利要求4的方法，其中，所述管理所述核心的功率消耗还包括：
如果所述空闲状态没有与被所述多个核心共享的资源相关联，则将所述核心转换到所述空闲状态。
6.权利要求1的方法，其中，所述启动专用的功率节约特性包括：
将所述核心的一级缓存清空到所述处理器的二级缓存；
将所述一级缓存置于不可侦测状态；以及
选通所述核心的专用时钟。
7.权利要求1的方法，其中，所述检测到请求将所述核心转换到空闲状态的命令包括：
检测标识地址的第一命令；以及
检测指示所述核心在所述空闲状态等待直到遇到该地址的第二命令。
8.权利要求1的方法，其中，所述检测到请求将所述核心转换到空闲状态的命令包括：
接收标识所述空闲状态的输入/输出读取事务；以及
将所述输入/输出读取事务翻译成第二命令，所述第二命令指示所述核心在所述空闲状态等待直到遇到地址。
9.权利要求1的方法，其中，所述空闲状态为C状态。
10.一种设置在多核处理器中用于协调所述多核处理器的空闲状态转换的装置，所述装置包括硬件协调逻辑，所述硬件协调逻辑用于在所述多核处理器的核心检测到请求将所述核心转换到空闲状态的命令时根据所述检测到的命令和所述多个核心中每一个核心的空闲状态情况来管理所述核心的功率消耗，
其中，所述硬件协调逻辑包括：
用于在将所述核心转换到空闲状态之前在所述核心中启动专用的功率节约特性的部件；
用于判断所述多个核心中的每一个核心是否准备好进入空闲状态、即判断所述多个核心中的每一个核心是否都不活动的部件；
用于若所述多个核心中的每一个核心都准备好进入空闲状态则判断所述多个核心中的每一个核心是否检测到请求转换到公共的空闲状态的命令的部件，所述转换到公共的空闲状态的命令请求将所述多个核心中的每一个核心都转换到相同的空闲状态；
用于如果不是所有的核心都检测到所述请求转换到公共的空闲状态的命令则将所述多个核心中的最浅的状态选择为空闲状态的部件；
用于启动共享的功率节约特性的部件，该部件启动从降低所述处理器的性能状态、关闭共享的锁相环以及保存所述处理器的执行环境中选出的过程；以及
用于将所述多个核心转换到空闲状态的部件，该部件向芯片组发出从包括读取事务、总线消息以及边带信号的组中选出的信号。
11.权利要求10的装置，其中，所述用于启动共享的功率节约特性的部件还禁止外部中断事件到达所述多个核心。
12.权利要求10的装置，所述硬件协调逻辑还包括用于实现以下功能的部件：
如果所述多个核心中的一个或多个核心没有准备好进入所述空闲状态则确定所述空闲状态是否与所述多个核心共享的资源相关联，
如果所述空闲状态与所述多个核心共享的资源相关联，则所述核心将自己转换到临时状态直到所述多个核心的每一个核心已经检测到请求转换到所述空闲状态的命令。
13.权利要求12的装置，所述硬件协调逻辑还包括用于实现以下功能的部件：
如果所述空闲状态不与所述资源相关联，则所述核心将自己转换到所述空闲状态。
14.权利要求10的装置，其中，所述多核处理器具有由所述多个核心共享的二级缓存，所述核心包括专用于所述核心的一级缓存以及专用于所述核心的时钟，其中所述核心可以把所述一级缓存清空到所述二级缓存并将所述一级缓存置于不可侦测状态以及选通所述时钟。
15.权利要求10的装置，其中，所述核心将检测标识地址的第一命令，并检测指示所述核心在所述空闲状态等待直到遇到所述地址的第二命令。
16.权利要求10的装置，其中，所述核心将接收标识所述空闲状态的输入/输出读取事务，并且将所述输入/输出读取事务翻译成第二命令，所述第二命令指示所述核心在所述空闲状态等待直到遇到一个地址。
17.权利要求10的装置，其中，所述空闲状态为C状态。
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