CN100593218C - 用于操作闪存装置的方法 - Google Patents

用于操作闪存装置的方法 Download PDF

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Publication number
CN100593218C
CN100593218C CN200610059158A CN200610059158A CN100593218C CN 100593218 C CN100593218 C CN 100593218C CN 200610059158 A CN200610059158 A CN 200610059158A CN 200610059158 A CN200610059158 A CN 200610059158A CN 100593218 C CN100593218 C CN 100593218C
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error
single position
correcting code
erase process
failure
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CN1892910A (zh
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T·克尔恩
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Infineon Technologies AG
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Qimonda Flash GmbH
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/14Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436Arrangements for verifying correct programming or erasure
    • G11C16/3468Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing

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  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

如果没有超过符合错误校正码标准的最大单个位失败的个数,则应用错误校正码,并且审查通过擦除过程已完成。

Description

用于操作闪存装置的方法
技术领域
本发明涉及闪存装置的擦除过程,其中同时擦除块、页或任何其它位簇。
背景技术
电可擦写可编程的非易失性存储装置可以实现为闪存装置,其中存储单元被分别编程,但是按块或按页擦除。一种类型的闪存包括电荷捕获存储单元,该存储单元具有电介质材料的存储层序列,其中存储层被布置在比存储层的材料具有更大能带间隙的电介质材料的限制层之间。存储层序列位于半导体材料的沟道区域和栅电极之间的半导体表面,所述栅电极用来借助于施加的电压控制沟道。电荷捕获存储单元的例子是SONOS存储单元,其中每个限制层是半导体材料的氧化物,并且存储层是半导体材料的氮化物,所述半导体材料通常是硅(US 5,768,192,US6,011,725)。
在闪存装置中,块或页被同时擦除。这意味着没有单个位(singlebit)被独立擦除,而是当执行擦除时同时对特定数目的存储单元进行寻址。因为不能保证对所有相关存储单元的彻底完全的擦除,擦除之后通常跟随检验步骤,其中检测单个位的失败并且如果需要的话重复擦除过程,直到验证了所有相关位已被擦除。为了保证最终获得完全的擦除,可以利用增加电压或对操作参数的其它修改来影响擦除的重复过程。这样做的缺点是可能发生过度擦除,过度擦除会导致存储单元的耐久性下降以及数据保存能力降低。重复擦除过程致使擦除时间增加,因而写入性能低下。
发明内容
本发明的目的是提出一种操作闪存装置的方法,该方法改善和帮助加快擦除和写入过程,同时保护足够的耐久性和数据保存能力。
本发明的另一个目的是在防止对存储单元过度擦除的同时保证充分擦除。
依照本发明的操作闪存装置的方法在擦除过程中也使用错误校正码。对于每个同时擦除的存储单元组,例如该装置的存储单元阵列的每个块或页,检测和记录在擦除过程中出现的单个位失败的个数。如果单个位失败的个数符合错误校正码的标准,则审查通过,该擦除过程已完成。否则,进行再一次擦除,直到实现足够充分的擦除,即符合通过应用错误校正码定义的条件。例如,所述标准可以是在擦除的各组中所有单个位失败个数的和不超过给定的可容许的最大总失败个数。或者,如果在每个擦除组中至多有固定的单个位失败个数例如五个,或由错误校正码指定的变化的单个位失败个数已被验证,则审查通过,擦除过程已完成。优选地,错误校正码也用来依照错误校正码的标准用法在读和写操作中校正信息位。因此,配备的错误校正码电路可以一方面服务于依照本发明的特殊应用,一方面以一般方式用来校正存储的信息位。
根据附图和后面对附图的简短描述、详细的说明书和所附的权利要求,本发明的这些和其它特征和优点将变得显而易见。
附图说明
图1示出了表示本发明方法的相关步骤的流程图;
图2示出了优选实施例的存储装置的框图。
具体实施方式
本发明的方法在对擦除过程的验证中允许单个位失败。这是通过应用错误校正码而可能实现的,错误校正码在擦除过程中也可用,优选适合校正每块或每页的最多五个位。基于这个错误校正码,即使不满足完全擦除的标准,也可以审查通过擦除过程已完成。可以忽略花费更多时间才能擦除的位,能够减少擦除时间。由于单元偏差,这个改善可能非常重要。另外,减少擦除时间也减小了施加在已充分擦除的存储单元上的应力,并且避免强制这些单元处于过度擦除状态。避免过度擦除显著增加了可能的写循环次数,并且还改善了循环之后的数据保存。错误校正码可以被完全应用或只部分应用,以便留出足够的能力用于普通的编程操作。错误校正码在擦除过程和在普通的读写操作中以大体上相同的方式工作,其中所述错误校正码用来校正或修复存储信息中的损坏位。
附图的流程图示出了依照本发明的方法的优选示例的步骤。通过施加第一擦除脉冲,擦除过程开始。然后对第一块或页和其后的块或页顺序验证擦除的结果。为每个块或页记录和存储单个位失败的个数。通过评估单个位失败个数的和并且将之与错误校正码先前定义的标准比较,来进行最终评价。如果满足所述标准,则审查通过擦除过程已完成。相反,将擦除脉冲数加一,重复所描述的程序步骤序列。每次重复执行时可以增加所施加的擦除电压,或进行有助于彻底擦除的对擦数参数的其它修改。这将保证正确擦除足够数目的位,从而满足错误校正码的标准。如果满足了标准,则认为擦除过程已经彻底完成,并且应用错误校正码来校正被擦除存储单元的实际状态与擦除状态的任何偏差。
尽管详细描述了本发明和其优点,但应理解的是,在不偏离所附权利要求书定义的本发明的精神和范围的条件下可以对本发明进行各种修改、替换和变化。

Claims (4)

1.用于操作闪存装置的方法,包括:
-应用错误校正码;
-存储单元阵列被划分成存储单元组;
-所述每个组被同时擦除;
-为每个擦除组检测和记录在擦除过程中单个位失败的个数;
-如果所述单个位失败的个数符合所述错误校正码的标准,则审查通过,所述擦除过程已完成;和
-如果所述单个位失败的个数不符合所述错误校正码的标准,则再一次执行擦除过程。
2.如权利要求1所述的方法,还包括:
-将所述单个位失败的个数相加得到所述个数的和;以及
-所述错误校正码的所述标准是容许的最大失败总数。
3.如权利要求1所述的方法,还包括:
-所述错误校正码还用来校正读写操作中的信息位。
4.如权利要求1到3中其中一项所述的方法,还包括:
-如果在每个擦除组中至多有固定的单个位失败个数,或由错误校正码指定的变化的单个位失败个数已被验证,则可以审查通过,擦除过程已完成。
CN200610059158A 2005-03-15 2006-03-15 用于操作闪存装置的方法 Expired - Fee Related CN100593218C (zh)

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US11/081,085 US7158416B2 (en) 2005-03-15 2005-03-15 Method for operating a flash memory device
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JP4994112B2 (ja) * 2007-05-22 2012-08-08 ルネサスエレクトロニクス株式会社 半導体集積回路装置およびメモリ制御方法
JP2009129070A (ja) * 2007-11-21 2009-06-11 Hitachi Ltd フラッシュメモリ記憶装置の制御方法、その方法を用いたフラッシュメモリ記憶装置及びストレージシステム
US8001432B2 (en) * 2008-11-20 2011-08-16 Lsi Corporation Uninitialized memory detection using error correction codes and built-in self test
US8248850B2 (en) * 2010-01-28 2012-08-21 Sandisk Technologies Inc. Data recovery for non-volatile memory based on count of data state-specific fails
US8713406B2 (en) * 2012-04-30 2014-04-29 Freescale Semiconductor, Inc. Erasing a non-volatile memory (NVM) system having error correction code (ECC)
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JP2006260753A (ja) 2006-09-28
US20060209609A1 (en) 2006-09-21
CN1892910A (zh) 2007-01-10
US7158416B2 (en) 2007-01-02
EP1703522A1 (de) 2006-09-20

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