CN100424721C - Method for fabricating and packaging chips and elements to smart card with plastic package technique - Google Patents

Method for fabricating and packaging chips and elements to smart card with plastic package technique Download PDF

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Publication number
CN100424721C
CN100424721C CNB2006101147386A CN200610114738A CN100424721C CN 100424721 C CN100424721 C CN 100424721C CN B2006101147386 A CNB2006101147386 A CN B2006101147386A CN 200610114738 A CN200610114738 A CN 200610114738A CN 100424721 C CN100424721 C CN 100424721C
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Prior art keywords
chip
pcb substrate
smart card
packaged
elements combination
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CN1952958A (en
Inventor
于赓
孙军洲
支军
王鹿童
蔡卫华
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RDA Microelectronics (Shanghai) Corp. Ltd.
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POENIX MCROELECTRONIC (CHINA) CO Ltd
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Priority to CNB2006101147386A priority Critical patent/CN100424721C/en
Publication of CN1952958A publication Critical patent/CN1952958A/en
Priority to PCT/CN2007/070888 priority patent/WO2008061464A1/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745Mounting details of integrated circuit chips
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5388Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates for flat cards, e.g. credit cards
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Theoretical Computer Science (AREA)
  • Credit Cards Or The Like (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

This invention belongs to intelligent card and its module process technique field and to one method to seal chip and parts by use of plastic sealing process. The method designs double side PCB base board or multiple layers of PCB baseboards and adopt new sealing process technique to seal multiple chip and element into Plug-in SIM card or to directly seal the multiple chip or element into Plug-in size SIM card.

Description

Adopt plastic package process chip and elements combination to be packaged into the method for smart card
Technical field
The invention belongs to smart card and module manufacturing technology field thereof, be specifically related to a kind of method that adopts plastic package process chip and elements combination to be packaged into smart card.
Background technology
Since smart card emerges, go through the development of many decades, formed its unique processing process.Use to such an extent that be that chip is packaged into module earlier the most widely at present, again module is implanted on the card base.Because the technical development of smart card is the technical standard IS07816 of continuity magnetic card, its apparent size is 85.60mm * 53.98mm * 0.76mm, has only the business card size.Particularly the SIM card of Plug-in size has only 25mm * 15mm * 0.76mm size especially.
On smart card, carry out the processing and fabricating of IC-card, be subjected to the restriction of card sizes.The packaging technology of intelligent card chip is different with the main flow semiconductor packaging process, has adopted a kind of special process that is called the Soft Roll envelope.Soft Roll envelope technology has four characteristics: the firstth, and adopt single face to cover the resin of copper or glass fibre band carrier band, and on the resin aspect, remain for the electrical connecting position of chip and Copper Foil contact in advance as module package; The secondth, adopt special adhesive material and sealing adhesive process, with UV glue (ultraviolet irradiation curing glue) or heat-curable glue (black glue), these two kinds of glue all are the gluing attitudes at normal temperatures, after being coated to chip surface, adopt UV ultraviolet ray irradiation (UV glue) or high-temperature baking (black glue) to make it to solidify; The 3rd is in potting process, generally without mould, but use the needle tubing injection system, directly colloid is coated on the chip surface, seal and make module being attached to spun gold that single face covers chip on the copper bar band and welding, and generally all only encapsulate a chips; The 4th is the useful area of the area of encapsulated modules less than band, is used to stick on the card body because will reserve the part area on the band.
Along with the development of smart card application technologies and chip design art, the application technology intension of smart card has broken through tradition, develops into complicated chip functions, or even multicore sheet and electronic component combined system.This has proposed great challenge to the employed soft encapsulation technology of traditional smart card module, the original characteristics of soft encapsulation are faced with significant limitation on the contrary: the firstth, the band intelligence that single face covers copper be used for and chip between very simply be electrically connected, be difficult to satisfy the cabling requirement of tens of even up to a hundred lead-in wires between the multicore sheet; The secondth, the packaged type of UV glue (ultraviolet irradiation curing glue) or heat-curable glue (black glue), package area and package strength aspect all a little less than, because of the flowability of colloid very big, outward appearance control difficulty to product, the thickness of the module after the encapsulation, the consistance of diameter are very poor, road, back manufacturing card has been brought trouble, and cured density is lower, can't carries out effectively long-term protection multicore sheet and spun gold bonding wire; The 3rd is the useful area of the area of encapsulated modules less than band, is used for pasting on the card body because will reserve the part area on the band, has wasted original just very limited space, is difficult to satisfy the requirement of multichip system to package area.Therefore, must seek the encapsulation making that new method realizes the smart card module of a plurality of chip complication systems.
Summary of the invention
The objective of the invention is to limitation at above-mentioned smart card traditional diamond-making technique, proposed to adopt plastic package process chip and elements combination to be packaged into the method for smart card, thereby the encapsulation that has realized the smart card module of a plurality of chip complication systems is made, make smart card externally under the situation of size constancy, built-in function and performance are achieved important breakthrough.
Technical scheme of the present invention is as follows: adopt plastic package process that chip and elements combination are packaged into the method for smart card, comprise the steps:
(1), designs and makes two-sided PCB substrate or multi-layer PCB substrate according to the logic connecting relation between chip and the elements combination;
(2) adopt surface mount process that element pasted on surface is mounted on the position of components that designs in advance on the PCB substrate one by one, cross Reflow Soldering and make it to solidify;
(3) with Heraeus chip is mounted on the chip position that designs in advance on the PCB substrate one by one, and the coherent signal line on pad on the chip and the PCB substrate is welded together;
(4) plastic package die that will comprise rectangular cavities places on the PCB substrate Working position, the element of want plastic packaging, chip and bonding wire are covered fully, plastic packaging material is poured into cavity body of mould, make it to fill the space between full chip, element and the mould, and heating makes it to solidify formation multicore sheet and the surperficial smart card module that pastes elements combination;
(5) with the Die cutting tool that designs shape of the module behind the plastic packaging, punch out needed outer shape;
(6), on intelligent card body assigned position, mill out and mounted the consistent rectangle cell body of module size according to modular shape and size;
(7) adopt cold glue or hot melt adhesive technology, the module that plastic packaging is encapsulated is implanted in the cell body of intelligent cards;
(8) on packaged intelligent cards, punch out Plug-in SIM card shape according to standard size.
Further, aforesaid employing plastic package process is packaged into the method for smart card with chip and elements combination, and two-sided PCB substrate described in the step (1) comprises contact face Copper Foil, resin bed, solder joint wiring side Copper Foil, connects the via hole of each layer wiring; Described multi-layer PCB substrate comprises contact face, resin bed, wiring layer, insulation course, solder joint wiring layer, connects the via hole of each layer wiring.No matter be two-sided or the general thickness of multi-layer PCB substrate must be controlled between the 0.16-0.24mm.
Further, aforesaid employing plastic package process is packaged into the method for smart card with chip and elements combination, and the rectangular cavities of mould is right angle rectangle or round rectangle in the step (4).
Further, aforesaid employing plastic package process is packaged into the method for smart card with chip and elements combination, and the die-cut mode in the step (5) can substitute with the cut mode.
The another kind of plastic package process that adopts is packaged into the method for smart card with chip and elements combination, comprises the steps:
(1), designs and makes two-sided PCB substrate or multi-layer PCB substrate according to the logic connecting relation between chip and the elements combination;
(2) adopt surface mount process that element pasted on surface is mounted on the position of components that designs in advance on the PCB substrate one by one, cross Reflow Soldering and make it to solidify;
(3) with Heraeus chip is mounted on the chip position that designs in advance on the PCB substrate one by one, and the coherent signal line on pad on the chip and the PCB substrate is welded together;
(4) will comprise plastic package die with the size of Plug-in SIM card and the corresponding to rectangular cavities of profile standard as on the PCB substrate Working position, the element of want plastic packaging, chip and bonding wire are sealed fully, plastic packaging material is poured into cavity body of mould, make it to fill the space between full chip, element and the mould, and heating makes it to solidify formation multicore sheet and the surperficial smart card module that pastes elements combination;
(5) the card body behind the plastic packaging is processed, punched out needed outer shape.
Further, aforesaid employing plastic package process is packaged into the method for smart card with chip and elements combination, and two-sided PCB substrate described in the step (1) comprises contact face, resin bed, solder joint wiring side, connects the via hole of each layer wiring; Described multi-layer PCB substrate comprises contact face, resin bed, wiring layer, insulation course, solder joint wiring layer, connects the via hole of each layer wiring.No matter be two-sided or the general thickness of multi-layer PCB substrate must be controlled between the 0.16-0.24mm.
Further, aforesaid employing plastic package process is packaged into the method for smart card with chip and elements combination, includes a plurality of rectangular cavities on a mould in the step (4).
Further, aforesaid employing plastic package process is packaged into the method for smart card with chip and elements combination, and the die-cut mode in the step (5) can substitute with the cut mode.
The present invention adopts two-sided PCB substrate or the design of multi-layer PCB substrate, can satisfy the cabling requirement of a large amount of lead-in wires between multicore sheet and the element, realizes being electrically connected between a plurality of chips and the element.In addition,, use die package, the outward appearance of module is controlled, guaranteed the stable, regular of module profile, thereby guarantee the steady quality of packaging appearance precision and module owing to adopt module plastic packaging mode.The product design consistance is higher, and road fabrication operation in back is brought great convenience.And pcb board and element, the unified encapsulation of chip, saved and be used for the area pasted with the card body, for increase element, chip has been expanded certain space.
Description of drawings
Fig. 1 is for being packaged into multicore sheet and elements combination the cross sectional representation of smart card.
Fig. 2 is two-sided PCB substrate cross sectional representation.
Fig. 3 is a smart card signal contacting points position synoptic diagram.
Fig. 4 is an electric shock electrode district synoptic diagram.
Fig. 5 puts synoptic diagram for the subsides welding position of chip and element.
Fig. 6 a is a right angle rectangular cavities module plastic packaging face synoptic diagram.
Fig. 6 b is a round rectangle cavity module plastic packaging face synoptic diagram.
Fig. 7 is for milling out the cell body location drawing of placing smart card on the card body.
Fig. 8 implants synoptic diagram for module.
Fig. 9 is for to cut SIM card shape synoptic diagram in packaged intelligent cards upper punch.
Figure 10 arranges synoptic diagram for Plug-in SIM smart card encapsulation back on pcb board.
Figure 11 is 4 layers of PCB substrate cross sectional representation.
Among the figure, 1.PCB substrate, 2. surface mount elements, 3. chip, 4. capsulation material, 5. spun gold, 6. contact face, 7. resin bed, 8. solder joint wiring side, 9. via hole, 10. position of components, 11. chip positions, 12. smart card modules, 13. card bodies, 14. cell bodies, 15.Plug-in SIM smart card, 16. contact face, 17. resin beds, 18. wiring layers, 19. insulation courses, 20. wiring layers, 21. resin beds, 22. solder joint wiring layers, 23. via holes
Embodiment
The present invention is described in further detail below in conjunction with drawings and Examples.
Embodiment 1
Multicore sheet and elements combination are packaged into smart card as shown in Figure 1, mainly comprise: pcb board 1, element 2, chip 3, capsulation material 4.The method for making step is as follows:
(1) design and produce two-sided PCB substrate: the major function of PCB substrate provides being electrically connected mutually between each components and parts on the plate, the tiny line material that can see on the surface of plate is a Copper Foil, originally Copper Foil covers on the whole plank, and in manufacture process etched disposing partly, the part that stays has just become netted tiny circuit.These circuits are known as lead (conductor pattern) or claim wiring.All there is wiring on dual platen (Double-Sided Boards) two sides.The lead on two sides connects by the lead of via hole (via) to the two sides.Because the wiring of dual platen can intermesh (can around to another side), be suitable for use on the comparatively complicated circuit.The thickness of two-sided PCB substrate is 0.20mm, institute's cloth cabling is very fine and closely woven, bonding pad area and spacing are all very little, generally between tens microns, reached the limit of PCB design and processing dimension, but when design pcb board need provide contact face 6, resin bed 7, solder joint wiring side 8, via hole 9 realize between each components and parts of smartcard internal connection or with being connected of external unit, two-sided PCB substrate xsect is as shown in Figure 2.Contact face needs the size positions according to the ISO/IEC7816 standard code, and as shown in Figure 3, concrete size sees Table 1, provides 8 contact electrode districts, as shown in Figure 4.
Table 1 contacting points position size table
A B C D
C1 10.25 12.25 19.23 20.93
C2 10.25 12.25 21.77 23.47
C3 10.25 12.25 24.31 26.01
C4 10.25 12.25 26.85 28.55
C5 17.87 19.87 19.23 20.93
C6 17.87 19.87 21.77 23.47
C7 17.87 19.87 24.31 26.01
C8 17.87 19.87 26.85 28.55
(2) mount the SMT element: with conducting resinl element 2 is mounted on the position of components 10 that designs in advance on the PCB substrate solder joint wiring side 8 one by one, crosses Reflow Soldering and make it to solidify, see Fig. 1, Fig. 5.
(3) mount, welding chip: with Heraeus chip 3 is mounted on the PCB substrate solder joint wiring side 8 chip position 11 of design in advance one by one, and the coherent signal line on pad on the chip and the PCB substrate is welded with spun gold 5.See Fig. 1, Fig. 5.
(4) module plastic packaging: for conveniently implanting on the thick card body of 0.8mm, module gross thickness behind the plastic packaging is preferably 0.60mm, the general thickness of two-sided PCB substrate is 0.2mm, then module plastic packaging thickness is 0.4mm, and the designed height that goes out to comprise the plastic package die inner rectangular cavity of rectangular cavities should be 0.4mm.Adopt the plastic package process technology and equipment, with mould as on PCB substrate 1 Working position, the element 2 of want plastic packaging, chip 3 and spun gold 5 are sealed fully, plastic packaging material 4 (the plastic sealing semiconductor device material generally is the toner of fine particle shape) is poured into cavity body of mould, make it to fill the space between full chip, element and the mould.And heating makes it to solidify, and is formed with 8 and meets ISO/IEC7816 standard contacts and integrated multicore sheet and surface and paste the smart card module of elements combination; For abundant the utilized space of expansion module, with the band scope of gluing on the conventional module all plastic packaging in module, form rectangular module, can obtain maximum encapsulated space, so that seal more chip and element.The rectangular cavities of mould can be designed to the right angle rectangle, also can be designed to round rectangle (generally the cell body that mills out with milling cutter is a round rectangle) on the card body, shown in Fig. 6 a, 6b.
(5) module cutting: the module behind the plastic packaging, the Die cutting tool (perhaps using cut) with designing shape scales off and punches out needed outer shape from PCB substrate 1 upper punch.
(6) the smart card system is done: according to modular shape and size, mill out and the cell body 14 that is mounted the modular shape consistent size on card body 13 assigned positions, as shown in Figure 7.
(7) module is implanted: adopt with the normal procedure intelligent card and implant the identical process of technology (cold glue or hot melt adhesive technology all can), the module 12 that plastic packaging is encapsulated is implanted in the cell body 14 of intelligent cards, sees Fig. 8.Cold glue technology is to splash into liquid Instant cement to drip in milling good groove in advance, and module is put into groove, applies certain pressure on module top with foundary weight, makes module and card body bonding firmly; Hot glue technology then is to paste adhesive tape on module, module is put into milled good groove, and module top is pushed down with the foundary weight of heating, makes module and card body bonding firmly.
(8) SIM card shape punching: punching goes out SIM card 15 shapes according to standard size on packaged intelligent cards, as shown in Figure 9.
Embodiment 2
Multicore sheet and elements combination directly are packaged into smart card as shown in Figure 1, mainly comprise: pcb board 1, element 2, chip 3, capsulation material 4.The method for making step is as follows:
(1) designs and produces 4 layers of PCB substrate: in order to increase the area that can connect up, can adopt multilayer board (Multi-Layer Boards), 4 layers of pcb board for example, 4 laminates are two layers of wiring layers of inner increase on the basis of dual platen, add one deck resin bed between every layer of wiring layer, the tiny copper foil circuit of PCB substrate surface is suitable for use on the more complicated circuit because wiring can intermesh (can around to another side).Consider that plastic seal fastener integral thickness size need meet the 0.8mm of ISO/IEC7816 standard code, also consider the thickness of chip itself, so the THICKNESS CONTROL of PCB substrate is between 0.16-0.24mm.4 layers of PCB substrate need provide contact face 16, resin bed 17, wiring layer 18, insulation course 19, wiring layer 20, resin bed 21, solder joint wiring layer 22, via hole 23 when design.Realize between the smartcard internal components and parts or with being connected of external unit, as shown in figure 11.Contact face needs the size positions according to ISO/IEC7816 standard and GSM11.11 standard code, and 8 contact electrode districts are provided.Reserving 8 contact shape styles can be changeable, and as SIM card contact face surface overgild, perhaps the SIM card contact face is only exposed 8 contacts of satisfying the standard minimum dimension, and remainder applies with solder resist.
(2) mount the SMT element: with conducting resinl element 2 is mounted on the position of components 10 that designs in advance on the PCB substrate solder joint wiring side 22 one by one, crosses Reflow Soldering and make it to solidify; See Fig. 1, Fig. 5;
(3) mount, welding chip: with Heraeus chip 3 is mounted on the PCB substrate solder joint wiring side 20 chip position 11 of design in advance one by one, and the coherent signal line on pad on the chip and the PCB substrate is welded with spun gold 5.See Fig. 1, Fig. 5;
(4) module plastic packaging: design and produce the plastic package die that comprises rectangular cavities, the conformance to standard of the size of rectangular cavities and profile and Plug-in SIM card (ID-000 card) wherein, the cavity numbers that comprises on mould can be decided according to the useful load situation of plastic packaging equipment; Mould is sealed the element 2 of want plastic packaging, chip 3 and spun gold 5 fully, poured into the capsulation material 4 (the plastic sealing semiconductor device material generally is the toner of fine particle shape) of client's designated color, fill the space between full chip, element and the mould.Heating makes it to solidify, and is formed with 8 and meets the Plug-in SIM card (ID-000 card) that ISO/IEC7816 standard contacts and integrated multicore sheet and surface are pasted element.For the dimensional space of the Plug-in SIM card that makes full use of industrywide standard, expand smart card as far as possible and can utilize the space, adopt the method for full-scale plastic packaging, can obtain maximum encapsulated space, so that seal more chip and element.The various compounds of can annotating in the plastic packaging material so that obtain the color of client's appointment, form different colored cards, as shown in figure 10.
(5) module cutting: the module behind the plastic packaging, can scale off from PCB substrate 1 upper punch, then can obtain desired Plug-in SIM card.
Method of the present invention is not limited to the embodiment described in the embodiment, and those skilled in the art's technical scheme according to the present invention draws other embodiment, belongs to technological innovation scope of the present invention equally.

Claims (10)

1. adopt plastic package process that chip and elements combination are packaged into the method for smart card, comprise the steps:
(1), designs and makes two-sided PCB substrate or multi-layer PCB substrate according to the logic connecting relation between chip and the elements combination;
(2) adopt surface mount process that element pasted on surface is mounted on the position of components that designs in advance on the PCB substrate one by one, cross Reflow Soldering and make it to solidify;
(3) with Heraeus chip is mounted on the chip position that designs in advance on the PCB substrate one by one, and the coherent signal line on pad on the chip and the PCB substrate is welded together;
(4) plastic package die that will comprise rectangular cavities places on the PCB substrate Working position, the element of want plastic packaging, chip and bonding wire are covered fully, plastic packaging material is poured into cavity body of mould, make it to fill the space between full chip, element and the mould, and heating makes it to solidify formation multicore sheet and the surperficial smart card module that pastes elements combination;
(5) with the Die cutting tool that designs shape of the module behind the plastic packaging, punch out needed outer shape;
(6), on intelligent card body assigned position, mill out and mounted the consistent rectangle cell body of module size according to modular shape and size;
(7) adopt cold glue or hot melt adhesive technology, the module that plastic packaging is encapsulated is implanted in the cell body of intelligent cards;
(8) on packaged intelligent cards, punch out Plug-in SIM card shape according to standard size.
2. employing plastic package process according to claim 1 is packaged into the method for smart card with chip and elements combination, and it is characterized in that: two-sided PCB substrate described in the step (1) comprises contact face Copper Foil, resin bed, solder joint wiring side Copper Foil, connects the via hole of each layer wiring; Described multi-layer PCB substrate comprises contact face, resin bed, wiring layer, insulation course, solder joint wiring layer, connects the via hole of each layer wiring.
3. employing plastic package process according to claim 2 is packaged into the method for smart card with chip and elements combination, and it is characterized in that: the general thickness of described two-sided PCB substrate or multi-layer PCB substrate all is controlled between the 0.16-0.24mm.
4. according to claim 1 or 2 or 3 described employing plastic package process chip and elements combination are packaged into the method for smart card, it is characterized in that: the rectangular cavities of mould is right angle rectangle or round rectangle in the step (4).
5. according to claim 1 or 2 or 3 described employing plastic package process chip and elements combination are packaged into the method for smart card, it is characterized in that: the die-cut mode in the step (5) substitutes with the cut mode.
6. adopt plastic package process that chip and elements combination are packaged into the method for smart card, comprise the steps:
(1), designs and makes two-sided PCB substrate or multi-layer PCB substrate according to the logic connecting relation between chip and the elements combination;
(2) adopt surface mount process that element pasted on surface is mounted on the position of components that designs in advance on the PCB substrate one by one, cross Reflow Soldering and make it to solidify;
(3) with Heraeus chip is mounted on the chip position that designs in advance on the PCB substrate one by one, and the coherent signal line on pad on the chip and the PCB substrate is welded together;
(4) will comprise with the size of Plug-in SIM card and the plastic package die of the corresponding to rectangular cavities of profile standard and place on the PCB substrate Working position, the element of want plastic packaging, chip and bonding wire are sealed fully, plastic packaging material is poured into cavity body of mould, make it to fill the space between full chip, element and the mould, and heating makes it to solidify formation multicore sheet and the surperficial smart card module that pastes elements combination;
(5) the card body behind the plastic packaging is processed, punched out needed outer shape.
7. employing plastic package process according to claim 6 is packaged into the method for smart card with chip and elements combination, and it is characterized in that: two-sided PCB substrate described in the step (1) comprises contact face, resin bed, solder joint wiring side, connects the via hole of each layer wiring; Described multi-layer PCB substrate comprises contact face, resin bed, wiring layer, insulation course, solder joint wiring layer, connects the via hole of each layer wiring.
8. employing plastic package process according to claim 7 is packaged into the method for smart card with chip and elements combination, and it is characterized in that: the general thickness of described two-sided PCB substrate or multi-layer PCB substrate all is controlled between the 0.16-0.24mm.
9. according to claim 6 or 7 or 8 described employing plastic package process chip and elements combination are packaged into the method for smart card, it is characterized in that: include a plurality of rectangular cavities on a mould in the step (4).
10. according to claim 6 or 7 or 8 described employing plastic package process chip and elements combination are packaged into the method for smart card, it is characterized in that: the die-cut mode in the step (5) substitutes with the cut mode.
CNB2006101147386A 2006-11-22 2006-11-22 Method for fabricating and packaging chips and elements to smart card with plastic package technique Active CN100424721C (en)

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CNB2006101147386A CN100424721C (en) 2006-11-22 2006-11-22 Method for fabricating and packaging chips and elements to smart card with plastic package technique
PCT/CN2007/070888 WO2008061464A1 (en) 2006-11-22 2007-10-12 Ic card manufacturing method by interally sealing the combination of chips and elements by using plastic package technique

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