CN100423255C - 具有引线接合电感器的半导体器件和方法 - Google Patents
具有引线接合电感器的半导体器件和方法 Download PDFInfo
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- CN100423255C CN100423255C CNB028295935A CN02829593A CN100423255C CN 100423255 C CN100423255 C CN 100423255C CN B028295935 A CNB028295935 A CN B028295935A CN 02829593 A CN02829593 A CN 02829593A CN 100423255 C CN100423255 C CN 100423255C
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Abstract
一种半导体器件包括半导体管芯(20)和电感器(30,50),该电感器形成有连接到半导体管芯的顶面(21)的接合引线(80)。接合引线横向地延伸大于其高度(H30,H50)的距离(L30,L50)以确定绝缘芯(31,57)。在一个实施例中,电感器延伸超过半导体管芯的边缘(35,39)以减小负载。
Description
技术领域
一般地说本发明涉及半导体器件,更具体地说,涉及一种形成有容纳在相同的半导体封装中的半导体管芯和电感器的集成电路。
背景技术
电子系统制造商一直需要具有高级功能和更小物理尺寸的集成电路。在便携式无线通信装置中这种需求尤其明显,因为这种便携式无线通信装置的尺寸通常受到几百个分立无源部件的限制,而2.5千兆赫或更高的频率的操作造成还不能成功地集成这些部件。高频感应器已经被证明特别难以集成在半导体管芯中,因为寄生衬底电容和涡流造成性能的降低。
先前已经提出了这样的一种集成电感器的方法:在相同的半导体管芯上形成平面螺旋电感器和它们的相关电路。然而,部分是因为上述的寄生衬底电容和涡流的原因,平面螺旋电感器的品质因数较低。此外,附加的处理步骤和由平面电感器所占用的较大的管芯的面积具有较高的成本,这就使得这种方法在许多应用中不经济。
另一方法是将分立芯片电感器和半导体管芯容纳在相同的集成电路封装中。芯片电感器具有较高的品质因数,但是部件放置和安装电感器所需的焊接回流处理步骤也造成了较高的总体制造成本。此外,已有的分立芯片电感器具有较大的物理尺寸,这种较大的物理尺寸增加了封装的集成电路的轮廓并妨碍了它们在许多应用场合中的使用。
因此,需要一种组合了低制造成本、小物理尺寸和高性能的集成电路和集成电感器的方法。
发明内容
本发明提供一种半导体器件,包括:半导体管芯,具有形成在主表面上的第一和第二接合焊盘以及第一和第二边缘;和包括第一接合引线的第一电感器,该第一接合引线的一端连接到所述第一接合焊盘而另一端连接到所述第二接合焊盘,所述第一电感器横向地延伸大于该接合引线的高度的距离以限定电感器芯,并且所述第一电感器至少在两个位置处横向地从所述第一边缘突出。
根据本发明的上述半导体器件,其中所述电感器芯沿垂直于所述主表面的轴而被置于中心。
根据本发明的上述半导体器件,进一步包括容纳半导体管芯和所述第一电感器的半导体封装。
根据本发明的上述半导体器件,其中所述半导体管芯具有形成在主表面上的第三接合焊盘,所述半导体器件的进一步特征在于包括连接在所述第三接合焊盘和半导体封装的导线之间的第二接合引线。
根据本发明的另一方面,提供一种半导体器件,包括:半导体管芯,具有在主表面上的多个接合焊盘和边缘;和包括被形成为在电介质芯的周围的线圈的第一接合引线的第一电感器,其第一端连接到所述主表面上的第一接合焊盘而第二端连接到所述主表面上的第二接合焊盘,所述第一电感器从所述边缘突出横向距离,该横向距离大于该第一电感器的高度,并且所述第一电感器至少在两个位置处横向地从所述边缘突出。
根据本发明的上述半导体器件,其中,所述电介质芯沿垂直于所述主表面的轴而被置于中心。
根据本发明的上述半导体器件,进一步包括容纳半导体管芯和接合引线的半导体封装,其中所述半导体封装具有导线,该导线提供了连接所述接合引线的表面。
根据本发明的上述半导体器件,进一步包括:
与所述半导体管芯间隔开的第一和第二导线;和
包括第二接合引线的第二电感器,其一端连接到所述第一导线而另一端连接到所述第二导线。
附图说明
附图1所示为在具有电感器的半导体封装中容纳的半导体器件的等距视图;
附图1A所示为半导体器件的第一部分的侧视图;
附图1B所示为半导体器件的第二部分的等距视图;
附图2所示为在第一变型实施例中的半导体器件的等距视图;
附图3所示为在第二变型实施例中的半导体器件的等距视图;
附图4所示为在第三变型实施例中的半导体器件的等距视图;
附图5所示为在第一制造阶段之后的半导体器件的侧视图;
附图5A所示为在第二制造阶段之后的半导体器件的侧视图;
附图5B所示为在第三制造阶段之后的半导体器件的侧视图;
附图6所示为可替换的制造方法的半导体器件的侧视图。
具体实施方式
在附图中,具有相同的参考标号的元件具有类似的功能。
附图1所示为作为集成电路(IC)10构造的半导体器件的等距视图,该集成电路10包括都容纳在半导体封装40中的半导体管芯20和引线接合电感器30和50。在一种实施例中,集成电路10用作在双带无线通信装置(未示)中使用的高频振荡器。因此,集成电路10产生在大约800兆赫或大约2.4千兆赫下工作的高频信号。
半导体封装40包括用于安装半导体管芯20的管芯连接板42。多个导线44提供了通向外部电路(未示)的电连接。多个引线接合46和一个引线接合46A连接在多个导线44和多个接合焊盘25之间以在外部电路和半导体管芯20之间传递信号。封装40包括保护集成电路10不受损坏和腐蚀的模制的密封剂45。
半导体管芯20是具有顶面21的单晶硅芯片,该顶面21形成有具有一对电压可变电容器23和24的压控振荡器(VCO)22。电容器23和电感器30并联连接以作为设定VCO 22的2.4千兆赫工作频率的第一储能电路,而电容器24和电感器50并联连接以作为建立800兆赫工作频率的第二储能电路。
引线接合46和46A是形成在其相应的连接点或触点之间形成的标准的引线接合,这些连接点或触点在接合焊盘25和导线44之间。每个引线接合46和46A使用引线接合工具形成,这些引线接合工具将接合引线连接或焊接到在一个接合焊盘25上的第一连接点。接合引线然后通过移动到在一个导线44上的第二连接点的毛细管输送。引线接合工具被编程以将第一和第二连接点定位在由半导体管芯、封装和接合引线的物理特性确定的最佳高度并使接合引线成为环路。
为了在各种各样的半导体封装上形成引线接合,引线接合工具具有能够三轴运动的机构,即通过与顶面21共面的参考平面71所指示的X-和Y-轴运动和垂直于平面71的Z-轴运动。现代的引线接合工具被编程为对连接点进行定位并以点对点的方式接合引线。然而,为了在具有较高的管脚数量的装置中形成牢固、可靠的引线接合并使引线接合电感最小,以防止标准引线接合在X-或Y-方向内横向偏离位于连接点之间的线的控制软件对引线接合工具进行编程。标准引线接合仅垂直或Z-轴偏离形成为以设定所需的环路高度。因此,顶视图或沿标准引线接合的长度的视图显示直线。例如,如果标准引线接合的连接点沿X-轴设置,则它的所有的点都具有基本为零的Y-值,并且顶视图显示为沿X-轴的直线。这可以以引线接合46A所示,它显示为直线,因为它的连接点与附图1的视点成一线。
电感器30形成有引线接合,通常具有圆形横截面并且以标准的方式连接到接合焊盘32和34。与引线接合46和46A相反,电感器30被形成为从经由通向接合焊盘32和34的连接点的线38横向地延伸一段距离L30。这个横向凸伸实现了比标准引线接合更高的电感值,而且不增加集成电路10的物理高度。用于形成电感器30的接合引线优选包括适合于引线接合的低电阻金属比如金或铜,虽然铝或其它的金属也可以使用。在一种实施例中,电感器30形成有由金制造的接合引线,并且具有大约50微米的直径。电感器30通常具有在大约0.5和3.0毫微亨利之间的范围的电感值。
电感器50形成有通常为圆形的横截面的接合引线。电感器50类似地连接到接合焊盘51和53并形成有在电感器芯57周围的线圈。为减小集成电路10的制造成本,电感器50通常形成有与电感器30类似的成分的接合引线。然而,在合适的应用中,电感器50接合引线可以具有不同的直径或不同的材料成分。电感器50通常具有大于大约2毫微亨利的电感值。对于15或更大毫微亨利的电感值,有利的是,使用绝缘接合引线以避免在形成大量的紧密缠绕的线匝时短路。
电感器30和50形成有引线接合工具,该引线接合工具的控制软件被修改以利用工具机构的固有的X-、Y-和Z-轴运动。在附图1的实施例中,横向或XY偏离能力使电感器30横向地延伸通过半导体管芯20的边缘35。对于电感器50获得类似的结果,该电感器50使用横向位移以形成线圈52并使它延伸通过边缘39。
附图1A所示为在附图1的实施例中的集成电路10的一部分的侧视图,进一步详细地说明了电感器30。可以看出,电感器30被形成为以类似于悬臂的方式横向地凸伸过边缘35,以便提供较高的电感和品质因素以及较低的封装外形。在以标准接合引线材料形成时电感器30自支撑,但在特定的应用中如果需要的话,用于形成电感器30的材料可以是与铍或其它材料的合金或者以铍或其它材料掺杂,以便增加刚性并提供在接合过程中以及在接合之后维持其形状和位置的弹簧状弹性或者金属“记忆”。
因为电感器30横向地延伸过边缘35,因此它具有直接或垂直地位于边缘35之上的两个位置36和37。电感器30被成形为沿基本垂直于顶面21的轴30A的中心形成电感器芯31以在电流流经电感器30时封闭磁通量。为实现高品质因素,芯31被形成为绝缘芯,此为其制造过程的自然结果,因为密封剂45由绝缘模制化合物比如热塑性树脂或环氧树脂制成。电介质或绝缘芯是其中没有导电材料的芯。在固化之前,封装材料具有较低粘性,因此在封装材料被引入到封装模具中时电感器30实际上不受干扰。在固化之后,封装材料硬化以固定电感器30的位置和形状。在没有封装集成电路10的一种实施例中,空气提供了使芯材料绝缘的良好的变型方案。
为了使半导体管芯20的导电区的负载作用最小,电感器30被形成为其横向距离L30大于其在顶面21上的高度H30。在一种实施例中,距离L30是大约600微米,而高度H30大约是200微米。轴30A通常形成在距线38大约L30/2的距离处。对于给定的电感值,这个结构确保了轴30A距离半导体管芯20足够远,因此很小或没有寄生涡流在半导体管芯20中流动,这种涡流降低了品质因素。此外,轴30A与半导体管芯20分离使寄生电容最小并产生了高频响应。
附图1B所示为集成电路10和电感器50的一部分的细节的等距视图。如上文所述,电感器50形成有线圈52以便增加它的电感,同时维持较高的品质因素和较低的封装外形。线圈52通常具有圆柱形轮廓,但也可以具有椭圆形或多边形,这取决于制造方法。注意,在本实施例中,电感器50从通过其在接合焊盘51和53上的连接点的线54横向地延伸。电感器50自支撑,但在某些应用中它的接合引线材料可以是与铍或其它材料的合金或以铍或其它材料掺杂以增加刚性,以便维持它的形状和位置。
与电感器30一样,线圈52包围电介质或绝缘电感器芯57并具有与芯31的成分类似的成分,该电感器芯57沿与边缘39平行的轴50A基本位于中心。通过线圈52的电流I50在轴50A的中心的芯57中产生了磁通量。芯57是绝缘芯,该绝缘芯通常包括空气或封装材料,这视情况而定。
较低的封装外形通过如下实现:形成电感器50以使横向距离L50大于在顶面21上的组成接合引线的高度H50。因此,芯57距离半导体管芯20的导电区足够远以使几乎没有寄生影响劣化电感器50的性能。在一种实施例中,距离L50是大约600微米,而高度H50是大约200微米。轴50A通常以大约300微米的距离平行于线54形成。
附图2所示为在变型实施例中的集成电路10的等距视图。这个实施例具有类似的元件和功能,除了接合引线电感器50连接在导线58和59上之外。电感器50通过分别连接在导线58-59和接合焊盘51和53之间的接合引线对71-72电耦合到VCO 22。这种引线连接实现了较低的封装轮廓,并且在电感器50和半导体管芯20之间的附加空间有利于利用某些引线接合工具制造。注意,在电容器24耦合的总的电感包括电感器50的电感和由接合引线71和72构成的相应的电感。
附图3所示为在第二变型实施例中的集成电路10的等距视图,其中接合引线电感器50连接在接合焊盘53和导线58之间。
附图4所示为在第三变型实施例中的集成电路10的等距视图,显示了具有位于通过连接点的线54正上方的轴50A的接合引线电感器50。在本实施例中,半导体封装40具有更高的轮廓,但本实施例的电感器50的制造在特定的封装结构中可能更容易。
附图5所示为在电感器50的制造中的第一阶段中集成电路10的侧视图。接合引线80通过引线接合工具的毛细管82馈送。整形器86通过管道或管子80输送并设置在半导体管芯20的附近,如图所示。在一种实施例中,成形器86和管子80由低摩擦的材料比如制造。
毛细管82被设计为首先将导线80连接到接合焊盘51,然后以较小的角度朝成形器86输送导线80,该成形器86处于在管子84的延伸位置上。然后毛细管82在圆形XY运动中行进,同时在Z-方向上更慢地运动以将接合引线在成形器86周围缠绕一次或两次,从而形成线圈52。绕匝或绕组的数量由电感器50的所需的电感确定。注意,线圈52在垂直方向或位于成形器86中心的轴50A的Z-方向上缠绕。
附图5A所示为在电感器50的制造中的第二阶段中的集成电路10的侧视图。毛细管82夹住接合引线80,同时成形器86移动到其在管84中的缩进位置,在半导体管芯20的附近悬承着线圈52,如图所示。用于形成成形器86和管84的低摩擦材料有利于成形器86的缩进,而不使线圈2变型或打乱。
附图5B所示为在电感器50的制造过程中的第三阶段中的集成电路10的侧视图。在夹住接合引线80以阻止进一步输送导线的同时,毛细管82在X-方向上移动以将线圈52拉到在半导体管芯20上延伸的水平位置。接合引线80然后连接到接合焊盘53,并被切开以形成电感器50,如图所示。
可以看出,以类似的方式如下地形成电感器50的其它实施例:将接合引线连接到它的第一连接点,将它缠绕在成形器86的周围以在垂直方向上形成线圈52,然后将线圈52拉到水平位置以接合到它的第二连接点。
附图6所示为在形成电感器50的变型方法中的所选择的制造阶段上的集成电路10。接合引线80被加热并通过螺旋88输送到毛细管82。螺旋将接合引线80预调节到弹簧状以便在接合引线80从毛细管82出来并冷却时,它具有线圈52的所需的形状。然后如前文结合附图5B描述地进行连接。应用这种方法,接合引线80优选以铍或类似的材料掺杂以提供保持螺旋形状的弹簧状的金属“记忆”。
总之,本发明提供了制造半导体器件的结构和方法,该半导体器件包括连同半导体管芯一起容纳在半导体封装中的一个或更多个引线接合电感器。引线接合电感器形成有连接到半导体管芯的顶面的接合引线。接合引线横向地延伸大于接合引线的高度的距离以形成电感器的绝缘芯。
根据本发明的电感器具有较高的品质因素和高频响应,同时提供较低轮廓的半导体封装。虽然已经公开了制造线圈的几个方法,但是应该理解的是,其它方法也可以提供类似的引线接合电感器。例如,通过利用预先卷成线圈的接合引线可以制造电感器,该接合引线以一种材料掺杂以保持它的金属“记忆”。然后通过引线接合工具输送接合引线以使在电感器成形的过程中保持其形状。因此,在预定长度的预先卷成线圈的接合引线通过毛细管输送时,导线从已经具有线圈形状的毛细管中出来。
Claims (8)
1. 一种半导体器件,包括:
半导体管芯,具有形成在主表面上的第一和第二接合焊盘以及第一和第二边缘;和
包括第一接合引线的第一电感器,该第一接合引线的第一端连接到所述第一接合焊盘而第二端连接到所述第二接合焊盘,所述第一电感器从所述第一和第二端平行于主表面延伸大于所述主表面之上的该接合引线的高度的距离,第一接合引线被设置为限定电感器芯,并且所述第一电感器至少在两个位置处平行于主表面从所述第一边缘突出。
2. 权利要求1的半导体器件,其中所述电感器芯沿垂直于所述主表面的轴中心对称地放置。
3. 权利要求1的半导体器件,进一步包括容纳半导体管芯和所述第一电感器的半导体封装。
4. 权利要求3的半导体器件,其中所述半导体管芯具有形成在主表面上的第三接合焊盘,所述半导体器件的进一步特征在于包括连接在所述第三接合焊盘和半导体封装的导线之间的第二接合引线。
5. 一种半导体器件,包括:
半导体管芯,具有在主表面上的多个接合焊盘和边缘;和
包括被形成为在电介质芯的周围的线圈的第一接合引线的第一电感器,其第一端连接到所述主表面上的第一接合焊盘而第二端连接到所述主表面上的第二接合焊盘,所述第一电感器从所述第一和第二端平行于主表面突出于所述边缘一个距离,该距离大于所述主表面之上的该第一电感器的高度,并且所述第一电感器至少在两个位置处平行于主表面从所述边缘突出。
6. 权利要求5的半导体器件,其中,所述电介质芯沿垂直于所述主表面的轴中心对称地放置。
7. 权利要求5的半导体器件,进一步包括容纳半导体管芯和接合引线的半导体封装,其中所述半导体封装具有导线,该导线提供了连接所述接合引线的表面。
8. 权利要求5的半导体器件,进一步包括:
与所述半导体管芯接近但间隔开的第一和第二导线,其中第一导线与主表面上的第三接合焊盘电耦连,第二导线与主表面上的第四接合焊盘电耦连;和
包括第二接合引线的第二电感器,其一端连接到所述第一导线而另一端连接到所述第二导线。
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20210343679A1 (en) * | 2020-04-30 | 2021-11-04 | Cree, Inc. | Wirebond-Constructed Inductors |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7227240B2 (en) * | 2002-09-10 | 2007-06-05 | Semiconductor Components Industries, L.L.C. | Semiconductor device with wire bond inductor and method |
US7489022B2 (en) | 2005-08-02 | 2009-02-10 | Viasat, Inc. | Radio frequency over-molded leadframe package |
US7586193B2 (en) * | 2005-10-07 | 2009-09-08 | Nhew R&D Pty Ltd | Mm-wave antenna using conventional IC packaging |
WO2007046031A2 (en) * | 2005-10-19 | 2007-04-26 | Nxp B.V. | Device comprising an element with electrodes coupled to connections |
KR100704996B1 (ko) | 2006-04-18 | 2007-04-09 | 인티그런트 테크놀로지즈(주) | 집적회로 칩 및 패키지 |
JP2009158839A (ja) * | 2007-12-27 | 2009-07-16 | Sharp Corp | 半導体パッケージ、半導体装置、およびワイヤボンディング方法 |
JP2010118471A (ja) * | 2008-11-12 | 2010-05-27 | Panasonic Corp | 半導体装置 |
US8107254B2 (en) | 2008-11-20 | 2012-01-31 | International Business Machines Corporation | Integrating capacitors into vias of printed circuit boards |
US8164158B2 (en) * | 2009-09-11 | 2012-04-24 | Stats Chippac, Ltd. | Semiconductor device and method of forming integrated passive device |
US8242384B2 (en) | 2009-09-30 | 2012-08-14 | International Business Machines Corporation | Through hole-vias in multi-layer printed circuit boards |
US8432027B2 (en) | 2009-11-11 | 2013-04-30 | International Business Machines Corporation | Integrated circuit die stacks with rotationally symmetric vias |
US8310841B2 (en) | 2009-11-12 | 2012-11-13 | International Business Machines Corporation | Integrated circuit die stacks having initially identical dies personalized with switches and methods of making the same |
US8315068B2 (en) | 2009-11-12 | 2012-11-20 | International Business Machines Corporation | Integrated circuit die stacks having initially identical dies personalized with fuses and methods of manufacturing the same |
US8258619B2 (en) | 2009-11-12 | 2012-09-04 | International Business Machines Corporation | Integrated circuit die stacks with translationally compatible vias |
US9646947B2 (en) | 2009-12-22 | 2017-05-09 | Lenovo Enterprise Solutions (Singapore) Pte. Ltd. | Integrated circuit with inductive bond wires |
CN101840906B (zh) * | 2010-04-14 | 2011-08-17 | 锐迪科科技有限公司 | 高q值芯片集成电感 |
US9159777B2 (en) * | 2011-04-15 | 2015-10-13 | Infineon Technologies Ag | Die arrangements containing an inductor coil and methods of manufacturing a die arrangement containing an inductor coil |
US9692386B2 (en) * | 2013-12-23 | 2017-06-27 | Qualcomm Incorporated | Three-dimensional wire bond inductor |
CN105374764A (zh) * | 2014-08-29 | 2016-03-02 | 展讯通信(上海)有限公司 | 一种集成电感的封装结构 |
CN107004665A (zh) * | 2014-09-22 | 2017-08-01 | Mc10股份有限公司 | 用作可伸展和可弯曲互连部的键合线的塑形和成环装置及方法 |
EP3314650B1 (en) | 2015-06-25 | 2023-03-15 | Intel Corporation | Vertical inductor for wlcsp |
US10181435B2 (en) * | 2015-11-02 | 2019-01-15 | Texas Instruments Incorporated | Lead frame assembly |
CN116864494B (zh) * | 2023-09-01 | 2023-12-05 | 甬矽电子(宁波)股份有限公司 | 扇出型封装结构和扇出型封装结构制作方法 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4754310A (en) * | 1980-12-10 | 1988-06-28 | U.S. Philips Corp. | High voltage semiconductor device |
JPH06140451A (ja) * | 1992-10-27 | 1994-05-20 | Hitachi Ltd | 半導体集積回路装置 |
WO2000010179A1 (en) * | 1998-08-14 | 2000-02-24 | Samsung Electronics Co., Ltd. | Bonding wire inductor and manufacturing method thereof |
EP1202296A1 (en) * | 2000-10-27 | 2002-05-02 | Xerox Corporation | Out-of-plane microcoil using bonding wires and method for making |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10289921A (ja) * | 1997-04-14 | 1998-10-27 | Matsushita Electric Ind Co Ltd | 半導体装置 |
-
2002
- 2002-09-10 CN CNB028295935A patent/CN100423255C/zh not_active Expired - Fee Related
- 2002-09-10 AU AU2002368201A patent/AU2002368201A1/en not_active Abandoned
- 2002-09-10 WO PCT/US2002/028883 patent/WO2004025695A2/en active Search and Examination
- 2002-09-10 JP JP2004535363A patent/JP4255442B2/ja not_active Expired - Fee Related
-
2006
- 2006-01-26 HK HK06101181.1A patent/HK1081326A1/xx not_active IP Right Cessation
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4754310A (en) * | 1980-12-10 | 1988-06-28 | U.S. Philips Corp. | High voltage semiconductor device |
JPH06140451A (ja) * | 1992-10-27 | 1994-05-20 | Hitachi Ltd | 半導体集積回路装置 |
WO2000010179A1 (en) * | 1998-08-14 | 2000-02-24 | Samsung Electronics Co., Ltd. | Bonding wire inductor and manufacturing method thereof |
EP1202296A1 (en) * | 2000-10-27 | 2002-05-02 | Xerox Corporation | Out-of-plane microcoil using bonding wires and method for making |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20210343679A1 (en) * | 2020-04-30 | 2021-11-04 | Cree, Inc. | Wirebond-Constructed Inductors |
US11715722B2 (en) * | 2020-04-30 | 2023-08-01 | Wolfspeed, Inc. | Wirebond-constructed inductors |
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