CN100369159C - Detection method of flash storage - Google Patents
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- CN100369159C CN100369159C CNB2004100690982A CN200410069098A CN100369159C CN 100369159 C CN100369159 C CN 100369159C CN B2004100690982 A CNB2004100690982 A CN B2004100690982A CN 200410069098 A CN200410069098 A CN 200410069098A CN 100369159 C CN100369159 C CN 100369159C
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Abstract
The present invention discloses the detection method of a flash storage. The present invention aims to the uncertainty and the short circuit characteristic of the open circuit of electronic circuits, repeatedly detects all the flash electronic circuits to detect whether a fault exists in an address line and a data line or not, simultaneously sets to '0 'and sets '1' to each unit of the flash storage to judge whether a fault exists in a flash chip, and gets to know the reason that the fault happens in the flash storage according to the indication of a detection result. The flash detection method provided by the present invention can comparatively completely detect the flash chip, reliably detect out the flash read-write fault caused by the short circuit of the address line, the open circuit of the address line of the flash storage and the fault of the data line, and definitely point out the fault reason, which is favorable to fault elimination. The flash storage on an electronic circuit board which is produced is detected by the method of the present invention to ensure that the flash storage on the circuit board which is left a factory is intact, and simultaneously the reason of the fault of the flash storage of the circuit board of which the flash storage has the fault is found to conveniently position and eliminate the fault.
Description
Technical field
The present invention relates to computer realm, particularly the flash memories of computer realm.
Background technology
So-called flash memory (Flash memory is hereinafter to be referred as FLASH), it is a kind of memory storage that is widely used in fields such as mobile phone, commercial unit, telecommunication equipment and mobile memory card, different with general random access memory, the characteristics of flash memory are non-volatile (just the data of being stored can not lost after the main frame power down).Because flash memory generally is used for the working routine and relevant very important data of memory device, and is very important to the electronic product that is mated.So it is very strict whether association area correctly requires the read and write of flash memory (programming just), and flash memory is detected, become the associated electronic product preceding important procedure of dispatching from the factory.
Generally speaking, cause the reason of flash reading and writing mistake to be, the flash memory welding is bad, cause flash memory signal wire (mainly being address wire and data line) short circuit, open circuit (opening circuit), wherein, short circuit is meant has connected the signal wire that should not link to each other originally, and open circuit is meant that the signal wire that should connect originally fails to connect; Only a few is former because flash chip internal element itself damages.Because flash memory self, every of the storage unit in the flash memory can only be written as " 0 ", can not be written as " 1 ", must could allow the storage unit in the flash memory become " 1 " by erase operation.Before flash memory being write the non-zero operation, must carry out erase operation, allow flash memory become sky, like this, cause detection more complicated to flash memory, also more time-consuming.Have not yet to see the complete industrial applicable flash memory detection method of a cover, in the existing method, some method just reads the device id of flash memory simply and judges whether flash memory is intact, or after flash memory wiped, write, read test data one by one by address location, compare and obtain testing result with writing data by sense data then, whether correct with this read-write operation of judging flash memory.Mainly there is following shortcoming in the detection method of current flash memory: 1, detection method is simple, incomplete, does not have the complete detection method of a cover, and the effect of detection is relatively poor; 2, flash memory can't be detected because of the caused read-write fault of address wire short circuit, the address wire open circuit and the data line fault of flash memory can't be detected reliably; 3, can't spell out failure cause, be unfavorable for fixing a breakdown.
Summary of the invention
The objective of the invention is to overcome the shortcoming of above-mentioned prior art, propose a kind of open circuit/short trouble that can detect flash data line, address wire, can accurately show a whole set of flash memories detection method complete, that be suitable for industrial application of failure cause.
A kind of detection method of flash memories comprises the following steps:
Step 1, flash chip carried out the unit detect:
1.1 each address location clear " 0 " with flash chip;
1.2 each location contents of flash chip is read, judge whether to be 0, if then continue, otherwise output error message, the unit detects and finishes;
1.3 successively each module unit in the flash memory is carried out erase operation, if success then continue, otherwise output error message, the unit detects and finishes;
Step 2, to the detection of opening a way of the data line of flash memory:
2.1 set the first address of a certain specific address space;
2.2 since first successively with a certain position reset in the data bus, other sets obtain equaling M special data of data-bus width;
2.3 M special data write in M the unit that begins with first address in 2.1 successively;
2.4 since 2.1, read the special data that writes successively in the space of first address;
2.5 data of reading and the data that write are compared, if equate, then continue, otherwise output " data bit is that data lines open fault of ' 0 ' in the particular data ";
2.6 after all data lines all detected and finish, the data line open circuit detected and finishes;
Step 3, the data line of flash memory is carried out short-circuit detecting:
3.1 set the first address of another specific address space;
3.2 since first successively with a certain position set in the data bus, other resets obtain equaling M special data of data-bus width;
3.3 M special data write in M the unit that begins with first address in 3.1 successively;
3.4 since 3.1, read the special data that writes successively in the space of first address;
3.5 data of reading and the data that write are compared, if equate, then continue, otherwise output " data bit is that data lines short trouble of ' 1 ' in the particular data ";
3.6 after all data lines all detected and finish, the data line short-circuit detecting finished;
Step 4, the use method identical with step 2 and step 3 are opened a way and short-circuit detecting to the address wire of flash memory;
Step 5, detection finish.
If flash chip to be measured has lock function, then before carrying out described step 1, chip is carried out unlocking operation.
After detecting end, each non-empty block of flash memory to be measured is wiped.
Above-mentioned steps 1.3 specifically comprises:
1.3.1 the 0th block space is wiped beginning;
1.3.2 set up and affirmation piece erase command;
After 1.3.3 piece is wiped end, the value of read status register;
1.3.4 judge according to the value of status register and to wipe whether success, if success then continue, otherwise report finishes after wiping the piece of makeing mistakes number;
1.3.5 judge that all pieces are wiped and whether finish, if then finish; Otherwise begin next block space and wipe execution in step 1.3.2.
The flash memory detection method that the present invention proposes can more intactly detect flash chip, and it is relatively good to detect effect; And the present invention can detect flash memory reliably because the address wire open circuit and the data line fault of caused read-write fault of address wire short circuit and flash memory also can spell out failure cause, is beneficial to and fixes a breakdown.The method that the application of the invention proposes detects the flash memory on the electronic circuit board of producing, and the flash memory on the wiring board that can guarantee to dispatch from the factory is intact, finds out the flash failure reason of the wiring board of flash failure simultaneously, makes things convenient for localization of fault and eliminating.
Description of drawings
Fig. 1 is the main flow chart of the detection method that proposes of the present invention;
Fig. 2 is the process flow diagram that among the present invention flash memory is carried out erasure detection;
Fig. 3 is the process flow diagram that among the present invention the data line open fault is detected;
Fig. 4 is the process flow diagram that among the present invention the data line short trouble is detected.
Embodiment
Below in conjunction with drawings and Examples, the present invention is described in further detail.
Fig. 1 is the main flow chart of the detection method that proposes of the present invention.As shown in Figure 1, the detection method of the present invention's proposition mainly comprises following detection content: 1, flash chip is carried out the unit and detect; 2, the data line of flash memory is opened a way and short-circuit detecting; 3, adopt and use the same method, the address wire of flash memory is opened a way and short-circuit detecting.
Fig. 2 is the process flow diagram that when carrying out the unit detection among the present invention flash memory is carried out erasure detection.As shown in Figure 2, flash memory being carried out erasure detection specifically comprises: 2.1 the 0th block spaces are wiped beginning; 2.2 set up and affirmation piece erase command; After 2.3 piece is wiped end, the value of read status register; 2.4 judge according to the value of status register and to wipe whether success, if success then continue, otherwise report finishes after wiping the piece of makeing mistakes number; 2.5 judge that all pieces are wiped and whether finish, if then finish; Wipe execution in step 2.2 otherwise begin next block space.
Fig. 3 is the process flow diagram that among the present invention the data line open fault is detected.As shown in Figure 3, the data line of flash memory is opened a way to detect comprise the following steps: that 3.1 set the first address ADDR of a certain specific address space; 3.2 since first successively with a certain position reset in the data bus, other sets obtain equaling M special data of data-bus width; 3.3 M special data write in M the unit that begins with address AD DR successively; 3.4 in the space that address AD DR begins, read the special data that writes successively; 3.5 data of reading and the data that write are compared, if equate, then continue, otherwise output " data bit is that data lines open fault of ' 0 ' in the particular data "; 3.6 after all data lines all detected and finish, the data line open circuit detected and finishes.
Fig. 4 is the process flow diagram that among the present invention the data line short trouble is detected.As shown in Figure 4, the data line to flash memory carries out the first address ADFR that short-circuit detecting comprises the following steps: 4.1 another specific address space of setting; 4.2 since first successively with a certain position set in the data bus, other resets obtain equaling M special data of data-bus width; 4.3 M special data write in M the unit that begins with address AD FR successively; 4.4 in the space that address AD FR begins, read the special data that writes successively; 4.5 data of reading and the data that write are compared, if equate, then continue, otherwise output " data bit is that data lines short trouble of ' 1 ' in the particular data "; 4.6 after all data lines all detected and finish, the data line short-circuit detecting finished.
Flash chip 28F160C3 with INTEL Corp.'s 16 bit data bus, 20 bit address buses is an example below, and the implementation step of the detection method that the present invention is proposed is elaborated.
At first detect the unit of flash memory, separate lock core chip (chip of some model does not have lock function, can not need this operation), simultaneously with each unit of flash memory clear " 0 ", then each unit is read and judged whether to be " 0 ", judge that with this can each unit of flash memory by clear " 0 ".
When flash memory to be measured after testing after, each unit can then be carried out the piece erasure detection to flash memory by clear " 0 " because after flash memory wipes through piece, each unit of flash memory will become " 1 " entirely, each unit to flash memory carries out " 1 " detection entirely then.
Secondly, as flash memory to be measured after testing after, " 0 " and the set clearly of each unit, then adopt " 1 " method of walking of data line to detect the particular address unit, carry out the data line open circuit with this and detect, if the data line short trouble does not take place, again at the data line open circuit situation, adopt data line to walk " 1 " method the particular address unit is detected, whether short trouble is arranged with this specified data line.
At last, as flash memory to be measured after testing after, data line does not break down, and then adopts the method identical with the detection data line to detect open circuit, the short trouble of address wire.
In order to allow flash memory after having detected, can directly use, after above detection is intact, also to carry out erase operation to the piece of non-NULL (being that the unit is not complete " 1 ").
Detecting step to every in detail below describes:
At first with the chip release, the unlocking operation of chip is undertaken by piece; Concrete operations are successively to write 0X60,0XD0 to the arbitrary address of each block space of flash memory, allow chip release can programme (being write operation) and erase operation.The concrete operations different model of release or the chip of producer may be different, can obtain specific operation process by the reference data handbook.
Secondly, write " 0x0000 " with its clear " 0 " by each unit to flash memory, the arbitrary address that is specially to block space writes 0x4040, writes 0x0000 to concrete space then, whenever write data and must write 0x4040 earlier and set up write operation, write concrete data then.After all unit have been write, writing 0xFFFF to the arbitrary address of piece again allows the piece of chip be in read states, read the data of each unit then one by one, and with the data and " 0x0000 " comparison of reading, if equate, each unit that flash memory then is described is " 0 " clearly, otherwise this flash chip to be measured of explanation itself has fault, and detection of end also shows testing result.Because the data of flash cell can become " 0 " with " 1 " by write operation, but " 0 " can not be become " 1 ", so can be under the situation that flash memory is not wiped its each unit be become " 0 " entirely.
The 3rd step, flash memory is carried out erasure detection, as shown in Figure 2, the erase operation of flash memory carries out according to piece, the content of a piece is wiped at every turn.Its step comprises:
A, successively write 0X20 in the 0th module unit address in flash memory, 0XD0 sets up piece and wipes and confirm operation, allows module unit carry out erase operation.
B, come the read states register, and judge the 7th value,, represent that then the piece erase operation finishes if the 7th be high by the value of reading arbitrary address, otherwise, continue read states register wait erase operation and finish.
C, read states register are also judged the 5th, if the 5th be height, represent that then erase operation do not make mistakes, otherwise represent that the erase operation of this piece makes mistakes.If wipe and make mistakes, then erasure detection finishes.
D, if the lastblock module unit of flash memory is wiped successfully, in flash memory, successively write 0X20 in next piece module unit address, 0XD0 sets up piece and wipes and confirm operation, allows module unit carry out erase operation.
E, repetition B～D step carries out the detection of remaining module unit, all wipes successfully up to all pieces.
After erase operation completes successfully, also will carry out set to each unit of flash memory detects, method allows chip be in read states for the arbitrary address to module unit writes 0xFFFF, read each cell data of flash memory then successively, and judge read data whether be 0XFFFF entirely, if not, illustrate that then flash chip itself has fault, can not be with its whole sets.Finish flash memory and detect, and show testing result.Otherwise proceed the detection of back.
In the 4th step, under the situation that superincumbent detection is passed through, the open circuit, the short trouble that carry out data line detect, and as shown in Figure 3, the step that open fault detects is:
A, every data lines of 16 single data bus (D15D14......D1D0) little-endians is dragged down one by one, then they being write one by one 32 address locations that the relative address 0X204 of flash memory begins, is that the address location of 0X204,0X206......0X222 writes 0XFFFE respectively to relative address promptly; 0XFFFD......0X7FFF.
B, then successively from relative address be 0X204,0X206......0X222 the address location sense data and respectively with the data 0XFFFE that writes; 0XFFFD......0X7FFF compare, if relatively make mistakes with data 0XFFFD, then expression is that data line D1 has open fault, other by that analogy.As detection fault is arranged, then stop to detect, and show testing result.
As shown in Figure 4, the step of data line short trouble detection has:
A, every data lines of 16 single data bus (D15D14......D1D0) little-endians is drawn high one by one, then they being write one by one 32 address locations that the relative address 0X224 of flash memory begins, is that the address location of 0X224,0X226......0X242 writes 0X0001 respectively to relative address promptly; 0X0002......0X8000.
B, then successively from relative address be 0X224,0X226......0X242 the address location sense data and respectively with the data 0X0001 that writes; 0X0002......0X8000 compare, if the data corresponding with 0X0004 are relatively made mistakes, then expression is that data line D2 has short circuit road fault, other by that analogy.As detection fault is arranged, then stop to detect, and show testing result.
At last, also do not have at data line under the situation of open circuit and short circuit, the open circuit, the short trouble that carry out address wire detect, and the address wire open fault detects step to be had:
A, address pin (A19......A1A0) little-endian of flash memory is dragged down successively one by one, in these addresses, write data 0x5555; Be that 0X1FFFFC, 0X1FFFFA, these address locations of 0X1FFFF6......0X0FFFFE write 0x5555 to relative address respectively promptly.(because the flash data line is 16 2 bytes, so the address pin A19......A1A0 of chip should link to each other one by one with the A20......A2A1 of CPU, just Shi Ji addressing space is 21 bit address space.)
B, in being the address location of 0X1FFFFE, the relative address space of flash memory writes data 0x0000.
C, read the content of above-mentioned address space respectively, because any address wire open circuit, its address will become 0X1FFFFE, its content all will by after the 0x0000 that writes cover, can not read 0x5555 again; So, illustrate that then the A1 address pin on the flash chip has open fault if the data that address location 0X1FFFFA reads are 0X0000.As detection fault is arranged, then stop to detect, and show testing result.
The step that the address wire short trouble detects has:
A, address pin (A19A18......A1A0) little-endian of flash memory is drawn high successively one by one, in these addresses, write data 0x5555; Be that 0X000002,0X000004, these address locations of 0X000008......0X100000 write 0x5555 to relative address respectively promptly.(because the flash data line is 16 2 bytes, so the address pin A19......A1A0 of chip should link to each other one by one with the A20......A2A1 of CPU, just Shi Ji addressing space is 21 bit address space.)
B, in being the address location of 0x000000, the relative address space of flash memory writes data 0x0000;
C, read the content of above-mentioned address space respectively, because any address wire short circuit, its address will become 0x000000, its content all will by after the 0x0000 that writes cover, can not read 0x5555 again; So, illustrate that then the A2 address wire has short trouble if the data that address location 0X000008 reads are 0X0000.As detection fault is arranged, then stop to detect, and show testing result
Through above-mentioned detection, the flash memory that can reliable detection goes out to break down, and fault shown definitely particularly.If, do not find flash failure through after the above detection, then, detect and also the non-empty block of flash memory will be wiped at last for flash memory can directly be used, it can directly be programmed.
In the above step, the unit detects and erasure detection merges, can carry out the unit earlier detects by all clear, carry out erasure detection then, carry out unit set detection entirely again, adopt this sequencing, when detecting unit,, can reduce detection time with regard to only carrying out erase operation one time.In addition, before module unit carried out read operation, to allow flash memory be in read states earlier, be specially to any unit of piece and write 0XFFFF, carrying out concrete read operation then, and write (programming) when operation, then is to each programming unit, all need to write programming to the module unit arbitrary address earlier and set up order 0x4040, write data programmed to concrete unit then.Some has write the process of reading and writing operations in detail in the above step, and some is not write, and unifies explanation here.In addition, the specific instructions of the reading and writing of the flash memory of different model or producer, release and erase operation and process can be different, can operate according to concrete databook, but whole detection method are the same.
Claims (4)
1. the detection method of a flash memories is characterized in that comprising the following steps:
Step 1, flash chip carried out the unit detect:
1.1 each address location clear " 0 " with flash chip;
1.2 each location contents of flash chip is read, judge whether to be 0, if then continue, otherwise output error message, the unit detects and finishes;
1.3 successively each module unit in the flash memory is carried out erase operation, if success then continue, otherwise output error message, the unit detects and finishes;
Step 2, to the detection of opening a way of the data line of flash memory:
2.1 set the first address of a certain specific address space;
2.2 since first successively with a certain position reset in the data bus, other sets obtain equaling M special data of data-bus width;
2.3 M special data write in M the unit that begins with first address in 2.1 successively;
2.4 since 2.1, read the special data that writes successively in the space of first address;
2.5 data of reading and the data that write are compared, if equate, then continue, otherwise output " data bit is that data lines open fault of ' 0 ' in the particular data ";
2.6 after all data lines all detected and finish, the data line open circuit detected and finishes;
Step 3, the data line of flash memory is carried out short-circuit detecting:
3.1 set the first address of another specific address space;
3.2 since first successively with a certain position set in the data bus, other resets obtain equaling M special data of data-bus width;
3.3 M special data write in M the unit that begins with first address in 3.1 successively;
3.4 since 3.1, read the special data that writes successively in the space of first address;
3.5 data of reading and the data that write are compared, if equate, then continue, otherwise output " data bit is that data lines short trouble of ' 1 ' in the particular data ";
3.6 after all data lines all detected and finish, the data line short-circuit detecting finished;
Step 4, the use method identical with step 2 and step 3 are opened a way and short-circuit detecting to the address wire of flash memory;
Step 5, detection finish.
2. detection method according to claim 1 is characterized in that: if flash chip to be measured has lock function, then before carrying out described step 2 chip is carried out unlocking operation.
3. detection method according to claim 1 and 2 is characterized in that: after detecting end, each non-empty block of flash memory to be measured is wiped.
4. detection method according to claim 1 and 2 is characterized in that: described step 1.3 specifically comprises:
1.3.1 the 0th block space is wiped beginning;
1.3.2 set up and affirmation piece erase command;
After 1.3.3 piece is wiped end, the value of read status register;
1.3.4 judge according to the value of status register and to wipe whether success, if success then continue, otherwise report finishes after wiping the piece of makeing mistakes number;
1.3.5 judge that all pieces are wiped and whether finish, if then finish; Otherwise begin next block space and wipe execution in step 1.3.2.
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