CN100353532C - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN100353532C
CN100353532C CNB03154343XA CN03154343A CN100353532C CN 100353532 C CN100353532 C CN 100353532C CN B03154343X A CNB03154343X A CN B03154343XA CN 03154343 A CN03154343 A CN 03154343A CN 100353532 C CN100353532 C CN 100353532C
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China
Prior art keywords
substrate
semiconductor device
type surface
external connection
present
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Expired - Fee Related
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CNB03154343XA
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CN1494134A (zh
Inventor
谷孝行
涉谷隆生
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Northeast Sanyo Semi-Conductive Co Ltd
Sanyo Electric Co Ltd
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Northeast Sanyo Semi-Conductive Co Ltd
Sanyo Electric Co Ltd
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Publication of CN1494134A publication Critical patent/CN1494134A/zh
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Publication of CN100353532C publication Critical patent/CN100353532C/zh
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  • Condensed Matter Physics & Semiconductors (AREA)
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  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
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Abstract

一种半导体装置，现有半导体装置特别是CSP型半导体装置，在安装在安装衬底上后，难于通过外观检查确认焊锡的安装状况，存在市场缺陷及成品率低等问题。本发明的半导体装置中，外部连接电极(50、51、52、53)露出于第一绝缘衬底(41)的第二主面(412)。而且，在第二主面(412)上，粘合有自内侧包围该外部连接电极的第二绝缘衬底(48)。由此，在将半导体装置安装在安装衬底上后，对焊锡的安装状况进行外观检查，此时，第二绝缘衬底(48)作为反射镜起作用，可掌握焊锡的内部安装状况。其结果可可靠地检查焊锡的安装状况，降低市场缺陷，提高成品率。

Description

半导体装置
技术领域
本发明尤其涉及安装结构中连接安装衬底和半导体装置的外部连接电极的焊锡的安装状况，涉及可进行外观检查的芯片尺寸封装(CSP)型半导体装置。
背景技术
在现有半导体装置的组装工序中，将自晶片切割分离后的半导体元件固定在引线架上，然后，利用传递模将半导体元件密封。之后，将引线架及树脂层切断，按每个单个的半导体装置分离。例如，如图6所示，基于该工序的半导体装置形成由树脂层2覆盖半导体元件1的周围并从该树脂层2的侧部导出外部连接用引线端子3的结构。该结构公开于例如特开平05-129473号公报中。
该结构中，引线端子3突出于树脂层2的外侧，存在引线架的加工精度的问题和其与模型的定位精度问题，因此，外形尺寸和其安装面积的缩小是有限的。
近年来，可使外形尺寸缩小至等于或近似于半导体芯片大小尺寸的晶片规模CSP很受注目。其首先如图7(A)所示，对半导体晶片11进行各种扩散等前处理而形成多个半导体元件12。然后，如图7(B)所示，用树脂层13覆盖半导体晶片11的上部，将外部连接用电极14导出到树脂层13表面。然后，沿半导体晶片11的切割线15分割半导体元件12，如图7(C)所示，形成成品。树脂层13仅覆盖半导体元件12的表面(也存在覆盖背面的情况)，在半导体元件12的侧壁上露出硅半导体衬底。电极14与形成于树脂层13下部的集成电路网电连接。然后，将电极14相对于形成在安装衬底上的导电图案对向粘接，从而实现该半导体装置的安装。
上述半导体装置封装尺寸与半导体元件的芯片尺寸相等，相对于安装衬底也只需对向粘接即可，故具有可大幅度减小安装所占面积的优点。还具有可大幅度减少后工序的成本的优点。该结构公开于例如特开平9-64049号公报中。
发明内容
如上所述，在现有半导体装置中，图6所示的半导体装置通过引线端子3与例如安装衬底上的导电图案连接，图7所示的半导体装置通过电极14与例如安装衬底上的导电图案连接。总之，引线端子3或电极14各自例如通过焊锡与安装衬底上的导电图案固定。此时，如图6所示，在引线端子3导出到树脂层2的外部的结构中，在将半导体装置固定在安装衬底上的导电图案后，可容易地进行安装后焊锡的外观检查。而如图7所示，在CSP型半导体装置中，电极14位于半导体装置表面。因此，在将半导体装置固定在安装衬底上的导电图案后，安装后的焊锡位于微细的半导体装置的背面，难于进行焊锡的安装状况的外观检查。
而且，如上所述，图6所示的半导体装置由于引线端子3突出于树脂层2的外侧，故尤其是存在其安装面积的缩小有限的问题。因此，在目前的半导体市场上，正在追求CSP型半导体装置且要求可容易地进行安装后焊锡的安装状况的外观检查。
本发明就是鉴于上述现有问题而开发的，本发明的半导体装置包括：第一衬底，其至少具有一个通孔，且由绝缘材料构成；半导体元件，固定在形成于所述第一衬底的一主表面上的导电图案的所希望位置；金属配线，其电连接所述半导体元件的电极焊盘和所希望的所述导电图案；多个外部连接电极，其通过通孔和所希望的所述导电图案在所述第一衬底的另一主表面上电连接，所述第一衬底的另一主表面位于所述第一衬底的一主表面的相反面上；树脂密封体，其至少覆盖所述第一衬底的主表面而形成，在所述第一衬底的另一主表面上，粘合有第二衬底，其至少使所述外部连接电极露出，由和所述第一衬底线膨胀系数大致相同的绝缘材料构成，所述第二衬底进行区分，在所述第一衬底的另一主表面上使所述外部连接电极独立存在于各自区域，并且该第二衬底的厚度比所述外部连接电极厚。
本发明的半导体装置最好将所述第二衬底粘合在所述第一衬底上，至少使位于所述第一衬底的另一主表面的外周侧边附近的所述外部连接电极的侧面自所述外周侧边一侧露出。
附图说明
图1是用于说明本发明的半导体装置的(A)从表面侧看的立体图，(B)从背面侧看的立体图；
图2是用于说明本发明的半导体装置的(A)剖面图，(B)从背面侧看的平面图；
图3是用于说明本发明的半导体装置的剖面图；
图4是用于说明本发明的半导体装置的(A)平面图，(B)平面图；
图5是表示本发明的半导体装置的第二实施形态的背面侧的立体图；
图6是用于说明现有半导体装置的剖面图；
图7是用于说明现有半导体装置的制造方法的(A)平面图，(B)剖面图，(C)立体图。
具体实施方式
下面参照图1～图5详细说明本发明的半导体装置。
图1(A)及图1(B)是显示本发明的半导体装置的结构的立体图。图1(A)是自表面侧看半导体装置的图，表示半导体装置的内部结构，虚线表示树脂密封体部分，图1(B)表示自半导体装置背面侧看的结构。图2(A)是本发明半导体装置的剖面图，图2(B)是本发明半导体装置自背面侧看的平面图。
如图1(A)所示，自大片衬底59(参照图4)分离出的单个绝缘衬底41由陶瓷或玻璃环氧树脂等绝缘材料构成，具有0.1～0.2mm左右的板厚。如图2(B)所示，具有长边×短边＝1.0mm×0.8mm程度的矩形形状。另外，衬底41表面侧具有第一主面411，背面侧具有第二主面412，各表面411、412相互平行地延伸。
衬底41的第一主面411平坦地形成，其表面印刷钨等金属膏，形成岛部42和电极部43、44。另外，在岛部42和电极部43、44利用电解电镀法进行镀金。然后，在衬底41的岛部42安装例如肖特基势垒二极管或MOSFET(金属氧化物半导体场效应晶体管)元件等半导体芯片45。形成于半导体芯片45表面的电极焊盘46和电极部43、44由金属配线47电连接。
这里，如图4(A)所示，在本实施例中，在大片衬底59上，由虚线包围的各搭载部60相互以0.02～0.05mm的间隔纵横配置。第一连结部61以连续的图案自岛部42延伸。它们的线宽是窄于岛部42的线宽，例如以0.1mm的线宽延伸。第一连结部61越过切割线与相邻的搭载部60的电极部43、44连结。然后，各第二连结部62自电极部43、44向与第一连结部61正交的方向延伸，并越过切割线65与相邻的搭载部60的电极部43、44连结。第二连结部62还与包围搭载部60群的周围的共同连结部(未图示)连结。这样，通过使第一及第二连结部61、62延伸，使各搭载部60的岛部42和电极部43、44电气地共同连接。这是为了在进行镀金等电解电镀时要采用共同电极。
根据该结构，第一及第二连结部61、62自衬底41和树脂密封体49之间微细露出。另外，岛部42及电极部43、44自第一主面41 1的外周侧边向内侧0.05～0.1mm左右而形成，不从衬底41和树脂密封体49之间露出。
如图1(B)所示，在衬底41的第二主面412上，形成有印刷了钨等金属膏的外部连接端子50、51、52、53。本发明的半导体装置的特征在于，粘合有第二绝缘衬底48，以覆盖外部连接端子50、51、52、53间的第二主面412。第二绝缘衬底48与第一绝缘衬底41同样，由陶瓷或玻璃环氧树脂等绝缘材料构成，具有与第一衬底41同样的厚度。总之，通过使第一衬底41和第二衬底48采用同样材料，使其线膨胀系数相同，形成可防止热量引起的衬底裂纹等的结构。另外，虽然本实施例中第一衬底41和第二衬底48的厚度采用大致相同的厚度，但并不限定于此。第二衬底48的厚度至少具有外部连接端子50、51、52、53以上的厚度，如图3所示，在比固定于安装衬底56上的导电通路57时焊锡58的厚度薄的范围内可进行各种变更。
如图2(A)所示，在形成岛部42及电极部43、44的衬底41上，设有自第一主面411向第二主面412贯通的通孔55。通孔55的内部埋设钨、银、铜等导电材料，使岛部42和外部连接端子50、51电连接。另外，使电极部43、44和外部连接端子52、53电连接。外部连接端子50、51、52、53的端部自衬底21的端部靠内侧0.01～0.1mm左右。电极部43、44的通孔55上面不是平坦的，故金属配线47最好避开各电极部43、44的通孔55上面而连接。另外，如上所述，通孔55完全形成于第一衬底41内。在第一衬底41的第一主面411和第二主面412上，通孔55分别由岛部42、电极部43、44、外部连接端子50、51、52、53覆盖。因此，通孔55及其内部的导电材料从半导体装置外部看不到。
如图2(B)所示，例如，作为半导体元件45形成双极晶体管、功率MOSFET等三端子有源元件。在搭载双极元件时，形成于岛部42背面的外部连接端子50、51为集电极端子，分别形成于电极部43、44背面的外部连接端子52、53为基极或发射极端子。但本发明所用的半导体元件45不限于上述元件，可根据用途进行各种变更。
本发明的特征在于，外部连接端子50、51、52、53形成于第二主面412的外周边起0.05～0.1mm左右的内侧。如图4(B)所示，在本实施例中，首先，在形成外部连接端子50、51、52、53之前，将第二绝缘衬底48粘合在大片衬底59上。此时，第二绝缘衬底48与第一绝缘衬底41同样，由大片衬底63构成。在各搭载部60的外部连接端子50、51、52、53形成区域，设有开口部的一张大片衬底63粘合在第一绝缘衬底41用的大片衬底59上。
然后，利用电解电镀法，在外部连接端子50、51、52、53上镀金，如图所示，各外部连接端子50、51、52、53以独立的图案形成。但是，如上所述，在第一衬底41的第一主面411上，利用包围搭载部60群的周围的共同连结部(未图示)将各搭载部60的岛部42和电极部43、44共同电连接。然后，各外部连接端子50、51、52、53通过各通孔55与岛部42、电极部43、44电连接。这样，各外部连接端子50、51、52、53在第二主面412上独立形成，可通过第一主面411的共同连接，用电解电镀法将所有外部连接端子50、51、52、53进行一次镀金来形成。
在本发明中，微细线宽的第一及第二连结部61、62仅自第一绝缘衬底41的第一主面411和树脂密封体49的边界面露出外部。换句话说，在本发明中，将外部连接端子50、51、52、53形成于距衬底41的第二主面412的外周侧边内侧0.05～0.1mm左右处。总之，在本发明中，横断切割线64、65的仅是线宽窄的第一及第二连结部61、62。这样，在切割大片衬底59、63并分割为单个半导体装置时，可不于外部连接端子50、51、52、53上产生飞边而进行切割。其结果，如图3所示，在将半导体装置安装到安装衬底56上的导电通路57时，不会由外部连接端子的飞边引起安装缺陷。另外，如上所述，本发明的半导体装置是微细的，通过焊锡安装在微细的图案上，但在该微细图案上也不会因外部连接端子的飞边引起短路。
将形成于大片衬底59上的多个搭载部60分割在单个的半导体装置上，如图1所示，完成本发明的半导体装置。如图3所示，然后，该半导体装置例如通过焊锡58安装在形成于安装衬底56上的导电通路57上。此时，如本发明的半导体装置那样，背面具有外部连接端子的CSP型半导体装置安装面积小，作为移动电话、摄像机等超小型、超轻组件在目前的半导体市场上大量需要。但是，如上所述，如本发明的半导体装置那样，在其装置尺寸为例如L×W×T(长×宽×厚)＝1.0mm×0.8mm×0.6mm的微细半导体装置中，尤其是在安装在安装衬底56上后，进行外观检查时，存在难于观测焊锡的安装状况的问题。也就是说，外观检查是非破坏检查，往往通过目视进行，但当图案变得微细时，裸眼检查就变得困难。在裸眼检查困难时，要通过使用放大镜、使用外观检查机(AOI：Automatic Optical Inspection)进行外观检查。但是，实际上，即使在使用放大镜、使用外观检查机时，随着半导体装置自身微细化的发展，外观检查也很困难。
于是，在本发明的半导体装置中，如图1(B)及图2(B)所示，在衬底的第二主面上，第二绝缘衬底48自中心部包围外部连接端子50、51、52、53而形成。也就是说，在第一衬底41的第二主面412上，由第二衬底48进行区分，使外部连接端子50、51、52、53具有各自的形成区域。如上所述，第二绝缘衬底48的厚度设定为比将半导体装置安装在安装衬底56上时焊锡58的厚度薄。这样，本发明的半导体装置在安装在安装衬底56上后，不会再增加第二绝缘衬底48的厚度。通过使第二绝缘衬底48位于上述位置，可利用外观检查机观测焊锡的深度。这通常在使用外观检查机的外观检查中是相对半导体装置自斜上方进行图象检查，但是，此时，位于焊锡58内的第二绝缘衬底48起到反馈镜的作用。这样，检查时的光可由第二绝缘衬底48反射并可可靠地观测焊锡58的进深。其结果，可确认半导体装置背面的焊锡的安装状况，可利用外观检查可靠地发现焊锡的安装缺陷。可实现降低市场缺陷，提高成品率。
在本发明的半导体装置中，各外部连接端子50、51、52、53之间形成0.3mm左右的间隔，但是通过使绝缘衬底位于该各外部连接端子之间，可进一步防止焊锡58引起的各外部连接端子间的短路。对用于向安装衬底安装的焊锡，通过使第二衬底48位于半导体装置的背面的中心部，使焊锡更容易向外侧移动。总之，本发明的半导体装置构成焊锡轮廓容易从其侧面露出的结构，安装后，即使用目视也可容易观测焊锡的安装状况。
另外，在本实施例中，就四个外部连接端子露出于半导体装置背面的形态进行了说明，但并不限于此。例如，如图5所示，即使对露出六个外部连接端子的形态也可通过变更第二绝缘衬底48的形状得到同样的效果。另外，只要不脱离本发明的主旨的范围，就可进行各种变更。
如上所述，第一，本发明的半导体装置具有下述特征，在露出外部连接端子的第一绝缘衬底的第二主面上粘合第二绝缘衬底，以自中心部包围外部连接端子。这样，在本发明中，在将半导体装置安装在安装衬底上后，可外观检查焊锡的安装状况，可将第二绝缘衬底用作反射镜。其结果，可确认位于半导体装置的背面甚至难于进行外观检查的内部的安装状况，可降低市场缺陷，提高成品率。
第二，本发明的半导体装置具有下述特征，其形成为使外部连接端子位于第一绝缘衬底的第二主面的外周边的内侧。这样，在本发明中，在大片衬底上具有多个搭载部，通过在树脂封装后进行切割，而分割为单个的半导体装置，此时可抑制在外部连接端子上产生飞边。其结果，尤其是在象本发明的半导体装置那样微细的半导体装置中，虽然安装在微细的图案上，但此时可可靠地防止因外部连接端子的飞边引起的短路。
第三，本发明的半导体装置具有下述特征，其第一绝缘衬底和第二绝缘衬底都采用陶瓷衬底。这样，可使第一及第二绝缘衬底的线膨胀系数相同，可提高衬底自身的裂纹防止等产品品质。

Claims (4)

1、一种半导体装置，其特征在于，包括：第一衬底，其至少具有一个通孔，且由绝缘材料构成；半导体元件，固定在形成于所述第一衬底的一主表面上的导电图案的所希望位置；金属配线，其电连接所述半导体元件的电极焊盘和所希望的所述导电图案；多个外部连接电极，其通过通孔和所希望的所述导电图案在所述第一衬底的另一主表面上电连接，所述第一衬底的另一主表面位于所述第一衬底的一主表面的相反面上；树脂密封体，其至少覆盖所述第一衬底的主表面而形成，
在所述第一衬底的另一主表面上，粘合有第二衬底，其至少使所述外部连接电极露出，由和所述第一衬底线膨胀系数相同的绝缘材料构成，
所述第二衬底进行区分，在所述第一衬底的另一主表面上使所述外部连接电极独立存在于各自区域，并且该第二衬底的厚度比所述外部连接电极厚。
2、如权利要求1所述的半导体装置，其特征在于，所述第二衬底粘合在所述第一衬底上，至少使位于所述第一衬底的另一主表面的外周侧边附近的所述外部连接电极的侧面自所述外周侧边一侧露出。
3、如权利要求1或2所述的半导体装置，其特征在于，所述外部连接电极实施了镀金。
4、如权利要求1或2所述的半导体装置，其特征在于，所述第一及第二衬底是陶瓷衬底。
CNB03154343XA 2002-08-28 2003-08-15 半导体装置 Expired - Fee Related CN100353532C (zh)

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