CN100349786C - Immediate delivery package of semiconductor chip and method therefor - Google Patents

Immediate delivery package of semiconductor chip and method therefor Download PDF

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Publication number
CN100349786C
CN100349786C CNB2005100652472A CN200510065247A CN100349786C CN 100349786 C CN100349786 C CN 100349786C CN B2005100652472 A CNB2005100652472 A CN B2005100652472A CN 200510065247 A CN200510065247 A CN 200510065247A CN 100349786 C CN100349786 C CN 100349786C
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China
Prior art keywords
container
cover
sheath
sheath cover
packing
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Expired - Fee Related
Application number
CNB2005100652472A
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Chinese (zh)
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CN1689933A (en
Inventor
赫尔穆特·施文克
弗里德里希-格奥尔格·赫尔
纳塔莉·勒孔特
奥利弗·鲁希蒂
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Siltronic AG
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Siltronic AG
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Publication date
Priority claimed from DE200410019664 external-priority patent/DE102004019664B4/en
Application filed by Siltronic AG filed Critical Siltronic AG
Publication of CN1689933A publication Critical patent/CN1689933A/en
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Publication of CN100349786C publication Critical patent/CN100349786C/en
Expired - Fee Related legal-status Critical Current
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • H01L21/6735Closed carriers
    • H01L21/67366Closed carriers characterised by materials, roughness, coatings or the like
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • H01L21/6735Closed carriers
    • H01L21/67369Closed carriers characterised by shock absorbing elements, e.g. retainers or cushions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • H01L21/6735Closed carriers
    • H01L21/67389Closed carriers characterised by atmosphere control
    • H01L21/67393Closed carriers characterised by atmosphere control characterised by the presence of atmosphere modifying elements inside or attached to the closed carrierl

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Packaging Frangible Articles (AREA)
  • Packages (AREA)

Abstract

The invention relates to a ready-for-dispatch package for semiconductor wafers, comprising a) a closeable plastic container which is loaded with the semiconductor wafers and has a lid and a body, a seal between the lid and the body and a particle filter which is integrated with the container and allows exchange of gas between the interior space of the container and the external environment of the container; b) a first sheath made from plastic, which surrounds the container and rests closely against the container with the aid of reduced pressure; c) a means for binding moisture; d) a second sheath made from coated plastic, with a coating which blocks the passage of moisture and rests closely against the first sheath and against the container with the aid of reduced pressure; e) a shock-absorbing structure which embeds the sheathed container in a positive-fitting manner; and f) an outer packaging which surrounds the double-sheathed and embedded container in a positive-fitting manner. The invention also relates to a method for the ready-for-dispatch packaging of semiconductor wafers in a packaging of this type.

Description

The immediate delivery packing of semiconductor wafer and the packing method of promptly delivering thereof
Technical field
The present invention relates to promptly deliver packing and in package handling, implement promptly the deliver method of packing of this semiconductor wafer of a kind of semiconductor wafer.
Background technology
Semiconductor wafer is delivered to the buyer locus by maker usually.Must be covered between the delivery period in long-range, and often conversion of transportation means.So these responsive semiconductor wafers are very easily damaged.Though even do not have scratch or the caused visible damage of breaking, impurity also can to these semiconductor wafers cause harmful effect or even make it can't use desired use as, for example manufacturing of electronic component.
U.S. Pat 6,131,739 ask for protection a kind of a plurality of damping packings that the container of semiconductor wafer is housed that are used for, and this damping comprises two foamed plastic half shells and has some grooves that these grooves can adaptive fully mode be included these containers in.At special industry circle, commercially available container is called " the preceding carrying case that opens " (FOSBs) traditionally.Say it for example, U.S. Pat 6,581 was once addressed such container in 264.
Such damping packing is convenient to reduce that semiconductor wafer suffers the risk of mechanical damage between the delivery period.
Summary of the invention
The purpose of this invention is to provide a kind of semiconductor wafer packing of promptly delivering, should immediate delivery packing can further reduce the risk of infringement, and the state of the semiconductor wafer that can guarantee wherein in fact to be transported when in container, the taking out state when packing this container in fact.
Theme of the present invention is a kind of semiconductor wafer packing of promptly delivering, and it comprises:
A) one can close plastic container, this can be closed and semiconductor wafer is housed in the plastic container and have a protecting cover and a body, has a sealing member between this protecting cover and this body, one particulate filter is incorporated in this container, and can make between the external environment condition of the inner space of this container and this container and carry out gas exchange;
B) first a sheath cover that is made of plastics, this sheath cover abuts against on this container around this container and by means of decompression;
C) in order to device in conjunction with aqueous vapor;
D) second a sheath cover of being made by coating plastic utilizes a coating, and this second sheath cover stops aqueous vapor to be passed through, and by means of decompression near this first sheath cover and this container;
E) damper element, this damper element embeds the container that this quilt plays cover in complete adaptive mode; And
F) external packing, this external packing in fully adaptive mode around this container that rises and embed through dual cover.
Another theme of the present invention is a kind of method that semiconductor wafer is promptly delivered and packed of implementing in packing, and this method comprises the following step:
A) clean and dry a plurality of containers, these containers form one in batches;
B) whether a container of analyzing in this batch has the caused impurity of particulate, metal and organic substance to exist;
C) if analysis result shows that each impurity is lower than the limit that is defined, semiconductor wafer is packed in other containers of this batch, and with protecting cover with these container closures;
D) with this first sheath cover these container sets are risen, and in this first sheath cover, produce a decompression, abut against on these containers until this first sheath cover;
E) with this second sheath cover the container set that these have overlapped is risen, and in this second sheath cover, produce a decompression, abut against on this container that has overlapped until this second sheath cover;
F) at least between these containers and this first sheath cover or these containers that overlapped with send in order to combine the device of aqueous vapor between this second sheath overlaps;
G) container that these dual covers are risen embeds in this damper element; And
H) container package that these dual covers are risen and embedded is in this external packing, and this external packing is closed; Or if the analysis of being carried out in the step b) shows that each impurity is not to be lower than the limit that is defined fully, then other containers with this batch form a new batch, continue implementation step a).
Packing of the present invention is particularly suitable for the semiconductor wafer of delivering, and the diameter that is particularly suited for delivering is at least 300 millimeters semiconductor silicon wafer.Its significant especially fact is to protect the interior semiconductor wafer of this packing to avoid the pollution that foreign matter caused of being vibrated caused infringement and avoiding any kind effectively.Moreover the structure of this packing can make these semiconductor wafers avoid causing these semiconductor wafers to be polluted when taking out in container.
Description of drawings
Below with reference to the present invention will be described in more detail with accompanying drawing.Wherein:
Fig. 1 is the scheme drawing that illustrates all features of packing of the present invention.
The specific embodiment
Semiconductor wafer 1 is positioned at commercially available plastic container 2, and this container 2 comprises a body 3 and a protecting cover 4.Suitable plastics are good with polycarbonate (PC), polybutylene terephthalate (PBT), polyene elastic body (POE) and poly-ethylethylene (PEE).Preferably install a sealing member (better with a plastic sealing ring 5 especially) between body 3 and the protecting cover 4, produce particulate and form a barrier because of friction when preventing switch protecting cover 4, to stop entering of extraneous particulate.This container 2 provides the space that holds a plurality of (being generally 25) semiconductor wafer 1.Say it for example, these semiconductor wafers are positioned at the slit that separates regularly and have side guiding silver, and make it keep the standing upright position by reed usually, after protecting cover is closed.These reeds promptly are combined into one with protecting cover.Moreover this container 2 has the opening that at least one can be ventilated, and this opening can be closed a filter 6 of retaining particulate.This opening can be located in the protecting cover 4 or body 3 of this container.
This container 2 is risen by two sheath condoms at least.First sheath cover 7 that directly is resisted against on this container is good with overlay, and is better with polyethylene (PE) especially.This film is the most handy can be increased and tears and the coating of the drag that punctures is strengthened.Especially better to comprise a polyamide (PA) layer or a polyethylene terephthalate (PET) layer or this double-ply fabricate block.Second sheath cover 8 is by forming once the plastics that apply, and these plastics through applying are good with polyethylene (PE) also, and this coating can increase mechanical strength (especially can increase and tear and the drag that punctures), and forms the barrier of the extraneous aqueous vapor of an antagonism.Wherein the plastic film with aluminising is good, You Yiyong can increase tear and film that the skin of the drag that punctures additionally strengthens better.This skin is to be consisted of good by polyamide (PA) or polyethylene terephthalate (PET) or this double-ply fabricate block.For preventing inner aqueous vapor, installing one can be in conjunction with the device 9 of aqueous vapor, and it is good filling with the papery that can extract aqueous vapor or the parcel of other materials with one or more especially.This aqueous vapor combining device 9 preferably is configured between first sheath cover and second sheath cover, to absorb the aqueous vapor via 7 diffusions of first sheath cover.Even it is also unaffected that this device discharges particulate, because these semiconductor wafers 1 still continue to be subjected to the protection of container 2 and first sheath cover 7.But also can add or flexible mode is arranged on container 2 with this aqueous vapor combining device 9 and overlaps between 7 with first sheath.These two sheath covers and container can be provided with label separately.
Space (on the one hand) between this internal tank and container 2 and first sheath cover 7 and and first sheath cover, 7 and second sheath cover 8 between space (on the other hand) have a difference of pressure, so these sheath covers can with this container or each other near.This point is very important, because like this this sheath cover just can not form shape that can change damper element 10 or any bubble that forms the elasticity space between this element and this container that has overlapped 2.This can prevent that also these elements from causing damage because of the possible relative motion (always can produce particulate) between its distortion and the container that has overlapped and these elements.This difference of pressure is being good up to 50 millibars (mbar).Best two damper elements 10 place the relative both sides of having overlapped container.These damper elements 10 preferably are made up of foamed plastic or material with similar characteristics, and are better with the damper element of being made by polyethylene (PP), polystyrene (PS) or polyurethane (PU) especially.These elements have a plurality of grooves, and this container that has overlapped embeds in these grooves in the mode of adaptive fully (positive-fitting).The outside dimension of these elements is corresponding to the inside dimension of external packing 11.Equally in adaptive mode fully, this external packing 11 is with these elements 10 and embed cover in it and play container 2 and wrap up fully.Therefore, during these semiconductor wafers 1 of transportation, this container 2 or element 10 can not be moved in external packing 11.This external packing is preferably made by cardboard material or light metal.The size of this external packing is preferably suitably selected, so that can make immediate delivery, and as it is suitable, stackable on movable shelf.
In described immediate delivery packing, these semiconductor wafers are protected in two ways and avoid the effect of aqueous vapor, and promptly inner by aqueous vapor combining device 9 and outside by this second sheath cover 8, this second sheath cover 8 forms a barrier, to prevent the invasion of water gas.The special protection that prevents particulate invasion provides by the protecting cover 4 of this container 2 and the seal ring 5 between the body 3 and by the filter in this wall of container, and wherein this filter can stop particulate to pass.Prevent that protective effect that semiconductor wafer is subjected to organic substance, trace meter and particle contamination is by using the container that do not cause any pollution and the material of sheath cover to be provided.The in addition strict test of the protective effect of relevant this container.This test method is the part of method of the present invention, below will be described in more detail.
Before this container is packed semiconductor wafer into, earlier it is cleaned and is dried.This cleaning is preferably implemented in a submergence bath of filling with purging medium, perhaps implements in a device, and wherein purging medium is sprayed on this container.This purging medium is preferably water, and contains inhibiter alternatively.The enforcement of this cleanup action is preferably gone through the time period of qualification and carried out under controlled external condition, and is better to carry out in setting limiting temperature and relative humidity of atomsphere the 10th grade or following purge chamber especially.In case by quality management, the semiconductor wafer of only packing in the container.This quality management comprises the analysis of particulate, trace meter, micro ion and micro organic impurity, and if appropriate, also comprise the damage and the visual inspection of defective, only analyze and check result show surpass institute decide limit and can't harm begin under the situation that injures defective qualified.The quality buret reason of implementing by dissection is that a container representing batch of same containers is implemented.If this quality management result is qualified, i.e. other containers of this batch of tolerable semiconductor wafer of packing into.Otherwise other containers of this batch must be cleaned and be dried again, perhaps as suitable, its rejecting will not further be handled.
The following limit that should not surpass is applicable to:
A) liquid phase counting micro particles (LPC) test, wherein this container is filled with no particulate ultra-pure water and it is rotated on a pivot, take out 50 milliliters sample afterwards, and utilize a commercially available laser light scattering optical measurement instrument check the existing of particulate (the liquid phase counting micro particles, LPC):
If measure the particulate of diameter>1 micron (μ m), be good to be lower than 50 particulates, better to be lower than 10 particulates especially;
If measure the particulate of diameter>0.3 micron, be good to be lower than 1000 particulates, better to be lower than 100 particulates especially;
If measure the particulate of diameter>0.2 micron, be good to be lower than 2000 particulates, better to be lower than 200 particulates especially;
B) trace meter and metallic ion test, wherein this container is charged into the ultra-pure water of no any impurity of 50 milliliters, and it is rotated on a pivot, and by means of ICP-MS (inductively coupled plasma-mass spectrometer) or by means of CE (Capillary Electrophoresis) this sample is analyzed:
When measuring by ICP-MS, the metallo-total amount be at most 100 nanograms (Neck, ng), especially so that 10 nanograms are better at the most;
When measuring by CE, the total amount of ion is at most 200 nanograms, especially so that 100 nanograms are better at the most;
E) organic impurities test wherein is heated to high temperature with container material, by gas chromatographic method the gaseous organic impurity (for example: epsilon-amino caprolactam, tetrahydrofuran) of overflowing is analyzed:
When the gas chromatography determination, be benchmark with the weight of tested container material, the total concentration<50ppm of organic impurities, especially with<5ppm is better.
Pack into semiconductor wafer in the container of allowing loading and closed.This work is preferably carried out by means of a robot.Afterwards, this container set is risen,, can between this container and this sheath cover, place aqueous vapor extraction bag, the interior pressure of this sheath cover is reduced, and this sheath is overlapped in addition melting welding as suitable with the first sheath cover.The gaseous environment that occurs in this container preferably includes any expection compound of air, nitrogen, a unreactable gas or aforementioned each gas.Afterwards, this container that has overlapped is once risen with the second sheath condom again,, can between first and second sheaths cover, place aqueous vapor extraction bag, the pressure in second sheath cover is reduced and this second sheath is overlapped in addition melting welding as suitable.The gaseous environment that exists in this second sheath cover preferably includes any expection compound of air, nitrogen, a unreactable gas or these gases.To overlap twice container according to aforesaid way and insert in the damper element, and wrap into the packing that so forms in this external packing and this external packing is closed.
Quality management that should immediate delivery packing and structure can guarantee that the consignee can take out performance semiconductor wafer of performance when packing container in packing.Moreover this consignee still has great alerting ability to unpacking of relevant these semiconductor wafers.Say it for example, even also removable external packing outside clean room environment, these damper elements and this second sheath cover.But, first sheath of this container cover and especially the protecting cover of this container should in the on-site clean room of consignee, remove.
The present invention can prevent have the volatile impurity of q.s to condense on the semiconductor wafer between the delivery period and the manufacturing work of subsequently electronic component (especially live width is lower than 0.1 micron electronic component) is produced harmful effect at these semiconductor wafers.And, can prevent that also the residuary water airsetting from forging, this residual aqueous vapor of getting off of condensing is brought problem to the manufacturing of electronic component equally.Simultaneously, can prevent that also these semiconductor wafers during transportation are subjected to the particle contamination from packing, this pollution brings problem with same manufacturing to electronic component.Moreover, especially during packaging use decompression can prevent that this container is because of containing air with respect to the external packing campaign, this relative motion exists transportation to cause under the situation of vibration, can cause these semiconductor wafers to jump out the reed fixer, and especially in the marginarium, become fragile, thereby especially choose and implement to increase the risk of breaking during the heat treatment in electronic component system.This packing of not having any free gap also can prevent between the delivery period these sheath covers to be caused damage, and this damage can pollute these semiconductor wafers when unpacking.
The present invention can guarantee to be surpassed 0.05 micron, be local light prose style free from parallelism form (LPD by diameter, light point defects) the caused semiconductor wafer of external substance pollutes to have on each side before the semiconductor wafer packing and is lower than 10 defective, even and also be no more than this level after these semiconductor wafers have transported and unpacked.
The element numbers explanation:
1 semiconductor wafer, 2 containers
3 bodies, 4 protecting covers
5 seal rings, 6 filters
7 first sheaths overlap 8 second sheath covers
9 aqueous vapor combining device (bag)
10 damper elements
11 external packings

Claims (6)

1, a kind of semiconductor wafer packing of promptly delivering comprises:
A) one can close plastic container, this can be closed and semiconductor wafer is housed in the plastic container and have a protecting cover, sealing member and the particulate filter of a body, between this protecting cover and this body, this particulate filter is incorporated in this container, and can make between the external environment condition of the inner space of this container and this container and carry out gas exchange;
B) the first sheath cover that is made of plastics, this first sheath cover is around this container and by means of reducing pressure near this container;
C) in order to device in conjunction with aqueous vapor;
D) the second sheath cover of being made by coating plastic utilizes a coating, and this second sheath cover stops aqueous vapor to be passed through, and overlaps and this container near this first sheath by means of decompression;
E) damper element, it embeds the container that this quilt cover rises in complete adaptive mode; And
F) external packing, this external packing in fully adaptive mode around this container that is risen and embed by dual cover.
2, packing as claimed in claim 1 is characterized in that, this first sheath cover is transparent.
3, packing as claimed in claim 1 or 2 is characterized in that, this second sheath cover has an anti-external coating of tearing.
4, packing as claimed in claim 1 or 2 is characterized in that, the space between the inside of this container and this container and this first sheath cover and and this first sheath cover and this second sheath cover between the space between difference of pressure up to 50 millibars.
5, a kind of method that the enforcement semiconductor wafer is promptly delivered and packed in as any one described packing in the claim 1 to 4 comprises the following steps:
A) clean and dry a plurality of containers, these containers form one in batches;
B) whether a container of analyzing in this batch has the caused impurity of particulate, metal and organic substance to exist;
C) if analysis result shows that each impurity is lower than the limit that is defined, semiconductor wafer is packed in other containers of this batch, and with protecting cover with these container closures;
D) with this first sheath cover these container sets are risen, and in this first sheath cover, produce a decompression, abut against on these containers until this first sheath cover;
E) with this second sheath cover the container set that these have overlapped is risen, and in this second sheath cover, produce a decompression, abut against on this container that has overlapped until this second sheath cover;
F) at least between these containers and this first sheath cover or these containers that overlapped with send in order to combine the device of aqueous vapor between this second sheath overlaps;
G) container that these dual covers are risen embeds in this damper element; And
H) container package that these dual covers are risen and embedded is in this external packing, and this external packing is closed; Or if the analysis of being carried out in the step b) shows that each impurity is not to be lower than the limit that is defined fully, then other containers with this batch form a new batch, continue implementation step a).
6, method as claimed in claim 5 is characterized in that, following each limit is stipulated at the analysis of being implemented in the step b):
A) in the test of liquid phase counting micro particles:
If measure the particulate of diameter>1 micron, number is lower than 50 particulates;
If measure the particulate of diameter>0.3 micron, number is lower than 1000 particulates;
If measure the particulate of diameter>0.2 micron, number is lower than 2000 particulates;
B) in trace meter and metallic ion test:
When measuring by inductively coupled plasma-mass spectrometer, the metallo-total amount is at most 100 nanograms;
When measuring by Capillary Electrophoresis, the total amount of ion is at most 200 nanograms;
C) in the organic impurities test:
When the gas chromatography determination, be benchmark with the weight of tested container material, the total concentration<50ppm of organic impurities.
CNB2005100652472A 2004-04-22 2005-04-15 Immediate delivery package of semiconductor chip and method therefor Expired - Fee Related CN100349786C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE200410019664 DE102004019664B4 (en) 2004-04-22 2004-04-22 Ready to ship packaging for semiconductor wafers
DE102004019664.8 2004-04-22

Publications (2)

Publication Number Publication Date
CN1689933A CN1689933A (en) 2005-11-02
CN100349786C true CN100349786C (en) 2007-11-21

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US (1) US20050236298A1 (en)
JP (1) JP2005311380A (en)
KR (1) KR100708328B1 (en)
CN (1) CN100349786C (en)
DE (1) DE102004063912B4 (en)
TW (1) TWI284624B (en)

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CN1689933A (en) 2005-11-02
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US20050236298A1 (en) 2005-10-27

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