JP2004128368A - Visual inspection method for semiconductor device - Google Patents

Visual inspection method for semiconductor device Download PDF

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Publication number
JP2004128368A
JP2004128368A JP2002293216A JP2002293216A JP2004128368A JP 2004128368 A JP2004128368 A JP 2004128368A JP 2002293216 A JP2002293216 A JP 2002293216A JP 2002293216 A JP2002293216 A JP 2002293216A JP 2004128368 A JP2004128368 A JP 2004128368A
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Japan
Prior art keywords
dicing
foreign matter
inspecting
semiconductor
semiconductor wafer
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Pending
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JP2002293216A
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Japanese (ja)
Inventor
Yoshihiro Shigeta
重田 善弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
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Fuji Electric Device Technology Co Ltd
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Application filed by Fuji Electric Device Technology Co Ltd filed Critical Fuji Electric Device Technology Co Ltd
Priority to JP2002293216A priority Critical patent/JP2004128368A/en
Publication of JP2004128368A publication Critical patent/JP2004128368A/en
Pending legal-status Critical Current

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  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a visual inspection method for a semiconductor device that does not reject the product because of the attached foreign matter and flaws that exist on a polyimide film surface neglectable in quality. <P>SOLUTION: In the third process, a first visual inspection 11 is performed for inspecting whether the attached foreign matter exists or not. Portions that have been judged as defects in the inspection are stored in a storage medium. In the sixth process, wafer probing 5 is performed for an electrical property test of semiconductor wafer. Subsequently, marks are attached to the portions that have been judged as the defects in the wafer probing and the defective portions stored in the storage medium in the third process. In the ninth process, a second visual inspection 12 is performed for inspecting flaws, chips and the attached foreign matter that have been resulted from dicing. As a result, the flaws and the attached foreign matter that are yielded on a polyimide film surface in the processes from the fourth to the sixth one are excluded from an objective of the inspection, so that semiconductor chips with the flaws and attached foreign matter that are not defective in quality are prevented from being defective, thereby improving substantially a conforming article ratio. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
この発明は、半導体装置の外観検査方法に関する。
【0002】
【従来の技術】
図2は、従来の半導体装置の外観検査方法を示す工程図である。この図は、半導体装置のウエハプロセスの保護膜形成工程から半導体チップまでの工程を示す。
【0003】
ウエハプロセス1の終了後(最終拡散終了後)に表面保護膜として窒化膜2約1μm程度形成する。最近では、さらにその窒化膜2上にパッケージングのエポキシ樹脂の熱的、機械的衝撃からウエハを保護するためにポリイミド3をバッファ−コート(緩衝材膜)として1μmから10μmの厚さで形成することが多い。
【0004】
その後、薄膜パッケージに収納するためのバックグラインド4(ウエハ裏面の研削)を行う。6インチウエハでは625μmから300μm、8インチウエハではその厚さを750μmから350μmまで削るのが一般的である。次に、電気的特性試験を行うためにウエハプロービング5を行う。そしてウエハからチップ化するためのダイシング6、チップトレイ入れ7を行い、その後、半導体チップ(以下、単にチップと称す)の表面のキズ・異物およびダイシング時の割れ・欠けをスクリーニングするための外観検査8(顕微鏡に20倍から30倍検査)を行い、最後に梱包・出荷9でパッケージ工程に送る。
【0005】
尚、外観検査8では、人為的な方法で行うことが一般的であり、高品質な半導体装置の場合、2回の外観検査で、不良品が出荷されることを防止している。
また、外観検査方法については、種々の提案がなされている(例えば、特許文献1参照)。しかし、バッファ−コートとしてポリイミド3を被覆した場合の外観検査方法の提案はない。
【0006】
【特許文献1】
特開平6−252230号公報
【0007】
【発明が解決しようとする課題】
この発明は、ポリイミドを塗布した後の工程(バックフラインド、ウエハプロービング、ダイシング、トレイ入れ)でウエハおよびチップに製造設備や治具が接触する工程があり、ポリイミド膜は窒化膜と比べて柔らかいために、ポリイミド膜上にキズが発生したり、異物が付着したりする場合がある。しかし、この場合、品質的には問題ないために、良品扱いしてよい訳であるが、品質的に問題のある本来の不良(ポリイミド膜下の異物・キズなど)との識別が困難なため、外観検査工程で、前記の品質的に問題ないものまで含めて不良判定するために、不良品が多発(不良率:5〜10%)する場合がある。
この発明の目的は、前記の課題を解決して、品質上問題ないポリイミド膜上の異物付着およびキズを不良としない半導体装置の外観検査方法を提供することにある。
【0008】
【課題を解決するための手段】
前記の目的を達成するために、最終拡散後の半導体ウエハを検査する第1の外観検査工程と、該第1の外観検査工程で不良となった箇所を記憶媒体に記憶させる工程と、該半導体ウエハに表面保護膜用のポリイミド膜を被覆した後、前記記憶媒体に記憶された不良箇所にマーキングする工程と、該半導体ウエハをダイシングして半導体チップとし、該ダイシングによる異常を判定するための前記半導体チップを検査する第2の外観検査工程とを有する外観検査方法とする。
【0009】
また、最終拡散後の半導体ウエハ上に窒化膜を形成した後で該半導体ウエハを検査する第1の外観検査工程と、該第1の外観検査工程で不良となった箇所を記憶媒体に記憶させる工程と、該半導体ウエハに表面保護膜用のポリイミド膜を被覆した後、前記不良箇所にマーキングする工程と、該半導体ウエハをダイシングして半導体チップとし、該ダイシングによる異常の有無を判定するための前記半導体チップを検査する第2の外観検査工程とを有する外観検査方法とする。
また、前記ダイシングによる異常とは、ダイシングによって生じたキズ、割れ、異物の付着した状態である。
【0010】
【発明の実施の形態】
図1は、この発明の一実施例の半導体装置の外観検査方法を示す工程図である。この工程図は、図2の工程図に相当している。
第1工程では、半導体ウエハは最終拡散を終了する(ウエハプロセス1)。
第2工程では、その半導体ウエハ上に窒化膜2を形成する。
第3工程では、半導体ウエハ上のキズ、異物付着の有無を検査するための第1の外観検査11をする。その検査で不良となった箇所を記憶媒体に記憶させる。尚、この第1の外観検査11は、ウエハ状態のため、検査工数の少ない自動外観検査装置を適用することで製造コストを低減できる。
第4工程では、半導体ウエハ上にポリイミド膜3を形成する。
第5工程では、半導体ウエハをバックグラインド4して所定の厚さまで薄くする。
第6工程では、半導体ウエハの電気的特性試験のためにウエハプロービング5をする。その後、このプロービングで不良となった箇所と第2工程で記憶媒体に記憶された不良箇所にマーキングする。
第7工程では、半導体ウエハをチップ化するためにダイシング6する。
第8工程では、半導体チップをトレイ入れ7をする。
第9工程では、ダイシングによるキズ、欠け、異物付着を検査するための第2の外観検査12を行う。
第10工程では、良品チップを梱包し出荷する。
【0011】
前記の第3工程では最終拡散後および窒化膜を被覆した後のキズ・異物付着が検査され、その不良箇所を記憶媒体に記憶させておき、第6工程でその不良箇所にマーキングすることで、第7工程で半導体ウエハが半導体チップとなったとき、不良チップが判別できる。
また、第9工程ではダイシングで発生したキズ・欠け・異物付着を検査できる。
この発明の外観検査方法では、第4工程から第6工程でポリイミド膜上に付いたキズ・異物付着は検査から除くことで、品質に関係のないキズ・異物付着のある半導体チップが不良となることを防止できる(前記の不良率5〜10%をほぼ0%とすることができる)。そのため、半導体チップの良品率を向上することができる。
尚、第3工程を第2工程の前にもってきても構わない。ただし、窒化膜に付いたキズ・異物は不良判定できず、最終的に良品と判断された半導体チップの中に不良品が混入するおそれがある。
【0012】
【発明の効果】
この発明では、外観検査を2段階とし、1)第1段階では、最終拡散後の半導体ウエハの外観検査を実施し、ウエハについたキズ・異物付着などの異常箇所を特定し、後工程で不良チップとする。
【0013】
2)第2段階では、ダイシング後に外観検査を実施し、このダイシングで発生したキズ・欠け・異物付着のある半導体チップを不良とする。このときの外観検査では、ポリイミド膜形成工程からダイシングする工程の前までで、ポリイミド膜上についたキズ・欠け・異物付着がある半導体チップは不良としない。
このように、ポリイミド膜形成工程からダイシングする工程の前までに、ポリイミド膜上についたキズ・欠け・異物付着がある半導体チップを不良としないこのことにより、半導体チップの良品率を大幅に向上できる。
3)また、前記1)項の外観検査をに観検査自動装置を適用することで、検査工数を大幅に低減できる。
【図面の簡単な説明】
【図1】この発明の一実施例の半導体装置の外観検査方法を示す工程図
【図2】従来の半導体装置の外観検査方法を示す工程図
【符号の説明】
1  ウエハプロセス
2  窒化膜
3  ポリイミド
4  バックグラインド
5  ウエハプロービング
6  ダイシング
7  トレイ入れ
8  外観検査
9  梱包・出荷
11  第1の外観検査
12  第2の外観検査
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device appearance inspection method.
[0002]
[Prior art]
FIG. 2 is a process chart showing a conventional semiconductor device appearance inspection method. This figure shows a process from a protective film forming process to a semiconductor chip in a wafer process of a semiconductor device.
[0003]
After the end of the wafer process 1 (after the end of the final diffusion), a nitride film 2 of about 1 μm is formed as a surface protection film. Recently, a polyimide 3 is formed on the nitride film 2 as a buffer coat (buffer material film) with a thickness of 1 μm to 10 μm in order to protect the wafer from thermal and mechanical shock of the epoxy resin for packaging. Often.
[0004]
Thereafter, back grinding 4 (grinding of the back surface of the wafer) for housing in the thin film package is performed. In general, the thickness of a 6-inch wafer is reduced from 625 μm to 300 μm, and the thickness of an 8-inch wafer is reduced from 750 μm to 350 μm. Next, wafer probing 5 is performed to perform an electrical characteristic test. Then, dicing 6 for chipping from the wafer and chip tray insertion 7 are performed, and thereafter, appearance inspection for screening for scratches / foreign substances on the surface of the semiconductor chip (hereinafter simply referred to as chip) and cracks / chips at the time of dicing. 8 (inspection of 20 to 30 times with a microscope), and finally, it is sent to the packaging process by packing and shipping 9.
[0005]
The appearance inspection 8 is generally performed by an artificial method, and in the case of a high-quality semiconductor device, defective products are prevented from being shipped in two appearance inspections.
Various proposals have been made for the appearance inspection method (for example, see Patent Document 1). However, there is no proposal for an appearance inspection method when the polyimide 3 is coated as a buffer coat.
[0006]
[Patent Document 1]
JP-A-6-252230
[Problems to be solved by the invention]
In the present invention, there is a step in which manufacturing equipment and jigs come into contact with wafers and chips in the steps after applying polyimide (back flanking, wafer probing, dicing, tray loading), and the polyimide film is softer than the nitride film. For this reason, scratches may occur on the polyimide film, or foreign matter may adhere to the polyimide film. However, in this case, since there is no problem in quality, it can be treated as a non-defective product. However, it is difficult to distinguish it from the original defect having a quality problem (for example, foreign matter or scratch under the polyimide film). In the appearance inspection process, defective products may be frequently generated (defective rate: 5 to 10%) in order to determine defects including those having no problem in quality.
SUMMARY OF THE INVENTION It is an object of the present invention to provide a method for inspecting the appearance of a semiconductor device which solves the above-mentioned problems and does not cause defective foreign matter adherence and flaws on a polyimide film having no problem in quality.
[0008]
[Means for Solving the Problems]
In order to achieve the above object, a first appearance inspection step of inspecting a semiconductor wafer after final diffusion, a step of storing a defective portion in the first appearance inspection step in a storage medium, After coating the wafer with a polyimide film for a surface protection film, a step of marking a defective portion stored in the storage medium, dicing the semiconductor wafer into a semiconductor chip, and determining the abnormality due to the dicing. And a second visual inspection step of inspecting the semiconductor chip.
[0009]
In addition, a first appearance inspection step of inspecting the semiconductor wafer after forming a nitride film on the semiconductor wafer after the final diffusion, and a portion defective in the first appearance inspection step are stored in a storage medium. A step of coating the semiconductor wafer with a polyimide film for a surface protection film, and then marking the defective portion, and dicing the semiconductor wafer into semiconductor chips to determine whether there is any abnormality due to the dicing. A second inspection step of inspecting the semiconductor chip.
In addition, the abnormality caused by the dicing is a state in which a scratch, a crack, or a foreign matter is caused by the dicing.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a process chart showing a method for inspecting the appearance of a semiconductor device according to one embodiment of the present invention. This process diagram corresponds to the process diagram of FIG.
In the first step, the semiconductor wafer completes the final diffusion (wafer process 1).
In the second step, a nitride film 2 is formed on the semiconductor wafer.
In the third step, a first visual inspection 11 for inspecting the presence or absence of flaws and foreign substances on the semiconductor wafer is performed. The location that failed in the inspection is stored in a storage medium. Since the first visual inspection 11 is in a wafer state, the manufacturing cost can be reduced by applying an automatic visual inspection device having a small number of inspection steps.
In the fourth step, a polyimide film 3 is formed on the semiconductor wafer.
In the fifth step, the semiconductor wafer is back-ground 4 to reduce the thickness to a predetermined thickness.
In the sixth step, wafer probing 5 is performed for an electrical characteristic test of the semiconductor wafer. After that, marking is performed on the defective portion due to the probing and the defective portion stored in the storage medium in the second step.
In the seventh step, dicing 6 is performed to turn the semiconductor wafer into chips.
In the eighth step, the semiconductor chips are put in the tray 7.
In the ninth step, a second appearance inspection 12 for inspecting for scratches, chipping, and foreign matter adhesion due to dicing is performed.
In the tenth step, non-defective chips are packed and shipped.
[0011]
In the third step, flaws and foreign matter adhesion after the final diffusion and after covering the nitride film are inspected, the defective portion is stored in a storage medium, and the defective portion is marked in the sixth step. When the semiconductor wafer becomes a semiconductor chip in the seventh step, a defective chip can be determined.
Further, in the ninth step, it is possible to inspect for flaws, chips, and foreign substances generated by dicing.
According to the appearance inspection method of the present invention, the semiconductor chip having the scratches and the foreign matter attached irrespective of quality becomes defective by removing the scratches and the foreign matter attached to the polyimide film in the fourth to sixth steps from the inspection. Can be prevented (the defect rate of 5 to 10% can be reduced to almost 0%). Therefore, the yield rate of semiconductor chips can be improved.
Note that the third step may be performed before the second step. However, scratches / foreign matter attached to the nitride film cannot be determined as defective, and there is a possibility that a defective product may be mixed in a semiconductor chip finally determined to be good.
[0012]
【The invention's effect】
According to the present invention, the appearance inspection is performed in two stages. 1) In the first stage, the appearance inspection of the semiconductor wafer after the final diffusion is performed to identify abnormal spots on the wafer, such as scratches and adhesion of foreign matter, and to perform a defect in a subsequent process. Chips.
[0013]
2) In the second stage, an external appearance inspection is performed after dicing, and a semiconductor chip having scratches, chips, or foreign matter generated by the dicing is determined to be defective. In the appearance inspection at this time, a semiconductor chip having scratches, chips, or foreign matter adhered on the polyimide film from the polyimide film forming step to before the dicing step is not regarded as defective.
As described above, before the dicing step from the polyimide film forming step, the semiconductor chip having scratches, chips, and foreign matter attached to the polyimide film is not regarded as defective, thereby greatly improving the yield rate of the semiconductor chip. .
3) In addition, by applying the visual inspection automatic device to the visual inspection described in the above item 1), the number of inspection steps can be significantly reduced.
[Brief description of the drawings]
FIG. 1 is a process diagram showing a method for inspecting the appearance of a semiconductor device according to an embodiment of the present invention; FIG. 2 is a process diagram showing a method for inspecting the appearance of a conventional semiconductor device;
DESCRIPTION OF SYMBOLS 1 Wafer process 2 Nitride film 3 Polyimide 4 Back grinding 5 Wafer probing 6 Dicing 7 Tray insertion 8 Appearance inspection 9 Packing / shipping 11 First appearance inspection 12 Second appearance inspection

Claims (3)

最終拡散後の半導体ウエハを検査する第1の外観検査工程と、該第1の外観検査工程で不良となった箇所を記憶媒体に記憶させる工程と、該半導体ウエハに表面保護膜用のポリイミド膜を被覆した後、前記記憶媒体に記憶された不良箇所にマーキングする工程と、該半導体ウエハをダイシングして半導体チップとし、該ダイシングによる異常を判定するための前記半導体チップを検査する第2の外観検査工程とを有する半導体装置の外観検査方法。A first appearance inspection step of inspecting the semiconductor wafer after the final diffusion, a step of storing a defective portion in the first appearance inspection step in a storage medium, and a polyimide film for a surface protection film on the semiconductor wafer Marking a defective portion stored in the storage medium after coating the semiconductor wafer, dicing the semiconductor wafer into a semiconductor chip, and inspecting the semiconductor chip to determine an abnormality due to the dicing. A method for inspecting the appearance of a semiconductor device, comprising: an inspecting step. 最終拡散後の半導体ウエハ上に窒化膜を形成した後で該半導体ウエハを検査する第1の外観検査工程と、該第1の外観検査工程で不良となった箇所を記憶媒体に記憶させる工程と、該半導体ウエハに表面保護膜用のポリイミド膜を被覆した後、前記不良箇所にマーキングする工程と、該半導体ウエハをダイシングして半導体チップとし、該ダイシングによる異常の有無を判定するための前記半導体チップを検査する第2の外観検査工程とを有する半導体装置の外観検査方法。A first appearance inspection step of inspecting the semiconductor wafer after forming a nitride film on the semiconductor wafer after the final diffusion, and a step of storing a defective portion in the first appearance inspection step in a storage medium. A step of marking the defective portion after coating the semiconductor wafer with a polyimide film for a surface protective film, and dicing the semiconductor wafer into semiconductor chips, and determining whether there is an abnormality due to the dicing. And a second visual inspection step of inspecting a chip. 前記ダイシングによる異常が、ダイシングによって生じたキズ、割れ、異物の付着した状態であることを特徴とする請求項1または2に記載の半導体装置の外観検査方法。3. The method according to claim 1, wherein the abnormality caused by the dicing is a state in which a scratch, a crack, or a foreign matter is caused by the dicing. 4.
JP2002293216A 2002-10-07 2002-10-07 Visual inspection method for semiconductor device Pending JP2004128368A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005340303A (en) * 2004-05-24 2005-12-08 Renesas Technology Corp Method of manufacturing semiconductor device
JP2009021572A (en) * 2007-06-12 2009-01-29 Shin Etsu Handotai Co Ltd Defect detection method, defect detection system and method of manufacturing light emitting device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005340303A (en) * 2004-05-24 2005-12-08 Renesas Technology Corp Method of manufacturing semiconductor device
JP4547187B2 (en) * 2004-05-24 2010-09-22 ルネサスエレクトロニクス株式会社 Manufacturing method of semiconductor device
JP2009021572A (en) * 2007-06-12 2009-01-29 Shin Etsu Handotai Co Ltd Defect detection method, defect detection system and method of manufacturing light emitting device

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