CH625075A5 - - Google Patents

Download PDF

Info

Publication number
CH625075A5
CH625075A5 CH188978A CH188978A CH625075A5 CH 625075 A5 CH625075 A5 CH 625075A5 CH 188978 A CH188978 A CH 188978A CH 188978 A CH188978 A CH 188978A CH 625075 A5 CH625075 A5 CH 625075A5
Authority
CH
Switzerland
Prior art keywords
transistor
memory element
gate
electrode
terminal
Prior art date
Application number
CH188978A
Other languages
English (en)
French (fr)
Inventor
Bernard Gerber
Fritz Leuenberger
Original Assignee
Centre Electron Horloger
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Centre Electron Horloger filed Critical Centre Electron Horloger
Priority to CH188978A priority Critical patent/CH625075A5/fr
Priority to DE19792906706 priority patent/DE2906706A1/de
Priority to JP1914179A priority patent/JPS54122942A/ja
Priority to US06/014,251 priority patent/US4228527A/en
Publication of CH625075A5 publication Critical patent/CH625075A5/fr

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
    • G11C16/045—Floating gate memory cells with both P and N channel memory transistors, usually sharing a common floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/02—Structural aspects of erasable programmable read-only memories
    • G11C2216/10—Floating gate memory cells with a single polysilicon layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
CH188978A 1978-02-22 1978-02-22 CH625075A5 (no)

Priority Applications (4)

Application Number Priority Date Filing Date Title
CH188978A CH625075A5 (no) 1978-02-22 1978-02-22
DE19792906706 DE2906706A1 (de) 1978-02-22 1979-02-21 Speicherelement zum elektrisch wiederholt programmierbaren dauerhaften speichern
JP1914179A JPS54122942A (en) 1978-02-22 1979-02-22 Electrically reprogrammable nonnvolatile memory
US06/014,251 US4228527A (en) 1978-02-22 1979-02-22 Electrically reprogrammable non volatile memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CH188978A CH625075A5 (no) 1978-02-22 1978-02-22

Publications (1)

Publication Number Publication Date
CH625075A5 true CH625075A5 (no) 1981-08-31

Family

ID=4220967

Family Applications (1)

Application Number Title Priority Date Filing Date
CH188978A CH625075A5 (no) 1978-02-22 1978-02-22

Country Status (4)

Country Link
US (1) US4228527A (no)
JP (1) JPS54122942A (no)
CH (1) CH625075A5 (no)
DE (1) DE2906706A1 (no)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4317272A (en) * 1979-10-26 1982-03-02 Texas Instruments Incorporated High density, electrically erasable, floating gate memory cell
US4561004A (en) * 1979-10-26 1985-12-24 Texas Instruments High density, electrically erasable, floating gate memory cell
EP0061512B1 (de) * 1981-04-01 1985-09-18 Deutsche ITT Industries GmbH Integrierte Schaltungsanordnung zum Schreiben, Lesen und Löschen von Speichermatrizen mit Isolierschicht-Feldeffekttransistoren nichtflüchtigen Speicherverhaltens
JPS57194565A (en) * 1981-05-25 1982-11-30 Toshiba Corp Semiconductor memory device
CA1212428A (en) * 1982-09-30 1986-10-07 James M. Cartwright, Jr. Electrically erasable programmable electronic circuits
US4596938A (en) * 1982-09-30 1986-06-24 Rca Corporation Electrically erasable programmable electronic circuits using programmable-threshold-voltage FET pairs
US4590503A (en) * 1983-07-21 1986-05-20 Honeywell Inc. Electrically erasable programmable read only memory
US4785199A (en) * 1983-11-28 1988-11-15 Stanford University Programmable complementary transistors
US4571704A (en) 1984-02-17 1986-02-18 Hughes Aircraft Company Nonvolatile latch
JPS61105862A (ja) * 1984-10-30 1986-05-23 Toshiba Corp 半導体装置
JPH0770230B2 (ja) * 1985-04-18 1995-07-31 日本電気株式会社 半導体メモリ
JPS61289598A (ja) * 1985-06-17 1986-12-19 Toshiba Corp 読出専用半導体記憶装置
US4797856A (en) * 1987-04-16 1989-01-10 Intel Corporation Self-limiting erase scheme for EEPROM
US4885719A (en) * 1987-08-19 1989-12-05 Ict International Cmos Technology, Inc. Improved logic cell array using CMOS E2 PROM cells
US4862019A (en) * 1988-04-20 1989-08-29 Texas Instruments Incorporated Single-level poly programmable bit circuit
US4866307A (en) * 1988-04-20 1989-09-12 Texas Instruments Incorporated Integrated programmable bit circuit using single-level poly construction
US5016217A (en) * 1988-05-17 1991-05-14 Ict International Cmos Technology, Inc. Logic cell array using CMOS EPROM cells having reduced chip surface area
EP0478573A4 (en) * 1989-06-20 1992-07-08 Xicor, Inc An improved programmable semi-conductor resistive element
JPH03179780A (ja) * 1989-12-07 1991-08-05 Fujitsu Ltd 半導体装置
JP2596695B2 (ja) * 1993-05-07 1997-04-02 インターナショナル・ビジネス・マシーンズ・コーポレイション Ｅｅｐｒｏｍ
US5604700A (en) * 1995-07-28 1997-02-18 Motorola, Inc. Non-volatile memory cell having a single polysilicon gate
US6985386B1 (en) * 2004-07-08 2006-01-10 National Semiconductor Corporation Programming method for nonvolatile memory cell
US7020027B1 (en) * 2004-07-08 2006-03-28 National Semiconductor Corporation Programming method for nonvolatile memory cell
US6992927B1 (en) * 2004-07-08 2006-01-31 National Semiconductor Corporation Nonvolatile memory cell
US20080310237A1 (en) * 2007-06-18 2008-12-18 Nantronics Semiconductor. Inc. CMOS Compatible Single-Poly Non-Volatile Memory
US8018009B2 (en) 2007-12-07 2011-09-13 METAMEMS Corp. Forming large planar structures from substrates using edge Coulomb forces
US20090149038A1 (en) * 2007-12-07 2009-06-11 Metamems Llc Forming edge metallic contacts and using coulomb forces to improve ohmic contact
US7728427B2 (en) * 2007-12-07 2010-06-01 Lctank Llc Assembling stacked substrates that can form cylindrical inductors and adjustable transformers
US7863651B2 (en) * 2007-12-07 2011-01-04 METAMEMS Corp. Using multiple coulomb islands to reduce voltage stress
US7812336B2 (en) * 2007-12-07 2010-10-12 METAMEMS Corp. Levitating substrate being charged by a non-volatile device and powered by a charged capacitor or bonding wire
US7965489B2 (en) * 2007-12-07 2011-06-21 METAMEMS Corp. Using coulomb forces to form 3-D reconfigurable antenna structures
US8159809B2 (en) * 2007-12-07 2012-04-17 METAMEMS Corp. Reconfigurable system that exchanges substrates using coulomb forces to optimize a parameter
US7946174B2 (en) * 2007-12-07 2011-05-24 METAMEMS Corp. Decelerometer formed by levitating a substrate into equilibrium
US8531848B2 (en) * 2007-12-07 2013-09-10 METAMEMS Corp. Coulomb island and Faraday shield used to create adjustable Coulomb forces
US8008070B2 (en) * 2007-12-07 2011-08-30 METAMEMS Corp. Using coulomb forces to study charateristics of fluids and biological samples

Also Published As

Publication number Publication date
US4228527A (en) 1980-10-14
JPS54122942A (en) 1979-09-22
DE2906706A1 (de) 1979-08-30

Similar Documents

Publication Publication Date Title
CH625075A5 (no)
FR2692720A1 (fr) Dispositif d'EPROM à couche unique de silicium polycristallin à effacement rapide.
TWI451562B (zh) 操作具有氧化／氮化多層絕緣結構非揮發記憶胞之方法
EP1495496B1 (fr) Dispositif semiconducteur de memoire, non volatile, programmable et effacable electriquement, a une seule couche de materiau de grille, et plan memoire correspondant
FR2533740A1 (fr) Memoire remanente
FR2484124A1 (fr) Cellule de memoire remanente a " gachette " flottante, modifiable electriquement
US20020149061A1 (en) Nonvolatile memory cell, operating method of the same and nonvolatile memory array
EP1768189B1 (fr) Mémoire non volatile reprogrammable
JPH0555596A (ja) 半導体不揮発性記憶装置
CH631287A5 (fr) Element de memoire non-volatile, electriquement reprogrammable.
EP0648375B1 (fr) Memoire eeprom de type flash a triples grilles et son procede de fabrication
JPS58169959A (ja) 電気的にプログラミング及び消去できるｍｏｓメモリ装置
US20080099826A1 (en) Non-volatile memory cells having a polysilicon-containing, multi-layer insulating structure, memory arrays including the same and methods of operating the same
US4335391A (en) Non-volatile semiconductor memory elements and methods of making
FR3021803A1 (fr) Cellules memoire jumelles accessibles individuellement en lecture
FR2543726A1 (fr) Cellule de memoire ram non volatile a transistors cmos a grille flottante commune
EP0543703B1 (fr) Mémoire intégrée électriquement programmable à un seul transistor
US5677876A (en) Flash EEPROM with impurity diffused layer in channel area and process of production of same
FR2511801A1 (fr) Memoire d'informations et son procede de fabrication
US6841447B1 (en) EEPROM device having an isolation-bounded tunnel capacitor and fabrication process
EP0296038B1 (fr) Mémoire EPROM effaçable par impulsions
EP0162737B1 (fr) Point-mémoire électriquement effaçable et reprogrammable, comportant une grille flottante au-dessus d'une grille de commande
CH633123A5 (en) Electrically reprogrammable non-volatile memory element
FR2491666A1 (fr) Dispositif semi-conducteur de memorisation, tel que par exemple une memoire dynamique a acces direct du type mos
FR2764736A1 (fr) Cellule eeprom a un seul niveau de silicium polycristallin et zone tunnel auto-alignee

Legal Events

Date Code Title Description
PL Patent ceased