CH614808A5 - - Google Patents

Info

Publication number
CH614808A5
CH614808A5 CH594377A CH594377A CH614808A5 CH 614808 A5 CH614808 A5 CH 614808A5 CH 594377 A CH594377 A CH 594377A CH 594377 A CH594377 A CH 594377A CH 614808 A5 CH614808 A5 CH 614808A5
Authority
CH
Switzerland
Application number
CH594377A
Inventor
Richard Lewis Bersin
James Harold Junkin
Richard Francis Reichelderfer
Original Assignee
Int Plasma Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Int Plasma Corp filed Critical Int Plasma Corp
Publication of CH614808A5 publication Critical patent/CH614808A5/xx

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/948—Radiation resist

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Inorganic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Drying Of Semiconductors (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Silicon Compounds (AREA)
CH594377A 1976-05-14 1977-05-12 CH614808A5 (nl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US68637376A 1976-05-14 1976-05-14

Publications (1)

Publication Number Publication Date
CH614808A5 true CH614808A5 (nl) 1979-12-14

Family

ID=24756042

Family Applications (1)

Application Number Title Priority Date Filing Date
CH594377A CH614808A5 (nl) 1976-05-14 1977-05-12

Country Status (8)

Country Link
US (1) US4127437A (nl)
JP (1) JPS6048902B2 (nl)
CH (1) CH614808A5 (nl)
DE (1) DE2721086A1 (nl)
FR (1) FR2350937A1 (nl)
GB (1) GB1539700A (nl)
IT (1) IT1083827B (nl)
NL (1) NL7705320A (nl)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2802976C2 (de) * 1978-01-24 1980-02-07 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren und Vorrichtung zur Herstellung von Durchbrüchen (Löchern) in Glasplatten, vorzugsweise mit feinsten Strukturen
JPS5562773A (en) * 1978-11-06 1980-05-12 Seiko Epson Corp Preparation of semiconductor device
DE3071380D1 (en) * 1979-05-31 1986-03-13 Fujitsu Ltd Method of producing a semiconductor device
NL7906996A (nl) * 1979-09-20 1981-03-24 Philips Nv Werkwijze voor het reinigen van een reaktor.
JPS56162831A (en) * 1980-05-19 1981-12-15 Mitsubishi Electric Corp Forming method for electrode and wiring layer
US4325182A (en) * 1980-08-25 1982-04-20 General Electric Company Fast isolation diffusion
US4389281A (en) * 1980-12-16 1983-06-21 International Business Machines Corporation Method of planarizing silicon dioxide in semiconductor devices
JPS57190320A (en) * 1981-05-20 1982-11-22 Toshiba Corp Dry etching method
US4506005A (en) * 1983-05-10 1985-03-19 Gca Corporation Method of catalytic etching
JPS617639A (ja) * 1984-06-22 1986-01-14 Toshiba Corp 半導体薄膜の分解装置
US4749440A (en) * 1985-08-28 1988-06-07 Fsi Corporation Gaseous process and apparatus for removing films from substrates
US5044314A (en) * 1986-10-15 1991-09-03 Advantage Production Technology, Inc. Semiconductor wafer processing apparatus
EP0376252B1 (en) * 1988-12-27 1997-10-22 Kabushiki Kaisha Toshiba Method of removing an oxide film on a substrate
KR930005440B1 (ko) * 1989-10-02 1993-06-21 다이닛뽕 스쿠린 세이소오 가부시키가이샤 절연막의 선택적 제거방법
US5087323A (en) * 1990-07-12 1992-02-11 Idaho Research Foundation, Inc. Fine line pattern formation by aerosol centrifuge etching technique
US5294568A (en) * 1990-10-12 1994-03-15 Genus, Inc. Method of selective etching native oxide
JP2833946B2 (ja) * 1992-12-08 1998-12-09 日本電気株式会社 エッチング方法および装置
KR0170902B1 (ko) * 1995-12-29 1999-03-30 김주용 반도체 소자의 제조방법
US6153358A (en) * 1996-12-23 2000-11-28 Micorn Technology, Inc. Polyimide as a mask in vapor hydrogen fluoride etching and method of producing a micropoint
US6165853A (en) * 1997-06-16 2000-12-26 Micron Technology, Inc. Trench isolation method
US6090683A (en) * 1997-06-16 2000-07-18 Micron Technology, Inc. Method of etching thermally grown oxide substantially selectively relative to deposited oxide
US6022485A (en) 1997-10-17 2000-02-08 International Business Machines Corporation Method for controlled removal of material from a solid surface
US6740247B1 (en) 1999-02-05 2004-05-25 Massachusetts Institute Of Technology HF vapor phase wafer cleaning and oxide etching
US6544842B1 (en) * 1999-05-01 2003-04-08 Micron Technology, Inc. Method of forming hemisphere grained silicon on a template on a semiconductor work object
KR100381011B1 (ko) 2000-11-13 2003-04-26 한국전자통신연구원 멤즈소자 제조용 미세구조체를 고착없이 띄우는 방법
JP5102467B2 (ja) * 2006-06-29 2012-12-19 東京エレクトロン株式会社 基板処理方法
WO2024095769A1 (ja) * 2022-11-02 2024-05-10 Ａｇｃ株式会社 凹部構造を有する部材を製造する方法および凹部構造を有する部材

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3535137A (en) * 1967-01-13 1970-10-20 Ibm Method of fabricating etch resistant masks
US3471291A (en) * 1967-05-29 1969-10-07 Gen Electric Protective plating of oxide-free silicon surfaces
US3520687A (en) * 1967-05-29 1970-07-14 Gen Electric Etching of silicon dioxide by photosensitive solutions
US3494768A (en) * 1967-05-29 1970-02-10 Gen Electric Condensed vapor phase photoetching of surfaces
US3615956A (en) * 1969-03-27 1971-10-26 Signetics Corp Gas plasma vapor etching process
US3935117A (en) * 1970-08-25 1976-01-27 Fuji Photo Film Co., Ltd. Photosensitive etching composition
US3867216A (en) * 1972-05-12 1975-02-18 Adir Jacob Process and material for manufacturing semiconductor devices
JPS5539903B2 (nl) * 1972-10-19 1980-10-14
DE2411866A1 (de) * 1973-03-12 1974-09-19 Fuji Photo Film Co Ltd Verfahren zur herstellung von metallbildern und mittel zu seiner durchfuehrung

Also Published As

Publication number Publication date
FR2350937A1 (fr) 1977-12-09
JPS531198A (en) 1978-01-07
NL7705320A (nl) 1977-11-16
IT1083827B (it) 1985-05-25
GB1539700A (en) 1979-01-31
US4127437A (en) 1978-11-28
JPS6048902B2 (ja) 1985-10-30
DE2721086A1 (de) 1977-12-01

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Legal Events

Date Code Title Description
PL Patent ceased