CH583461A5 - - Google Patents

Info

Publication number
CH583461A5
CH583461A5 CH381875A CH381875A CH583461A5 CH 583461 A5 CH583461 A5 CH 583461A5 CH 381875 A CH381875 A CH 381875A CH 381875 A CH381875 A CH 381875A CH 583461 A5 CH583461 A5 CH 583461A5
Authority
CH
Switzerland
Application number
CH381875A
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of CH583461A5 publication Critical patent/CH583461A5/xx

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/298Semiconductor material, e.g. amorphous silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/905Plural dram cells share common contact or common trench

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Formation Of Insulating Films (AREA)
  • Bipolar Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Element Separation (AREA)
  • Recrystallisation Techniques (AREA)
CH381875A 1974-03-30 1975-03-25 CH583461A5 (cs)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3617574A JPS532552B2 (cs) 1974-03-30 1974-03-30

Publications (1)

Publication Number Publication Date
CH583461A5 true CH583461A5 (cs) 1976-12-31

Family

ID=12462395

Family Applications (1)

Application Number Title Priority Date Filing Date
CH381875A CH583461A5 (cs) 1974-03-30 1975-03-25

Country Status (14)

Country Link
US (1) US4014037A (cs)
JP (1) JPS532552B2 (cs)
AT (1) AT370559B (cs)
AU (1) AU502578B2 (cs)
CA (1) CA1029475A (cs)
CH (1) CH583461A5 (cs)
DE (1) DE2513459B2 (cs)
ES (1) ES436123A1 (cs)
FR (1) FR2266301B1 (cs)
GB (1) GB1496814A (cs)
IT (1) IT1034720B (cs)
NL (1) NL182681C (cs)
SE (1) SE406249C (cs)
SU (1) SU638289A3 (cs)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6022497B2 (ja) * 1974-10-26 1985-06-03 ソニー株式会社 半導体装置
JPS5193874A (en) 1975-02-15 1976-08-17 Handotaisochino seizohoho
JPS51123562A (en) * 1975-04-21 1976-10-28 Sony Corp Production method of semiconductor device
JPS6041458B2 (ja) * 1975-04-21 1985-09-17 ソニー株式会社 半導体装置の製造方法
JPS51126761A (en) * 1975-04-25 1976-11-05 Sony Corp Schottky barrier type semi-conductor unit
JPS51128269A (en) * 1975-04-30 1976-11-09 Sony Corp Semiconductor unit
FR2335951A1 (fr) * 1975-12-19 1977-07-15 Radiotechnique Compelec Dispositif semiconducteur a surface passivee et procede d'obtention de la structure de passivation
IN147572B (cs) * 1977-02-24 1980-04-19 Rca Corp
IN147578B (cs) * 1977-02-24 1980-04-19 Rca Corp
DE2713647C2 (de) * 1977-03-28 1984-11-29 Tokyo Shibaura Electric Co., Ltd., Kawasaki, Kanagawa Halbleitervorrichtung, bestehend aus einem Halbleitersubstrat und aus einem Oberflächenschutzfilm
US4194934A (en) * 1977-05-23 1980-03-25 Varo Semiconductor, Inc. Method of passivating a semiconductor device utilizing dual polycrystalline layers
DE2730367A1 (de) * 1977-07-05 1979-01-18 Siemens Ag Verfahren zum passivieren von halbleiterelementen
US4174252A (en) * 1978-07-26 1979-11-13 Rca Corporation Method of defining contact openings in insulating layers on semiconductor devices without the formation of undesirable pinholes
US4191788A (en) * 1978-11-13 1980-03-04 Trw Inc. Method to reduce breakage of V-grooved <100> silicon substrate
US4199384A (en) * 1979-01-29 1980-04-22 Rca Corporation Method of making a planar semiconductor on insulating substrate device utilizing the deposition of a dual dielectric layer between device islands
JPS5627935A (en) * 1979-08-15 1981-03-18 Toshiba Corp Semiconductor device
US4803528A (en) * 1980-07-28 1989-02-07 General Electric Company Insulating film having electrically conducting portions
US4339285A (en) * 1980-07-28 1982-07-13 Rca Corporation Method for fabricating adjacent conducting and insulating regions in a film by laser irradiation
US4344985A (en) * 1981-03-27 1982-08-17 Rca Corporation Method of passivating a semiconductor device with a multi-layer passivant system by thermally growing a layer of oxide on an oxygen doped polycrystalline silicon layer
US4420765A (en) * 1981-05-29 1983-12-13 Rca Corporation Multi-layer passivant system
US4537813A (en) * 1982-09-27 1985-08-27 At&T Technologies, Inc. Photomask encapsulation
US4965173A (en) * 1982-12-08 1990-10-23 International Rectifier Corporation Metallizing process and structure for semiconductor devices
US4489103A (en) * 1983-09-16 1984-12-18 Rca Corporation SIPOS Deposition method
JPS6068621A (ja) * 1983-09-26 1985-04-19 Toshiba Corp 半導体装置の製造方法
EP0160941A3 (en) * 1984-05-07 1987-03-25 General Electric Company High voltage interconnect system for a semiconductor integrated circuit
US4663820A (en) * 1984-06-11 1987-05-12 International Rectifier Corporation Metallizing process for semiconductor devices
DE3520599A1 (de) * 1984-06-15 1985-12-19 Rca Corp., Princeton, N.J. Halbleiterbauelement
JPS6276673A (ja) * 1985-09-30 1987-04-08 Toshiba Corp 高耐圧半導体装置
KR900005038B1 (ko) * 1987-07-31 1990-07-18 삼성전자 주식회사 고저항 다결정 실리콘의 제조방법
US5192993A (en) * 1988-09-27 1993-03-09 Kabushiki Kaisha Toshiba Semiconductor device having improved element isolation area
DE69014359T2 (de) * 1989-03-24 1995-05-24 Ibm Halbleitervorrichtung mit einem relativ zu einem vergrabenen Subkollektor selbstausgerichteten Kontakt.
DE4119904A1 (de) * 1991-06-17 1992-12-24 Telefunken Electronic Gmbh Halbleiteranordnung
JP5311791B2 (ja) * 2007-10-12 2013-10-09 東京エレクトロン株式会社 ポリシリコン膜の形成方法
JP5195186B2 (ja) * 2008-09-05 2013-05-08 三菱電機株式会社 半導体装置の製造方法
US11171039B2 (en) * 2018-03-29 2021-11-09 Taiwan Semiconductor Manufacturing Company Ltd. Composite semiconductor substrate, semiconductor device and method for manufacturing the same

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE300472B (cs) * 1965-03-31 1968-04-29 Asea Ab
US3391287A (en) * 1965-07-30 1968-07-02 Westinghouse Electric Corp Guard junctions for p-nu junction semiconductor devices
US3710204A (en) * 1967-05-20 1973-01-09 Telefunken Patent A semiconductor device having a screen electrode of intrinsic semiconductor material
JPS497870B1 (cs) * 1969-06-06 1974-02-22
US3755721A (en) * 1970-06-15 1973-08-28 Intel Corp Floating gate solid state storage device and method for charging and discharging same
US3878549A (en) * 1970-10-27 1975-04-15 Shumpei Yamazaki Semiconductor memories
JPS5044209Y2 (cs) * 1971-04-20 1975-12-17

Also Published As

Publication number Publication date
JPS50130368A (cs) 1975-10-15
NL182681C (nl) 1988-04-18
NL182681B (nl) 1987-11-16
SE406249C (sv) 1987-07-13
JPS532552B2 (cs) 1978-01-28
AU7918975A (en) 1976-09-23
AT370559B (de) 1983-04-11
SE406249B (sv) 1979-01-29
FR2266301B1 (cs) 1980-04-11
CA1029475A (en) 1978-04-11
NL7503870A (nl) 1975-10-02
AU502578B2 (en) 1979-08-02
SE7503614L (cs) 1975-10-01
GB1496814A (en) 1978-01-05
DE2513459B2 (de) 1981-01-08
IT1034720B (it) 1979-10-10
DE2513459A1 (de) 1975-10-09
ATA243075A (de) 1982-08-15
ES436123A1 (es) 1977-04-16
SU638289A3 (ru) 1978-12-15
FR2266301A1 (cs) 1975-10-24
US4014037A (en) 1977-03-22

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Legal Events

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PL Patent ceased