CH508311A - Schaltungsanordnung zur Realisierung von logischen Funktionen - Google Patents

Schaltungsanordnung zur Realisierung von logischen Funktionen

Info

Publication number
CH508311A
CH508311A CH917470A CH917470A CH508311A CH 508311 A CH508311 A CH 508311A CH 917470 A CH917470 A CH 917470A CH 917470 A CH917470 A CH 917470A CH 508311 A CH508311 A CH 508311A
Authority
CH
Switzerland
Prior art keywords
implementation
circuit arrangement
logical functions
logical
functions
Prior art date
Application number
CH917470A
Other languages
English (en)
Inventor
Lotz Alfred
Original Assignee
Licentia Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19691933713 external-priority patent/DE1933713B2/de
Priority claimed from DE19691950330 external-priority patent/DE1950330B2/de
Priority claimed from DE19702014135 external-priority patent/DE2014135C3/de
Priority claimed from DE19702014110 external-priority patent/DE2014110C3/de
Application filed by Licentia Gmbh filed Critical Licentia Gmbh
Publication of CH508311A publication Critical patent/CH508311A/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00323—Delay compensation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00307—Modifications for increasing the reliability for protection in bipolar transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/007—Fail-safe circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/16—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using saturable magnetic devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/30—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using a transformer for feedback, e.g. blocking oscillator

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
CH917470A 1969-06-28 1970-06-17 Schaltungsanordnung zur Realisierung von logischen Funktionen CH508311A (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
DE19691933713 DE1933713B2 (de) 1969-06-28 1969-06-28 Schaltungsanordnung zur logischen verknuepfung wechsel spannungsfoermiger eingangssignale
DE19691950330 DE1950330B2 (de) 1969-06-28 1969-10-01 Schaltungsanordnung zur realisierung von logischen funktionen
DE19702014135 DE2014135C3 (de) 1969-06-28 1970-03-18 Schaltungsanordnung zur Realisierung von logischen Funktionen
DE19702014110 DE2014110C3 (de) 1969-06-28 1970-03-19 Schaltungsanordnung zur Realisierung von logischen Funktionen

Publications (1)

Publication Number Publication Date
CH508311A true CH508311A (de) 1971-05-31

Family

ID=27430920

Family Applications (1)

Application Number Title Priority Date Filing Date
CH917470A CH508311A (de) 1969-06-28 1970-06-17 Schaltungsanordnung zur Realisierung von logischen Funktionen

Country Status (4)

Country Link
US (1) US3654485A (de)
CH (1) CH508311A (de)
FR (1) FR2053940A5 (de)
GB (1) GB1321459A (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3953747A (en) * 1973-02-10 1976-04-27 Iwasaki Tsushinki Kabushiki Kaisha AC wave switching circuit using at least one switching transistor
JPS5928725A (ja) * 1982-08-09 1984-02-15 Hitachi Ltd 論理方式
US4638188A (en) * 1984-08-27 1987-01-20 Cray Research, Inc. Phase modulated pulse logic for gallium arsenide
US4965863A (en) * 1987-10-02 1990-10-23 Cray Computer Corporation Gallium arsenide depletion made MESFIT logic cell
FR2639777B1 (fr) * 1988-11-29 1992-04-17 Demarais Gerard Dispositif logique en securite intrinseque, pour ´ notamment ´ l'electronique ferroviaire
US6119949A (en) * 1999-01-06 2000-09-19 Honeywell Inc. Apparatus and method for providing a multiple option select function
GB201011110D0 (en) * 2010-07-01 2010-08-18 Univ Manchester Metropolitan Binary half-adder and other logic circuits

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2995664A (en) * 1954-06-01 1961-08-08 Rca Corp Transistor gate circuits
US2901640A (en) * 1956-12-31 1959-08-25 Litton Industries Inc Transistor gates
US3193781A (en) * 1962-01-03 1965-07-06 Sperry Rand Corp Oscillator having output frequencies selectable by combinations of bilevel voltage signals
US3231758A (en) * 1962-12-12 1966-01-25 Singer Inc H R B Pulse gate
FR91357E (de) * 1964-03-04 1968-10-23

Also Published As

Publication number Publication date
FR2053940A5 (de) 1971-04-16
US3654485A (en) 1972-04-04
GB1321459A (en) 1973-06-27

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Legal Events

Date Code Title Description
PL Patent ceased