CH455049A - Verfahren zum Behandeln der Oberfläche von Halbleiteranordnungen - Google Patents
Verfahren zum Behandeln der Oberfläche von HalbleiteranordnungenInfo
- Publication number
- CH455049A CH455049A CH472863A CH472863A CH455049A CH 455049 A CH455049 A CH 455049A CH 472863 A CH472863 A CH 472863A CH 472863 A CH472863 A CH 472863A CH 455049 A CH455049 A CH 455049A
- Authority
- CH
- Switzerland
- Prior art keywords
- treating
- semiconductor devices
- semiconductor
- devices
- Prior art date
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C22/00—Chemical surface treatment of metallic material by reaction of the surface with a reactive liquid, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals
- C23C22/02—Chemical surface treatment of metallic material by reaction of the surface with a reactive liquid, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using non-aqueous solutions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/906—Cleaning of wafer as interim step
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/974—Substrate surface preparation
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Weting (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DES0079160 | 1962-04-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
CH455049A true CH455049A (de) | 1968-04-30 |
Family
ID=7507991
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CH472863A CH455049A (de) | 1962-04-25 | 1963-04-16 | Verfahren zum Behandeln der Oberfläche von Halbleiteranordnungen |
Country Status (5)
Country | Link |
---|---|
US (1) | US3341367A (de) |
CH (1) | CH455049A (de) |
DE (1) | DE1639561B1 (de) |
GB (1) | GB1000683A (de) |
NL (1) | NL291914A (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1564580A1 (de) * | 1966-04-27 | 1969-07-31 | Semikron Gleichrichterbau | Verfahren zur Stabilisierung der Sperreigenschaft von Halbleiterbauelementen |
DE1901319A1 (de) * | 1969-01-11 | 1970-08-06 | Siemens Ag | Verfahren zur Herstellung von hochreinem Galliumarsenid |
EP0560617A3 (en) * | 1992-03-13 | 1993-11-24 | Kawasaki Steel Co | Method of manufacturing insulating film on semiconductor device and apparatus for carrying out the same |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1106879B (de) * | 1959-03-11 | 1961-05-18 | Siemens Ag | Verfahren zur Herabsetzung der Rekombination an den Oberflaechen von p-Zonen von Halbleiteranordnungen |
NL133278C (de) * | 1960-04-30 |
-
0
- NL NL291914D patent/NL291914A/xx unknown
-
1962
- 1962-04-25 DE DE19621639561 patent/DE1639561B1/de active Pending
-
1963
- 1963-04-16 CH CH472863A patent/CH455049A/de unknown
- 1963-04-23 US US275107A patent/US3341367A/en not_active Expired - Lifetime
- 1963-04-24 GB GB16101/63A patent/GB1000683A/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
GB1000683A (en) | 1965-08-11 |
NL291914A (de) | |
DE1639561B1 (de) | 1969-09-25 |
US3341367A (en) | 1967-09-12 |
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