CA2563450A1 - A method of and apparatus for implementing fast orthogonal transforms of variable size - Google Patents
A method of and apparatus for implementing fast orthogonal transforms of variable size Download PDFInfo
- Publication number
- CA2563450A1 CA2563450A1 CA002563450A CA2563450A CA2563450A1 CA 2563450 A1 CA2563450 A1 CA 2563450A1 CA 002563450 A CA002563450 A CA 002563450A CA 2563450 A CA2563450 A CA 2563450A CA 2563450 A1 CA2563450 A1 CA 2563450A1
- Authority
- CA
- Canada
- Prior art keywords
- butterfly
- unit
- reconfigurable
- stage
- architecture
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
- G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
- G06F17/141—Discrete Fourier transforms
- G06F17/142—Fast Fourier transforms, e.g. using a Cooley-Tukey type algorithm
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
- G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Data Mining & Analysis (AREA)
- Algebra (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Databases & Information Systems (AREA)
- Discrete Mathematics (AREA)
- Complex Calculations (AREA)
Applications Claiming Priority (13)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US58639104P | 2004-07-08 | 2004-07-08 | |
US58635304P | 2004-07-08 | 2004-07-08 | |
US58639004P | 2004-07-08 | 2004-07-08 | |
US58638904P | 2004-07-08 | 2004-07-08 | |
US60/586,390 | 2004-07-08 | ||
US60/586,389 | 2004-07-08 | ||
US60/586,353 | 2004-07-08 | ||
US60/586,391 | 2004-07-08 | ||
US60425804P | 2004-08-25 | 2004-08-25 | |
US60/604,258 | 2004-08-25 | ||
US11/071,340 US7568059B2 (en) | 2004-07-08 | 2005-03-03 | Low-power reconfigurable architecture for simultaneous implementation of distinct communication standards |
US11/071,340 | 2005-03-03 | ||
PCT/US2005/024063 WO2006014528A1 (en) | 2004-07-08 | 2005-07-08 | A method of and apparatus for implementing fast orthogonal transforms of variable size |
Publications (1)
Publication Number | Publication Date |
---|---|
CA2563450A1 true CA2563450A1 (en) | 2006-02-09 |
Family
ID=35787416
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002563450A Abandoned CA2563450A1 (en) | 2004-07-08 | 2005-07-08 | A method of and apparatus for implementing fast orthogonal transforms of variable size |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP1769391A1 (ja) |
JP (1) | JP2008506191A (ja) |
KR (1) | KR101162649B1 (ja) |
AU (1) | AU2005269896A1 (ja) |
CA (1) | CA2563450A1 (ja) |
WO (1) | WO2006014528A1 (ja) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2009110022A1 (ja) * | 2008-03-03 | 2009-09-11 | 富士通株式会社 | 無線通信装置 |
FR2935819B1 (fr) * | 2008-09-05 | 2010-09-10 | Commissariat Energie Atomique | Dispositif de traitement numerique pour transformee de fourier et filtrage a reponse impulsionnelle finie |
CN102737007B (zh) * | 2011-04-07 | 2015-01-28 | 中兴通讯股份有限公司 | 一种支持多个数据单元任意置换的方法和装置 |
WO2013042249A1 (ja) * | 2011-09-22 | 2013-03-28 | 富士通株式会社 | 高速フーリエ変換回路 |
JPWO2013042249A1 (ja) * | 2011-09-22 | 2015-03-26 | 富士通株式会社 | 高速フーリエ変換回路 |
KR101275087B1 (ko) | 2011-10-28 | 2013-06-17 | (주)에프씨아이 | 오에프디엠 수신기 |
WO2014013726A1 (ja) * | 2012-07-18 | 2014-01-23 | 日本電気株式会社 | Fft回路 |
US9934199B2 (en) | 2013-07-23 | 2018-04-03 | Nec Corporation | Digital filter device, digital filtering method, and storage medium having digital filter program stored thereon |
US9880975B2 (en) | 2013-12-13 | 2018-01-30 | Nec Corporation | Digital filter device, digital filter processing method, and storage medium having digital filter program stored thereon |
GB2548908B (en) * | 2016-04-01 | 2019-01-30 | Advanced Risc Mach Ltd | Complex multiply instruction |
KR102155770B1 (ko) * | 2018-11-27 | 2020-09-14 | 한국항공대학교산학협력단 | 레이다 응용을 위한 이중 완전 셔플 네트워크 기반 가변 푸리에 변환 장치 및 방법 |
CN113111300B (zh) * | 2020-01-13 | 2022-06-03 | 上海大学 | 具有优化资源消耗的定点fft实现系统 |
WO2021157172A1 (ja) * | 2020-02-06 | 2021-08-12 | 三菱電機株式会社 | 複素乗算回路 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
ATE131948T1 (de) * | 1987-08-21 | 1996-01-15 | Commw Scient Ind Res Org | Transformationsverarbeitungsschaltung |
US5293330A (en) * | 1991-11-08 | 1994-03-08 | Communications Satellite Corporation | Pipeline processor for mixed-size FFTs |
WO1997019412A1 (en) * | 1995-11-17 | 1997-05-29 | Teracom Svensk Rundradio | Improvements in or relating to real-time pipeline fast fourier transform processors |
US6003056A (en) * | 1997-01-06 | 1999-12-14 | Auslander; Lewis | Dimensionless fast fourier transform method and apparatus |
JPH11143860A (ja) | 1997-11-07 | 1999-05-28 | Matsushita Electric Ind Co Ltd | 直交変換装置 |
US6061705A (en) * | 1998-01-21 | 2000-05-09 | Telefonaktiebolaget Lm Ericsson | Power and area efficient fast fourier transform processor |
JP2001156644A (ja) * | 1999-11-29 | 2001-06-08 | Fujitsu Ltd | 直交変換装置 |
JP3846197B2 (ja) * | 2001-01-19 | 2006-11-15 | ソニー株式会社 | 演算システム |
US20030055861A1 (en) * | 2001-09-18 | 2003-03-20 | Lai Gary N. | Multipler unit in reconfigurable chip |
JP4546711B2 (ja) * | 2002-10-07 | 2010-09-15 | パナソニック株式会社 | 通信装置 |
-
2005
- 2005-07-08 EP EP05768342A patent/EP1769391A1/en not_active Withdrawn
- 2005-07-08 JP JP2007520491A patent/JP2008506191A/ja active Pending
- 2005-07-08 AU AU2005269896A patent/AU2005269896A1/en not_active Abandoned
- 2005-07-08 KR KR1020077003027A patent/KR101162649B1/ko not_active IP Right Cessation
- 2005-07-08 CA CA002563450A patent/CA2563450A1/en not_active Abandoned
- 2005-07-08 WO PCT/US2005/024063 patent/WO2006014528A1/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
KR101162649B1 (ko) | 2012-07-06 |
WO2006014528A1 (en) | 2006-02-09 |
AU2005269896A1 (en) | 2006-02-09 |
EP1769391A1 (en) | 2007-04-04 |
JP2008506191A (ja) | 2008-02-28 |
KR20070060074A (ko) | 2007-06-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FZDE | Discontinued |