CA2350506A1 - Technique de depot de couche conductrice sur un substrat - Google Patents

Technique de depot de couche conductrice sur un substrat Download PDF

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Publication number
CA2350506A1
CA2350506A1 CA002350506A CA2350506A CA2350506A1 CA 2350506 A1 CA2350506 A1 CA 2350506A1 CA 002350506 A CA002350506 A CA 002350506A CA 2350506 A CA2350506 A CA 2350506A CA 2350506 A1 CA2350506 A1 CA 2350506A1
Authority
CA
Canada
Prior art keywords
substrate
layer
conducting layer
ink
electrically conducting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002350506A
Other languages
English (en)
Inventor
Darren Lochun
David Harrison
Blue John Ramsey
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RT MICROWAVE Ltd
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GBGB9826447.6A external-priority patent/GB9826447D0/en
Priority claimed from GBGB9826446.8A external-priority patent/GB9826446D0/en
Application filed by Individual filed Critical Individual
Publication of CA2350506A1 publication Critical patent/CA2350506A1/fr
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/245Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
    • H05K3/246Reinforcing conductive paste, ink or powder patterns by other methods, e.g. by plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H05K3/1275Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by other printing techniques, e.g. letterpress printing, intaglio printing, lithographic printing, offset printing
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1173Differences in wettability, e.g. hydrophilic or hydrophobic areas
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • H05K3/182Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10Energy storage using batteries

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemically Coating (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

Cette invention a trait à une technique de dépôt de couche conductrice sur un substrat, laquelle technique consiste à déposer une encre sur le substrat par impression lithographique de manière à former une couche d'activation, puis à déposer une première couche conductrice de l'électricité sur cette couche d'activation par dépôt autocatalytique.
CA002350506A 1998-12-03 1999-12-03 Technique de depot de couche conductrice sur un substrat Abandoned CA2350506A1 (fr)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
GBGB9826447.6A GB9826447D0 (en) 1998-12-03 1998-12-03 Fabrication of a seeding layer to enable electroplating and electroless platingvia a lithographic printing process
GB9826446.8 1998-12-03
GBGB9826446.8A GB9826446D0 (en) 1998-12-03 1998-12-03 Electrical battery interconnect device
GB9826447.6 1998-12-03
PCT/GB1999/004064 WO2000033625A1 (fr) 1998-12-03 1999-12-03 Technique de depot de couche conductrice sur un substrat

Publications (1)

Publication Number Publication Date
CA2350506A1 true CA2350506A1 (fr) 2000-06-08

Family

ID=26314771

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002350506A Abandoned CA2350506A1 (fr) 1998-12-03 1999-12-03 Technique de depot de couche conductrice sur un substrat

Country Status (8)

Country Link
EP (1) EP1142456A1 (fr)
JP (1) JP2002531961A (fr)
CN (1) CN1242659C (fr)
AU (1) AU762686B2 (fr)
CA (1) CA2350506A1 (fr)
HK (1) HK1042627A1 (fr)
IL (1) IL143440A0 (fr)
WO (1) WO2000033625A1 (fr)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6413858B1 (en) 1999-08-27 2002-07-02 Micron Technology, Inc. Barrier and electroplating seed layer
GB0104982D0 (en) 2001-02-28 2001-04-18 Gill Steven Electrode
FR2825228B1 (fr) 2001-05-25 2003-09-19 Framatome Connectors Int Procede de fabrication d'un circuit imprime et antenne planaire fabriquee avec celui-ci
GB0117431D0 (en) * 2001-07-17 2001-09-12 Univ Brunel Method for printing conducting layer onto substrate
US6828713B2 (en) * 2002-07-30 2004-12-07 Agilent Technologies, Inc Resonator with seed layer
GB2394725A (en) * 2002-10-04 2004-05-05 Qinetiq Ltd Method of forming a magnetic information tag by electroless deposition
US7255782B2 (en) 2004-04-30 2007-08-14 Kenneth Crouse Selective catalytic activation of non-conductive substrates
US20050241951A1 (en) * 2004-04-30 2005-11-03 Kenneth Crouse Selective catalytic activation of non-conductive substrates
GB0413076D0 (en) 2004-06-11 2004-07-14 Medtronic Inc Deep brain stimulation of the Zona incerta
WO2010122918A1 (fr) * 2009-04-24 2010-10-28 住友電気工業株式会社 Substrat pour carte imprimée, carte imprimée, et procédés de fabrication de celle-ci
EP2740818B1 (fr) * 2012-12-05 2016-03-30 ATOTECH Deutschland GmbH Procédé de fabrication de surfaces pouvant être collées et soudées sur des électrodes en métal noble
JP6484218B2 (ja) 2014-03-20 2019-03-13 住友電気工業株式会社 プリント配線板用基板及びプリント配線板
US10237976B2 (en) 2014-03-27 2019-03-19 Sumitomo Electric Industries, Ltd. Substrate for printed circuit board, printed circuit board, and method for producing substrate for printed circuit board
US10076028B2 (en) 2015-01-22 2018-09-11 Sumitomo Electric Industries, Ltd. Substrate for printed circuit board, printed circuit board, and method for producing printed circuit board
CN105405490A (zh) * 2015-12-23 2016-03-16 东洋油墨Sc控股株式会社 激光加工用导电性糊、导电性片材、信号布线的制造方法及电子设备
EP3530706B1 (fr) 2018-02-27 2022-12-07 Fundación I + D Automoción y Mecatrónica Procédé de production d'une encre conductrice pour impression offset et encre conductrice ainsi produite

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3226256A (en) 1963-01-02 1965-12-28 Jr Frederick W Schneble Method of making printed circuits
DE2728465C2 (de) 1977-06-24 1982-04-22 Preh, Elektrofeinmechanische Werke, Jakob Preh, Nachf. Gmbh & Co, 8740 Bad Neustadt Gedruckte Schaltung
CA1326720C (fr) 1987-12-31 1994-02-01 Michael John Modic Melanges de polymeres thermoplastiques polaires et de copolymeres sequences modifies, resistant aux chocs
US5158645A (en) 1991-09-03 1992-10-27 International Business Machines, Inc. Method of external circuitization of a circuit panel
US5509557A (en) * 1994-01-24 1996-04-23 International Business Machines Corporation Depositing a conductive metal onto a substrate
EP0910935A1 (fr) * 1996-06-12 1999-04-28 Brunel University Circuit electrique

Also Published As

Publication number Publication date
AU1574600A (en) 2000-06-19
AU762686B2 (en) 2003-07-03
WO2000033625A1 (fr) 2000-06-08
CN1335045A (zh) 2002-02-06
CN1242659C (zh) 2006-02-15
IL143440A0 (en) 2002-04-21
EP1142456A1 (fr) 2001-10-10
HK1042627A1 (zh) 2002-08-16
JP2002531961A (ja) 2002-09-24

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Legal Events

Date Code Title Description
EEER Examination request
FZDE Discontinued