CA2093815A1 - Methode et dispositif de telechargement d'instructions executables par un controleur peripherique - Google Patents

Methode et dispositif de telechargement d'instructions executables par un controleur peripherique

Info

Publication number
CA2093815A1
CA2093815A1 CA2093815A CA2093815A CA2093815A1 CA 2093815 A1 CA2093815 A1 CA 2093815A1 CA 2093815 A CA2093815 A CA 2093815A CA 2093815 A CA2093815 A CA 2093815A CA 2093815 A1 CA2093815 A1 CA 2093815A1
Authority
CA
Canada
Prior art keywords
peripheral controller
instructions
execution
loaded instructions
providing down
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2093815A
Other languages
English (en)
Other versions
CA2093815C (fr
Inventor
Charles F. Raasch
Jason S. M. Kim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Charles F. Raasch
Jason S. M. Kim
Ast Research, Inc.
Ari Service, Inc.
Samsung Electronics America, Inc.
Samsung Electronics Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Charles F. Raasch, Jason S. M. Kim, Ast Research, Inc., Ari Service, Inc., Samsung Electronics America, Inc., Samsung Electronics Co., Ltd. filed Critical Charles F. Raasch
Publication of CA2093815A1 publication Critical patent/CA2093815A1/fr
Application granted granted Critical
Publication of CA2093815C publication Critical patent/CA2093815C/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G06F13/126—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine and has means for transferring I/O instructions and statuses between control unit and main processor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/105—Program control for peripheral devices where the programme performs an input/output emulation function
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/177—Initialisation or configuration control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/60—Software deployment
    • G06F8/65—Updates
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Security & Cryptography (AREA)
  • Bus Control (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

Un procédé et un appareil servant à télécharger des instructions et d'autres informations vers un régisseur de périphérique (103) utilisé dans un ordinateur (102) compatible ISA (Industry Standard Architecture), utilisent un système permettant de télécharger des instructions à partir de l'ordinateur compatible ISA (102) vers une mémoire vive (109) accessible au régisseur de périphérique (103). Le régisseur de périphérique (103) exécute ensuite ces instructions afin d'émuler les fonctions de circuits intégrés des séries INTEL 8042 et 8742 classiques. Le régisseur de périphérique (103) présente aussi d'autres fonctions non comprises dans les 8042 ou 8742 classiques lorsqu'il exécute d'autres instructions téléchargées se trouvant dans la mémoire vive.
CA002093815A 1990-11-09 1991-11-08 Methode et dispositif de telechargement d'instructions executables par un controleur peripherique Expired - Fee Related CA2093815C (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US612,425 1990-11-09
US07/612,425 US5261114A (en) 1990-11-09 1990-11-09 Method and apparatus for providing down-loaded instructions for execution by a peripheral controller
PCT/US1991/008361 WO1992009033A1 (fr) 1990-11-09 1991-11-08 Procede et appareil servant a fournir des instructions telechargees destinees a etre executees par un regisseur de peripherique

Publications (2)

Publication Number Publication Date
CA2093815A1 true CA2093815A1 (fr) 1992-05-10
CA2093815C CA2093815C (fr) 1999-06-15

Family

ID=24453103

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002093815A Expired - Fee Related CA2093815C (fr) 1990-11-09 1991-11-08 Methode et dispositif de telechargement d'instructions executables par un controleur peripherique

Country Status (7)

Country Link
US (2) US5261114A (fr)
EP (1) EP0556314B1 (fr)
AU (1) AU9051291A (fr)
CA (1) CA2093815C (fr)
DE (1) DE69130067D1 (fr)
SG (1) SG44537A1 (fr)
WO (1) WO1992009033A1 (fr)

Families Citing this family (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5280283A (en) * 1990-11-09 1994-01-18 Ast Research, Inc. Memory mapped keyboard controller
JPH05189574A (ja) * 1991-07-23 1993-07-30 Internatl Business Mach Corp <Ibm> レンダリング構成要素における複数コマンド支援を行うための方法およびその装置
US5613135A (en) * 1992-09-17 1997-03-18 Kabushiki Kaisha Toshiba Portable computer having dedicated register group and peripheral controller bus between system bus and peripheral controller
US5748981A (en) * 1992-10-20 1998-05-05 National Semiconductor Corporation Microcontroller with in-circuit user programmable microcode
US5561772A (en) * 1993-02-10 1996-10-01 Elonex Technologies, Inc. Expansion bus system for replicating an internal bus as an external bus with logical interrupts replacing physical interrupt lines
US5509139A (en) * 1993-03-22 1996-04-16 Compaq Computer Corp. Circuit for disabling an address masking control signal using OR gate when a microprocessor is in a system management mode
US5553311A (en) * 1994-02-17 1996-09-03 Image Telecommunications Inc. Customer premise device for controlling data transmissions by storing a limited number of operation algorithms and receiving operation instructions from external sources
DE4406835A1 (de) * 1994-03-02 1995-09-14 Siemens Ag Elektronisches Gerät
US5604888A (en) * 1994-04-07 1997-02-18 Zycad Corporation Emulation system employing motherboard and flexible daughterboards
US5862401A (en) * 1994-10-11 1999-01-19 Crown International, Inc. Programmable central intelligence controller and distributed intelligence network for analog/digital control systems
US5574943A (en) * 1994-12-09 1996-11-12 Ast Research, Inc. Gate-A20 and CPU reset circuit for mircroprocessor-based computer system
US5754863A (en) * 1995-01-20 1998-05-19 Redcom Laboratories, Inc. System for downloading program code to a microprocessor operative as a slave to a master microprocessor
JPH08249136A (ja) * 1995-03-10 1996-09-27 Sony Corp 記録再生装置及び伝送方法
US5729683A (en) * 1995-05-18 1998-03-17 Compaq Computer Corporation Programming memory devices through the parallel port of a computer system
WO1997009673A1 (fr) * 1995-09-07 1997-03-13 Metricom, Inc. Transfert de code a un ordinateur sans acceder a une ram
US5664194A (en) * 1995-12-04 1997-09-02 Metricom, Inc. Method for autonomously transferring code to a computer without accessing local memory by the central processing unit
US5819063A (en) * 1995-09-11 1998-10-06 International Business Machines Corporation Method and data processing system for emulating a program
US5857116A (en) * 1995-10-27 1999-01-05 Compaq Computer Corporation Circuit for disabling an address masking control signal when a microprocessor is in a system management mode
US5905779A (en) * 1996-03-06 1999-05-18 Rockwell Science Center Automatic dial-up software update system
KR100198382B1 (ko) * 1996-05-07 1999-06-15 윤종용 멀티-부팅 기능을 갖는 컴퓨터 장치
US5812857A (en) * 1996-08-28 1998-09-22 Extended Systems, Inc. Field configurable embedded computer system
TW386215B (en) * 1997-03-24 2000-04-01 Seiko Epson Corp Emulation system and information processor
US6044461A (en) * 1997-09-16 2000-03-28 International Business Machines Corporation Computer system and method of selectively rebooting the same in response to a system program code update
JPH11259284A (ja) * 1998-03-12 1999-09-24 Fujitsu Ltd オンラインプログラム更新システム及びプログラム更新用プログラムを記録したコンピュータ読み取り可能な記録媒体
US7545816B1 (en) * 1998-04-29 2009-06-09 Ncr Corporation Transaction processing systems maintenance
EP0953946A3 (fr) * 1998-04-29 2004-05-06 Ncr International Inc. Réseaux de transactions
US6145020A (en) * 1998-05-14 2000-11-07 Advanced Technology Materials, Inc. Microcontroller incorporating an enhanced peripheral controller for automatic updating the configuration date of multiple peripherals by using a ferroelectric memory array
US6178468B1 (en) * 1998-06-19 2001-01-23 Hewlett-Packard Company Real time supply PF plug-and-play installation resources
US6256714B1 (en) 1998-09-02 2001-07-03 Sharp Laboratories Of America, Inc. Computer system with efficient memory usage for managing multiple application programs
US6360364B1 (en) * 1999-03-17 2002-03-19 Microsoft Corporation System and method for installing an application on a portable computer
US6507881B1 (en) * 1999-06-10 2003-01-14 Mediatek Inc. Method and system for programming a peripheral flash memory via an IDE bus
JP2001350625A (ja) * 2000-06-08 2001-12-21 Sanyo Electric Co Ltd 制御装置及びデータ処理システム
US7149888B1 (en) * 2000-09-29 2006-12-12 Intel Corporation Method and apparatus for booting the operating environment of an autonomous subsystem in a computer based system without involvement of the main operating system
US7051093B1 (en) 2001-01-24 2006-05-23 Lockheed Martin Corporation QNX operation system network auto configuration
US9170812B2 (en) * 2002-03-21 2015-10-27 Pact Xpp Technologies Ag Data processing system having integrated pipelined array data processor
US20030200353A1 (en) * 2002-04-19 2003-10-23 Vikas Dogra Browser-implemented upload/download of a driver
US7707351B2 (en) * 2002-10-31 2010-04-27 Ring Technology Enterprises Of Texas, Llc Methods and systems for an identifier-based memory section
US6879526B2 (en) * 2002-10-31 2005-04-12 Ring Technology Enterprises Llc Methods and apparatus for improved memory access
US7197662B2 (en) * 2002-10-31 2007-03-27 Ring Technology Enterprises, Llc Methods and systems for a storage system
US7415565B2 (en) 2002-10-31 2008-08-19 Ring Technology Enterprises, Llc Methods and systems for a storage system with a program-controlled switch for routing data
TW200636471A (en) * 2005-04-01 2006-10-16 Mediatek Inc Method of parallel programmable memory and the system thereof
US7761864B2 (en) * 2005-08-09 2010-07-20 Intermec Ip Corp. Method, apparatus and article to load new instructions on processor based devices, for example, automatic data collection devices
JP2007213292A (ja) * 2006-02-09 2007-08-23 Nec Electronics Corp マルチプロセッサシステム及びスレーブシステムの起動方法
US9703546B1 (en) * 2015-12-21 2017-07-11 Schneider Electric Software, Llc Monitoring application states for deployment during runtime operations

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4679166A (en) * 1983-01-17 1987-07-07 Tandy Corporation Co-processor combination
US4590556A (en) * 1983-01-17 1986-05-20 Tandy Corporation Co-processor combination
JPS608972A (ja) * 1983-06-29 1985-01-17 Fujitsu Ltd マルチプロセツサシステム
US4703420A (en) * 1985-02-28 1987-10-27 International Business Machines Corporation System for arbitrating use of I/O bus by co-processor and higher priority I/O units in which co-processor automatically request bus access in anticipation of need
DE3639571A1 (de) * 1986-11-20 1988-06-01 Standard Elektrik Lorenz Ag Verfahren und schaltungsanordnung zum urladen eines zweitrechners
US5155833A (en) * 1987-05-11 1992-10-13 At&T Bell Laboratories Multi-purpose cache memory selectively addressable either as a boot memory or as a cache memory
US4945473A (en) * 1987-05-15 1990-07-31 Bull Hn Information Systems Inc. Communications controller interface
US4888680A (en) * 1987-10-14 1989-12-19 Little Blue Limited Partnership Peripheral device interface and controller
JPH03136143A (ja) * 1989-10-23 1991-06-10 Nec Corp インサーキットエミュレータ

Also Published As

Publication number Publication date
US5261114A (en) 1993-11-09
EP0556314A1 (fr) 1993-08-25
CA2093815C (fr) 1999-06-15
EP0556314A4 (en) 1993-09-29
DE69130067D1 (de) 1998-10-01
EP0556314B1 (fr) 1998-08-26
US5408624A (en) 1995-04-18
SG44537A1 (en) 1997-12-19
WO1992009033A1 (fr) 1992-05-29
AU9051291A (en) 1992-06-11

Similar Documents

Publication Publication Date Title
CA2093815A1 (fr) Methode et dispositif de telechargement d&#39;instructions executables par un controleur peripherique
CA2061182A1 (fr) Processeur a controleur programmable dote d&#39;une carte de fonctions amovible
TW287253B (en) Method and apparatus for improved graphics/image processing
CA2093451A1 (fr) Methode et mecanisme d&#39;appel de fonctions a 32 bits a partir de fonctions 16 bits
EP0386935A3 (fr) Appareil capable de varier le nombre d&#39;états d&#39;attente pour accès
EP0640914A3 (fr) Méthode et dispositif pour la configuration de programmes d&#39;ordinateur par sous-programmes disponibles.
AU5218693A (en) System, apparatus and method for generating large jackpots on live card game tables
EP0592098A3 (fr) Méthode et appareil de commande pour l&#39;exécution directe d&#39;un programme sur un appareil externe utilisant une mémoire à accès aléatoire et réinscriptible.
CA2275766A1 (fr) Appareil et procede de reduction de la tension de la paroi du coeur
CA2284250A1 (fr) Procede informatique pour mettre en application une directive pour trouver
EP0727067A4 (fr) Appareil d&#39;acceleration du traitement des transactions sur des bases de donnees informatiques
DE2965636D1 (en) Data processing system having an integrated stack and register machine architecture
NO893042L (no) Billedbehandlingssystem for besiktigelse av en gjenstand under utproevning.
AU5928094A (en) Process and equipment for tamper-proof operation of games machines with chip cards
CA2207957A1 (fr) Procede et dispositif de traitement d&#39;une table
AU6386999A (en) Apparatus and method for emulating an i/o instruction for the correct processor and for servicing software smi&#39;s in multi-processor environment
CA2146243A1 (fr) Systeme d&#39;analyse generale
CA2193465A1 (fr) Appareil et methode de mise au point de programmes de jeu enregistres sur cartouche rom
EP0637802A3 (fr) Méthode et appareil de vecteurs d&#39;interruption.
EP0410502A3 (en) Method and apparatus for emulating interaction between application specific integrated circuit (asic) under development and target system
EP0706089A3 (fr) Procédé de synthèse d&#39;un ester de quinone-diazide
AU6142090A (en) Process for developing selected positive photoresists
EP0299075A4 (fr) Unite de traitement possedant au moins un coprocesseur.
CA2126120A1 (fr) Systeme de traitement d&#39;informations et sa methode de fonctionnement
ES2110344A1 (es) Procedimiento para eliminar el desequilibrio existente en un rotor.

Legal Events

Date Code Title Description
EEER Examination request
MKLA Lapsed