CA2054459A1 - Appareil pour accroitre le nombre des registres disponibles dans un processeur d'ordinateur - Google Patents

Appareil pour accroitre le nombre des registres disponibles dans un processeur d'ordinateur

Info

Publication number
CA2054459A1
CA2054459A1 CA2054459A CA2054459A CA2054459A1 CA 2054459 A1 CA2054459 A1 CA 2054459A1 CA 2054459 A CA2054459 A CA 2054459A CA 2054459 A CA2054459 A CA 2054459A CA 2054459 A1 CA2054459 A1 CA 2054459A1
Authority
CA
Canada
Prior art keywords
registers
numbers
storing
single precision
addressable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2054459A
Other languages
English (en)
Other versions
CA2054459C (fr
Inventor
Robert Cmelik
Shing Kong
Edmund Kelly
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Robert Cmelik
Shing Kong
Edmund Kelly
Sun Microsystems, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Cmelik, Shing Kong, Edmund Kelly, Sun Microsystems, Inc. filed Critical Robert Cmelik
Publication of CA2054459A1 publication Critical patent/CA2054459A1/fr
Application granted granted Critical
Publication of CA2054459C publication Critical patent/CA2054459C/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G06F9/30014—Arithmetic instructions with variable precision
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30112—Register structure comprising data of variable length
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30138—Extension of register space, e.g. register cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/342—Extension of operand address space

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Telephone Function (AREA)
  • Multi Processors (AREA)
CA002054459A 1990-10-29 1991-10-29 Appareil pour accroitre le nombre des registres disponibles dans un processeur d'ordinateur Expired - Fee Related CA2054459C (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US60555690A 1990-10-29 1990-10-29
US605,556 1990-10-29

Publications (2)

Publication Number Publication Date
CA2054459A1 true CA2054459A1 (fr) 1992-04-30
CA2054459C CA2054459C (fr) 1998-04-28

Family

ID=24424162

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002054459A Expired - Fee Related CA2054459C (fr) 1990-10-29 1991-10-29 Appareil pour accroitre le nombre des registres disponibles dans un processeur d'ordinateur

Country Status (5)

Country Link
EP (1) EP0483967A3 (fr)
JP (1) JPH06103062A (fr)
KR (1) KR960001943B1 (fr)
CA (1) CA2054459C (fr)
TW (1) TW315957U (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113808000A (zh) * 2021-11-19 2021-12-17 北京壁仞科技开发有限公司 数据管理装置及数据管理方法

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5771368A (en) * 1990-10-29 1998-06-23 Sun Microsystems, Inc. Memory addressing scheme for increasing the number of memory locations available in a computer for storing higher precision numbers
DE4208459A1 (de) * 1992-03-17 1993-09-23 Philips Patentverwaltung Schaltungsanordnung zur verarbeitung von eingabe/ausgabedaten
EP0640912B1 (fr) * 1993-08-31 2000-05-10 Sun Microsystems, Inc. Schéma d'adressage de mémoire pour augmenter le nombre de positions de mémoire dans un calculateur pour l'emmagasinage de nombres à précision double
US6643765B1 (en) 1995-08-16 2003-11-04 Microunity Systems Engineering, Inc. Programmable processor with group floating point operations
US5632514A (en) * 1996-03-26 1997-05-27 Johnson, Jr.; Marvin B. Juvenile safety gate latch for swing gate
US5901316A (en) * 1996-07-01 1999-05-04 Sun Microsystems, Inc. Float register spill cache method, system, and computer program product
US5854939A (en) * 1996-11-07 1998-12-29 Atmel Corporation Eight-bit microcontroller having a risc architecture
EP0942357A3 (fr) 1998-03-11 2000-03-22 Matsushita Electric Industrial Co., Ltd. Microprocesseur compatible avec une pluralité de formats d'instructions
US6170001B1 (en) * 1998-05-27 2001-01-02 Arm Limited System for transfering format data from format register to memory wherein format data indicating the distribution of single or double precision data type in the register bank
US7117342B2 (en) * 1998-12-03 2006-10-03 Sun Microsystems, Inc. Implicitly derived register specifiers in a processor
US7114056B2 (en) 1998-12-03 2006-09-26 Sun Microsystems, Inc. Local and global register partitioning in a VLIW processor
GB2363869B (en) * 2000-06-20 2004-06-23 Element 14 Inc Register addressing
JP5481793B2 (ja) * 2008-03-21 2014-04-23 富士通株式会社 演算処理装置および同装置の制御方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58142464A (ja) * 1982-02-19 1983-08-24 Hitachi Ltd マイクロプロセツサ

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113808000A (zh) * 2021-11-19 2021-12-17 北京壁仞科技开发有限公司 数据管理装置及数据管理方法

Also Published As

Publication number Publication date
EP0483967A3 (en) 1993-07-21
EP0483967A2 (fr) 1992-05-06
KR960001943B1 (ko) 1996-02-08
JPH06103062A (ja) 1994-04-15
KR920008596A (ko) 1992-05-28
CA2054459C (fr) 1998-04-28
TW315957U (en) 1997-09-11

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Legal Events

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EEER Examination request
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