JPS6446879A - Data storing system for image memory - Google Patents

Data storing system for image memory

Info

Publication number
JPS6446879A
JPS6446879A JP62203183A JP20318387A JPS6446879A JP S6446879 A JPS6446879 A JP S6446879A JP 62203183 A JP62203183 A JP 62203183A JP 20318387 A JP20318387 A JP 20318387A JP S6446879 A JPS6446879 A JP S6446879A
Authority
JP
Japan
Prior art keywords
planes
memory
image data
image
stored
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62203183A
Other languages
Japanese (ja)
Inventor
Tatsuhiko Hori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP62203183A priority Critical patent/JPS6446879A/en
Publication of JPS6446879A publication Critical patent/JPS6446879A/en
Pending legal-status Critical Current

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  • Image Input (AREA)

Abstract

PURPOSE:To improve the availability of an image memory by dividing this memory into a planes in the same number as the maximum bits needed for expression of a single image element and using all or partial planes via a continuous address common to those planes and in response to the number of bits to store image data. CONSTITUTION:An image memory M is divided into planes M0-M3. For image data #0 and #2 on four planes of a figure (b), the data on the four planes of the relevant numbers are stored in an area including addresses An, An-3, An-4...A0 of the highest bit An equal to 1 respectively. For image data #1 and #3 on a single plane of a figure (a), the data on the single plane is stored in an area including addresses An, An-1...A0 of the most significant bit An equal to 0 respectively. In such a way, those image data #0, #1... are distributed to the addresses of a continuous memory space common to the planes M0-M3 and stored there. As a result, the memory availability is improved.
JP62203183A 1987-08-17 1987-08-17 Data storing system for image memory Pending JPS6446879A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62203183A JPS6446879A (en) 1987-08-17 1987-08-17 Data storing system for image memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62203183A JPS6446879A (en) 1987-08-17 1987-08-17 Data storing system for image memory

Publications (1)

Publication Number Publication Date
JPS6446879A true JPS6446879A (en) 1989-02-21

Family

ID=16469835

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62203183A Pending JPS6446879A (en) 1987-08-17 1987-08-17 Data storing system for image memory

Country Status (1)

Country Link
JP (1) JPS6446879A (en)

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