DE69424355T2 - Speicheradressierungsschema zur Erhöhung der Anzahl von Speicherplätzen in einem Rechner zur Speicherung von Doppelgenauigkeitszahlen - Google Patents

Speicheradressierungsschema zur Erhöhung der Anzahl von Speicherplätzen in einem Rechner zur Speicherung von Doppelgenauigkeitszahlen

Info

Publication number
DE69424355T2
DE69424355T2 DE69424355T DE69424355T DE69424355T2 DE 69424355 T2 DE69424355 T2 DE 69424355T2 DE 69424355 T DE69424355 T DE 69424355T DE 69424355 T DE69424355 T DE 69424355T DE 69424355 T2 DE69424355 T2 DE 69424355T2
Authority
DE
Germany
Prior art keywords
memory
increasing
computer
addressing scheme
precision numbers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69424355T
Other languages
English (en)
Other versions
DE69424355D1 (de
Inventor
Robert Cmelik
Shing Kong
Edmund Kelly
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of DE69424355D1 publication Critical patent/DE69424355D1/de
Application granted granted Critical
Publication of DE69424355T2 publication Critical patent/DE69424355T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G06F9/30014—Arithmetic instructions with variable precision
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30109—Register structure having multiple operands in a single register
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30112—Register structure comprising data of variable length
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30138—Extension of register space, e.g. register cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/342—Extension of operand address space
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
DE69424355T 1993-08-31 1994-08-30 Speicheradressierungsschema zur Erhöhung der Anzahl von Speicherplätzen in einem Rechner zur Speicherung von Doppelgenauigkeitszahlen Expired - Fee Related DE69424355T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11446693A 1993-08-31 1993-08-31

Publications (2)

Publication Number Publication Date
DE69424355D1 DE69424355D1 (de) 2000-06-15
DE69424355T2 true DE69424355T2 (de) 2001-02-15

Family

ID=22355385

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69424355T Expired - Fee Related DE69424355T2 (de) 1993-08-31 1994-08-30 Speicheradressierungsschema zur Erhöhung der Anzahl von Speicherplätzen in einem Rechner zur Speicherung von Doppelgenauigkeitszahlen

Country Status (4)

Country Link
EP (1) EP0640912B1 (de)
JP (1) JP3575496B2 (de)
KR (1) KR100301224B1 (de)
DE (1) DE69424355T2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5778247A (en) * 1996-03-06 1998-07-07 Sun Microsystems, Inc. Multi-pipeline microprocessor with data precision mode indicator
US5632514A (en) * 1996-03-26 1997-05-27 Johnson, Jr.; Marvin B. Juvenile safety gate latch for swing gate
US6055619A (en) * 1997-02-07 2000-04-25 Cirrus Logic, Inc. Circuits, system, and methods for processing multiple data streams
JP3779540B2 (ja) 2000-11-08 2006-05-31 株式会社ルネサステクノロジ 複数レジスタ指定が可能なｓｉｍｄ演算方式
GB2409062C (en) * 2003-12-09 2007-12-11 Advanced Risc Mach Ltd Aliasing data processing registers
US8898436B2 (en) 2009-04-20 2014-11-25 Oracle America, Inc. Method and structure for solving the evil-twin problem

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1567705A (de) * 1967-06-09 1969-04-08
FR2428871A1 (fr) * 1978-06-15 1980-01-11 Philips Data Syst Extension de l'espace d'adressage direct dans un systeme d'ordinateur
EP0483967A3 (en) * 1990-10-29 1993-07-21 Sun Microsystems, Inc. Apparatus for increasing the number of registers available in a computer processor

Also Published As

Publication number Publication date
EP0640912A1 (de) 1995-03-01
DE69424355D1 (de) 2000-06-15
JPH07152535A (ja) 1995-06-16
KR950006603A (ko) 1995-03-21
KR100301224B1 (ko) 2001-10-22
JP3575496B2 (ja) 2004-10-13
EP0640912B1 (de) 2000-05-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee