CA2051029A1 - Arbitrage de bus de transmission de paquets commutes, y compris les bus de multiprocesseurs a memoire commune - Google Patents

Arbitrage de bus de transmission de paquets commutes, y compris les bus de multiprocesseurs a memoire commune

Info

Publication number
CA2051029A1
CA2051029A1 CA2051029A CA2051029A CA2051029A1 CA 2051029 A1 CA2051029 A1 CA 2051029A1 CA 2051029 A CA2051029 A CA 2051029A CA 2051029 A CA2051029 A CA 2051029A CA 2051029 A1 CA2051029 A1 CA 2051029A1
Authority
CA
Canada
Prior art keywords
busses
shared memory
arbitration
packet switched
arbiter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2051029A
Other languages
English (en)
Other versions
CA2051029C (fr
Inventor
Pradeep S. Sindhu
Jean-Marc Frailong
Jean A. Gastinel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xerox Corp
Original Assignee
Xerox Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xerox Corp filed Critical Xerox Corp
Publication of CA2051029A1 publication Critical patent/CA2051029A1/fr
Application granted granted Critical
Publication of CA2051029C publication Critical patent/CA2051029C/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Multi Processors (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
CA002051029A 1990-11-30 1991-09-10 Arbitrage de bus de transmission de paquets commutes, y compris les bus de multiprocesseurs a memoire commune Expired - Lifetime CA2051029C (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US62112390A 1990-11-30 1990-11-30
US621123 1990-11-30

Publications (2)

Publication Number Publication Date
CA2051029A1 true CA2051029A1 (fr) 1992-05-31
CA2051029C CA2051029C (fr) 1996-11-05

Family

ID=24488825

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002051029A Expired - Lifetime CA2051029C (fr) 1990-11-30 1991-09-10 Arbitrage de bus de transmission de paquets commutes, y compris les bus de multiprocesseurs a memoire commune

Country Status (5)

Country Link
US (1) US5440698A (fr)
EP (1) EP0488771B1 (fr)
JP (1) JPH0810446B2 (fr)
CA (1) CA2051029C (fr)
DE (1) DE69130106T2 (fr)

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Also Published As

Publication number Publication date
DE69130106T2 (de) 1999-03-04
US5440698A (en) 1995-08-08
JPH04333955A (ja) 1992-11-20
EP0488771B1 (fr) 1998-09-02
CA2051029C (fr) 1996-11-05
EP0488771A3 (en) 1992-07-15
JPH0810446B2 (ja) 1996-01-31
EP0488771A2 (fr) 1992-06-03
DE69130106D1 (de) 1998-10-08

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