CA1245772A - Logical arrangement for controlling use of different system displays by main processor and co-processor - Google Patents

Logical arrangement for controlling use of different system displays by main processor and co-processor

Info

Publication number
CA1245772A
CA1245772A CA000496977A CA496977A CA1245772A CA 1245772 A CA1245772 A CA 1245772A CA 000496977 A CA000496977 A CA 000496977A CA 496977 A CA496977 A CA 496977A CA 1245772 A CA1245772 A CA 1245772A
Authority
CA
Canada
Prior art keywords
data
processor
display
main processor
buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000496977A
Other languages
English (en)
French (fr)
Inventor
Patrick A. Buckland
Jack E. Reeder
John W. Irwin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of CA1245772A publication Critical patent/CA1245772A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/22—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of characters or indicia using display control signals derived from coded signals representing the characters or indicia, e.g. with a character-code memory
    • G09G5/222—Control of the character-code memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/153—Digital output to display device ; Cooperation and interconnection of the display device with other functional units using cathode-ray tubes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/04—Display device controller operating with a plurality of display units

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Digital Computer Display Output (AREA)
  • Controls And Circuits For Display Device (AREA)
CA000496977A 1985-02-28 1985-12-05 Logical arrangement for controlling use of different system displays by main processor and co-processor Expired CA1245772A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US70680385A 1985-02-28 1985-02-28
US706,803 1985-02-28

Publications (1)

Publication Number Publication Date
CA1245772A true CA1245772A (en) 1988-11-29

Family

ID=24839105

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000496977A Expired CA1245772A (en) 1985-02-28 1985-12-05 Logical arrangement for controlling use of different system displays by main processor and co-processor

Country Status (5)

Country Link
EP (1) EP0196400B1 (cg-RX-API-DMAC7.html)
JP (1) JPS61198331A (cg-RX-API-DMAC7.html)
BR (1) BR8600666A (cg-RX-API-DMAC7.html)
CA (1) CA1245772A (cg-RX-API-DMAC7.html)
DE (1) DE3688655T2 (cg-RX-API-DMAC7.html)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5148516A (en) * 1988-08-30 1992-09-15 Hewlett-Packard Company Efficient computer terminal system utilizing a single slave processor
US5305436A (en) * 1990-04-02 1994-04-19 Hewlett-Packard Company Hose bus video interface in personal computers

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4117469A (en) * 1976-12-20 1978-09-26 Levine Michael R Computer assisted display processor having memory sharing by the computer and the processor
US4119953A (en) * 1977-01-24 1978-10-10 Mohawk Data Sciences Corp. Timesharing programmable display system
JPS55103634A (en) * 1979-02-01 1980-08-08 Toshiba Corp Display unit
FR2490372A1 (fr) * 1980-09-15 1982-03-19 Assigraph Sa Concentrateur multiplexeur intelligent pour postes de travail graphique
JPS57117044A (en) * 1981-01-02 1982-07-21 Gaabaa Shisutemusu Tekunorojii Data controller for interactive graphic system
JPS6116642U (ja) * 1984-06-30 1986-01-30 外伸 篠田 コンピユ−タ−・システム

Also Published As

Publication number Publication date
DE3688655D1 (de) 1993-08-12
EP0196400A2 (en) 1986-10-08
BR8600666A (pt) 1986-11-04
JPS61198331A (ja) 1986-09-02
DE3688655T2 (de) 1994-01-20
EP0196400A3 (en) 1990-09-05
JPH04298B2 (cg-RX-API-DMAC7.html) 1992-01-07
EP0196400B1 (en) 1993-07-07

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