CA1199734A - Process and apparatus for the exchange of data between processing modules and at least one common memory in a data processing system - Google Patents

Process and apparatus for the exchange of data between processing modules and at least one common memory in a data processing system

Info

Publication number
CA1199734A
CA1199734A CA000418356A CA418356A CA1199734A CA 1199734 A CA1199734 A CA 1199734A CA 000418356 A CA000418356 A CA 000418356A CA 418356 A CA418356 A CA 418356A CA 1199734 A CA1199734 A CA 1199734A
Authority
CA
Canada
Prior art keywords
bus
modules
signals
data
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000418356A
Other languages
English (en)
French (fr)
Inventor
Ulrich Finger
Pierre Ligneres
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Application granted granted Critical
Publication of CA1199734A publication Critical patent/CA1199734A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/374—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a self-select method with individual priority code comparator

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)
CA000418356A 1981-12-30 1982-12-22 Process and apparatus for the exchange of data between processing modules and at least one common memory in a data processing system Expired CA1199734A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR8124506 1981-12-30
FR8124506A FR2519165B1 (fr) 1981-12-30 1981-12-30 Procede d'echange de donnees entre des modules de traitement et une memoire commune dans un systeme de traitement de donnees et dispositif pour la mise en oeuvre de ce procede

Publications (1)

Publication Number Publication Date
CA1199734A true CA1199734A (en) 1986-01-21

Family

ID=9265529

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000418356A Expired CA1199734A (en) 1981-12-30 1982-12-22 Process and apparatus for the exchange of data between processing modules and at least one common memory in a data processing system

Country Status (6)

Country Link
EP (1) EP0083283B1 (sv)
JP (1) JPS58119066A (sv)
CA (1) CA1199734A (sv)
DE (1) DE3271220D1 (sv)
FI (1) FI77125C (sv)
FR (1) FR2519165B1 (sv)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3235739C2 (de) * 1982-09-27 1984-07-12 Nixdorf Computer Ag, 4790 Paderborn Verfahren zur Vorbereitung der Anschaltung einer von mehreren datenverarbeitenden Einrichtungen an eine zentral taktgesteuerte Mehrfach-Leitungsanordnung

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5427741A (en) * 1977-08-03 1979-03-02 Toshiba Corp Information processing organization
US4290102A (en) * 1977-10-25 1981-09-15 Digital Equipment Corporation Data processing system with read operation splitting
JPS5679353A (en) * 1979-11-30 1981-06-29 Hitachi Ltd Memory bus data transfer method of multiprocessor
NL8002344A (nl) * 1980-04-23 1981-11-16 Philips Nv Multiprocessor systeem met gemeenschappelijke data/adres-bus.

Also Published As

Publication number Publication date
EP0083283A3 (en) 1983-08-03
FR2519165B1 (fr) 1987-01-16
EP0083283B1 (fr) 1986-05-14
FI824508A0 (fi) 1982-12-29
DE3271220D1 (en) 1986-06-19
FI824508L (fi) 1983-07-01
FI77125C (sv) 1989-01-10
JPS58119066A (ja) 1983-07-15
EP0083283A2 (fr) 1983-07-06
FI77125B (fi) 1988-09-30
FR2519165A1 (fr) 1983-07-01

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Legal Events

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