CA1179406A - Protection circuit for integrated circuit devices - Google Patents
Protection circuit for integrated circuit devicesInfo
- Publication number
- CA1179406A CA1179406A CA000395261A CA395261A CA1179406A CA 1179406 A CA1179406 A CA 1179406A CA 000395261 A CA000395261 A CA 000395261A CA 395261 A CA395261 A CA 395261A CA 1179406 A CA1179406 A CA 1179406A
- Authority
- CA
- Canada
- Prior art keywords
- semiconductor
- protection circuit
- transistor
- semiconductor region
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 4
- 239000010703 silicon Substances 0.000 claims abstract description 4
- 239000004065 semiconductor Substances 0.000 claims description 59
- 239000000758 substrate Substances 0.000 claims description 13
- 239000000463 material Substances 0.000 claims 3
- 230000001052 transient effect Effects 0.000 abstract description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 5
- 239000004020 conductor Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 230000015556 catabolic process Effects 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 239000002210 silicon-based material Substances 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 244000145841 kine Species 0.000 description 1
- 230000002045 lasting effect Effects 0.000 description 1
- 230000001172 regenerating effect Effects 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- XUIMIQQOPSSXEZ-NJFSPNSNSA-N silicon-30 atom Chemical compound [30Si] XUIMIQQOPSSXEZ-NJFSPNSNSA-N 0.000 description 1
- 230000005236 sound signal Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
- H01L27/0744—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common without components of the field effect type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K17/081—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
- H03K17/0814—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the output circuit
- H03K17/08146—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the output circuit in bipolar transistor switches
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Bipolar Integrated Circuits (AREA)
- Emergency Protection Circuit Devices (AREA)
Abstract
RCA 76,431/76,431 PROTECTION CIRCUIT FOR INTEGRATED CIRCUIT DEVICES
ABSTRACT OF THE DISCLOSURE
Disclosed is a protection circuit which may be used, for example, in a television receiver to protect circuitry inside an integrated circuit from damage due to high-voltage transients. The protection circuit comprises a PNPN structure forming a silicon control rectifier (SCR) and a resistive element integral to the SCR structure. In one embodiment the resistive element is a linear resistor and in another embodiment is a non-linear resistive element in the form of a diode-connected transistor. The SCR and the resistive element are arranged to form a two-terminal, high-current protection circuit which is rendered conductive when the potential difference across the two terminals is greater than one forward-biased PN junction voltage drop.
One terminal of the protection circuit is connected to an input or output terminal of the protected circuit, and the other terminal is connected to the most positive power supply potential. Transient voltages appearing at the integrated circuit terminal greater than one PN junction voltage drop above the positive power supply potential cause the protection circuit to conduct current, thereby dissipating the energy of the high-voltage transient and protecting the integrated circuit from damage.
ABSTRACT OF THE DISCLOSURE
Disclosed is a protection circuit which may be used, for example, in a television receiver to protect circuitry inside an integrated circuit from damage due to high-voltage transients. The protection circuit comprises a PNPN structure forming a silicon control rectifier (SCR) and a resistive element integral to the SCR structure. In one embodiment the resistive element is a linear resistor and in another embodiment is a non-linear resistive element in the form of a diode-connected transistor. The SCR and the resistive element are arranged to form a two-terminal, high-current protection circuit which is rendered conductive when the potential difference across the two terminals is greater than one forward-biased PN junction voltage drop.
One terminal of the protection circuit is connected to an input or output terminal of the protected circuit, and the other terminal is connected to the most positive power supply potential. Transient voltages appearing at the integrated circuit terminal greater than one PN junction voltage drop above the positive power supply potential cause the protection circuit to conduct current, thereby dissipating the energy of the high-voltage transient and protecting the integrated circuit from damage.
Description
~.~7~
-1- RCA 76,431/76,431A
I PROTECTION CIRCUIT FOR INTEGRAT~D CIRCUIT DEVICES
This invention relates to integrated circuit (IC) protection devices.
Many types of electrical equipment contain IC
5 devices which are vulnerable to damage from high-voltage transients.
For example, in a television receiver, containing IC's for video and audio signal processing, the anode of - the image-producing kinescope is typically biased at a high 10 potential, e.g., 25,000 volts. High-voltage transients are produced by kinescope arcing which occurs when the high-voltage anode of the kinescope i5 rapidly discharged.
Kinescope arcing can also occur unpredictably between the anode and one or more of the other lower-potential electrodes 15 of the kinescvpe when the television receiver is in normal operation. In either case, kine~cope arcing results in high-voltage transients having positive and negative peaks often in excess of 100 volts at the IC terminais and lasting ~ from one to several microseconds.
- 20 Another cause of high-voltage transients in a television receiver is electrostatic discharge. A build-up of electrostatic charge may be discharged by the user through the television receiver controls thereby producing a high-voltage transient which can damage IC's in the 25 television receiver.
The presen~ invention is embodied in an integrated circuit semiconductor protection circuit comprising a pair of complementary conductivity transistors and a resistive (either linear or non-linear) element integral to the 30 semiconductor structure. The pair of complementary ` conductivity transistors and the resistive element are arranged to form a two-terminal device capable of conducting a high current when the potential difference across its two terminals exceeds a predetermined threshold. The 35 protection device is connected at one terminal thereof to a circuit terminal of the circuit to be protected, and at the other terminal thereof to a source of operating potential. When the potential at the circuit terminal of 7~4(36
-1- RCA 76,431/76,431A
I PROTECTION CIRCUIT FOR INTEGRAT~D CIRCUIT DEVICES
This invention relates to integrated circuit (IC) protection devices.
Many types of electrical equipment contain IC
5 devices which are vulnerable to damage from high-voltage transients.
For example, in a television receiver, containing IC's for video and audio signal processing, the anode of - the image-producing kinescope is typically biased at a high 10 potential, e.g., 25,000 volts. High-voltage transients are produced by kinescope arcing which occurs when the high-voltage anode of the kinescope i5 rapidly discharged.
Kinescope arcing can also occur unpredictably between the anode and one or more of the other lower-potential electrodes 15 of the kinescvpe when the television receiver is in normal operation. In either case, kine~cope arcing results in high-voltage transients having positive and negative peaks often in excess of 100 volts at the IC terminais and lasting ~ from one to several microseconds.
- 20 Another cause of high-voltage transients in a television receiver is electrostatic discharge. A build-up of electrostatic charge may be discharged by the user through the television receiver controls thereby producing a high-voltage transient which can damage IC's in the 25 television receiver.
The presen~ invention is embodied in an integrated circuit semiconductor protection circuit comprising a pair of complementary conductivity transistors and a resistive (either linear or non-linear) element integral to the 30 semiconductor structure. The pair of complementary ` conductivity transistors and the resistive element are arranged to form a two-terminal device capable of conducting a high current when the potential difference across its two terminals exceeds a predetermined threshold. The 35 protection device is connected at one terminal thereof to a circuit terminal of the circuit to be protected, and at the other terminal thereof to a source of operating potential. When the potential at the circuit terminal of 7~4(36
-2~ RCA 76,431/76,431A
1 the protected circuit exceeds the operating supply potential by an amount equal to the pxedetermined threshold, the protection circuit is rendered conductive, thereby protecting the IC from damage.
In the drawing:
FIGURE 1 is a cross-sectional view of one embodiment of a semiconductor structure embodying a protection circuit in accordance with the present invention;
FIGURE 2 is a schematic diagram of the embodiment of the semiconductor protection circuit of FIGURE l;
FIGURE 3 is a cross-sectional view of another embodiment of a semiconductor structure embodying the 15 protection circuit in accordance with the present invention;
and FIGURE 4 is a schematic diagram of the embodiment of the semiconductor protection circuit of FIGURE 3.
As shown in FIGURE 1, a semiconductor circuit is 20 fabricated on a substrate 10 which may consist of P type silicon material. An epitaxial layer 12 which may consist of N- type conductivity is disposecl on the substrate 10.
A P type region 14 is formed within the N- type epitaxial layer 12, forming a PN junction with the N- type layer 12.
25 Another P type region 16 is formed within the N- type epitaxial layer 12, forming a PN junction with the epitaxial layer 12. An N+ region 18 is formed within the P type region 16, and it forms a PN junction with the P type region 16. Another N+ type region 20 is formed within the N- type 30 epitaxial layer 12. A buried N+ pocket 11 underlies the P
regions 14 and 16.
An insulating layer 22, which may be silicon dioxide, overlies the surface of the N- epitaxial layer 12.
Openings are formed in the insulating layer 22 over regions 35 14, 18 and 20 in order to make respective electrical contact thereto. A conductive layer 26, which may for example be aluminum, overlies the insulating layer 22, and makes contact .:
'i~ . ' . , 9~
1 the protected circuit exceeds the operating supply potential by an amount equal to the pxedetermined threshold, the protection circuit is rendered conductive, thereby protecting the IC from damage.
In the drawing:
FIGURE 1 is a cross-sectional view of one embodiment of a semiconductor structure embodying a protection circuit in accordance with the present invention;
FIGURE 2 is a schematic diagram of the embodiment of the semiconductor protection circuit of FIGURE l;
FIGURE 3 is a cross-sectional view of another embodiment of a semiconductor structure embodying the 15 protection circuit in accordance with the present invention;
and FIGURE 4 is a schematic diagram of the embodiment of the semiconductor protection circuit of FIGURE 3.
As shown in FIGURE 1, a semiconductor circuit is 20 fabricated on a substrate 10 which may consist of P type silicon material. An epitaxial layer 12 which may consist of N- type conductivity is disposecl on the substrate 10.
A P type region 14 is formed within the N- type epitaxial layer 12, forming a PN junction with the N- type layer 12.
25 Another P type region 16 is formed within the N- type epitaxial layer 12, forming a PN junction with the epitaxial layer 12. An N+ region 18 is formed within the P type region 16, and it forms a PN junction with the P type region 16. Another N+ type region 20 is formed within the N- type 30 epitaxial layer 12. A buried N+ pocket 11 underlies the P
regions 14 and 16.
An insulating layer 22, which may be silicon dioxide, overlies the surface of the N- epitaxial layer 12.
Openings are formed in the insulating layer 22 over regions 35 14, 18 and 20 in order to make respective electrical contact thereto. A conductive layer 26, which may for example be aluminum, overlies the insulating layer 22, and makes contact .:
'i~ . ' . , 9~
-3- RCA 76,431/76,431A
1 with regions 18 and 20. The conductive layer 26 is.further connected to a terminal 30 which receives a positive operating supply potential V+. A conductive layer 24, which may also be aluminum, extends through an opening in 5 the insulating layer 22 to make contact with region 14.
A bond pad 28 is connected to region 14 through conductive layer 24. The bond pad 28 is further connected to an input or output terminal of a utilization circuit (not shown) elsewhere on the IC. A P+ region 32 extends from the 10 surface o~ epitaxial layer 12 to the substrate 10. Region 32 surrounds the epitaxial layer 12, isolating the protection circuit from other circuits on the substrate 12.
~; FIGURE 2 is a circuit diagram of the structure illustrated in FIGURE 1 wherein the resistive element is 15 linear. The protection circuit comprises an NPN transistor Ql, a PNP transistor Q2, and a linear resistive element designated as resistor R. The emitter electrode 118, base . electrode 116, collector electrode 112 of transistor Ql correspond to regions 18, 16 and 12 respectively in FIGURE 1.
r; 20 The emitter electrode 114, base electrode 112 and collector electrode 116 of transistor Q2 correspond to regions 14, 12 and 16 respectively in FIGURE 1. Resistor R, designated as 120, is connected between the base electrode 112 of Q2 and the emitter electrode 118 of Ql and corresponds to that 25.region of the N- type epitaxial layer 12 between P region 16 and N~ region 20 in FIGURE 1. Conductor 126, between the emitter electrode of transistor Ql and resistor R, -: corresponds to conductive layer 26 in FIGURE 1.
: The value of resistor R is determined by the 30 resistivity of the N- epitaxial layer 12 and the geometry of the N-.epitaxial layer situated between P region 16 and N+ region 20 (FIGURE 1). For example, the resistance ~ of resistor R may be increased by locating N~ region 20 further away from P region 16. Also, the buried N+ region 11 significantly lowers the resisti~ity of the N- epitaxial layer 12. Therefore, the ~uried N+ region 11, while disposed directly beneath P regions 14 and 16, does not extend beneath that portion of the N- epitaxial layer 12 , ~
.
- .
, . .
~7~)6
1 with regions 18 and 20. The conductive layer 26 is.further connected to a terminal 30 which receives a positive operating supply potential V+. A conductive layer 24, which may also be aluminum, extends through an opening in 5 the insulating layer 22 to make contact with region 14.
A bond pad 28 is connected to region 14 through conductive layer 24. The bond pad 28 is further connected to an input or output terminal of a utilization circuit (not shown) elsewhere on the IC. A P+ region 32 extends from the 10 surface o~ epitaxial layer 12 to the substrate 10. Region 32 surrounds the epitaxial layer 12, isolating the protection circuit from other circuits on the substrate 12.
~; FIGURE 2 is a circuit diagram of the structure illustrated in FIGURE 1 wherein the resistive element is 15 linear. The protection circuit comprises an NPN transistor Ql, a PNP transistor Q2, and a linear resistive element designated as resistor R. The emitter electrode 118, base . electrode 116, collector electrode 112 of transistor Ql correspond to regions 18, 16 and 12 respectively in FIGURE 1.
r; 20 The emitter electrode 114, base electrode 112 and collector electrode 116 of transistor Q2 correspond to regions 14, 12 and 16 respectively in FIGURE 1. Resistor R, designated as 120, is connected between the base electrode 112 of Q2 and the emitter electrode 118 of Ql and corresponds to that 25.region of the N- type epitaxial layer 12 between P region 16 and N~ region 20 in FIGURE 1. Conductor 126, between the emitter electrode of transistor Ql and resistor R, -: corresponds to conductive layer 26 in FIGURE 1.
: The value of resistor R is determined by the 30 resistivity of the N- epitaxial layer 12 and the geometry of the N-.epitaxial layer situated between P region 16 and N+ region 20 (FIGURE 1). For example, the resistance ~ of resistor R may be increased by locating N~ region 20 further away from P region 16. Also, the buried N+ region 11 significantly lowers the resisti~ity of the N- epitaxial layer 12. Therefore, the ~uried N+ region 11, while disposed directly beneath P regions 14 and 16, does not extend beneath that portion of the N- epitaxial layer 12 , ~
.
- .
, . .
~7~)6
-4- RCA 76,431/76~431A
1 between P region 16 and N+ region 20.
IN FIGURE 2, transistors Ql and Q2 are connected to form a silicon controlled rectifier (SC~. Specifically, the base electrode of Ql is connected to the collector
1 between P region 16 and N+ region 20.
IN FIGURE 2, transistors Ql and Q2 are connected to form a silicon controlled rectifier (SC~. Specifically, the base electrode of Ql is connected to the collector
5 electrode of Q2, and the base electrode cf Q2 is connected to the collector electrode of Ql. The resistor R is effectively connected in parallel with the collector-emitter conduction path of transistor Ql.
Referring now to FIGURE 3, there is shown a : 10 semiconductor circuit fabricated on a substrate 10 which typically may consist of P type silicon material having a buried region 11 of N~ type conductivity. An epitaxial laye.r 12 of N- type conductivity is disposed on -the substrate 10. A P type region 14 is formed within the N- type 15 epitaxial layer 12, forming a PN junction with the N- type layer 12. Another P type region 16 is formed within the N- type epitaxial layer 12, forming a PN junction with the epitaxial layer 12~ An N+ region :L8 is formed within the P type region 16 to form a PN juncti.on with the P type 20 region 16. The combination of regions 12, 16, and 18 represents the collec~or~ base and emitter, respectively,.
of transistor Ql. In this embodiment, a P typè region 38 is formed within the N- type epitaxial layer 12 and an N+
: region 20 is formed within P type region 38. Regions 20 25 and 38 together with N+ region 36 formed in N- epitaxial layer 12 adjacent P type region 38 represent the emitter, base and collector respectively of transistor Q3. A
buried N~ pocket 11 underlies the P regions 14, 16 and 38.
An insulating layer 22, which may be silicon 30 dioxide, overlies the surface of the N- epitaxial layer 12.
: Openings are formed in the insulating layer 22 over regions .. 14, 18, 36, 38 and 20 in order to make respective electrical contacts thereto. A conductive contact 26, which may for : example be aluminum, extends through the insulating layer 22, 3S and makes ohmic contact with region 18. While conductive contact 34, which may be aluminum, makes ohmic contact with ` regions 36 and 38 to short the base and collector regions ; of Q3 to form a diode. The conductive contact 26 is further .
~7~
-5- RCA 76,431/76,431A
1 connected, by means of lead 42, to a terminal 30 which receives a positive operating supply potential V~. A
conductive layer 24, which may also be aluminum, extends through an op~ning in the insulating layer 22 to make
Referring now to FIGURE 3, there is shown a : 10 semiconductor circuit fabricated on a substrate 10 which typically may consist of P type silicon material having a buried region 11 of N~ type conductivity. An epitaxial laye.r 12 of N- type conductivity is disposed on -the substrate 10. A P type region 14 is formed within the N- type 15 epitaxial layer 12, forming a PN junction with the N- type layer 12. Another P type region 16 is formed within the N- type epitaxial layer 12, forming a PN junction with the epitaxial layer 12~ An N+ region :L8 is formed within the P type region 16 to form a PN juncti.on with the P type 20 region 16. The combination of regions 12, 16, and 18 represents the collec~or~ base and emitter, respectively,.
of transistor Ql. In this embodiment, a P typè region 38 is formed within the N- type epitaxial layer 12 and an N+
: region 20 is formed within P type region 38. Regions 20 25 and 38 together with N+ region 36 formed in N- epitaxial layer 12 adjacent P type region 38 represent the emitter, base and collector respectively of transistor Q3. A
buried N~ pocket 11 underlies the P regions 14, 16 and 38.
An insulating layer 22, which may be silicon 30 dioxide, overlies the surface of the N- epitaxial layer 12.
: Openings are formed in the insulating layer 22 over regions .. 14, 18, 36, 38 and 20 in order to make respective electrical contacts thereto. A conductive contact 26, which may for : example be aluminum, extends through the insulating layer 22, 3S and makes ohmic contact with region 18. While conductive contact 34, which may be aluminum, makes ohmic contact with ` regions 36 and 38 to short the base and collector regions ; of Q3 to form a diode. The conductive contact 26 is further .
~7~
-5- RCA 76,431/76,431A
1 connected, by means of lead 42, to a terminal 30 which receives a positive operating supply potential V~. A
conductive layer 24, which may also be aluminum, extends through an op~ning in the insulating layer 22 to make
6 contact with region 14. A bond pad 28 i9 connected to region 14 through the conductive layer 24. The bond pad 28 is further connected ~o an input or output terminal of a utilization circuit (not shown) elsewhere on the IC. A P+
isolation region 32 extends from the surface of epitaxial 10 layer 12 to.the substrate 10 and also surrounds the epitaxial layer 12 in order to isolate the protection circuit from other circuits on the substrate 12. It should be here noted, when isolation region 32 is formed, P+ region 40 may also be formed in region 14. This added region 40 15 tends to improve the emitter injection efficiency and lower the contact resistance or "on" resistance of Q2.
FIGURE 4 is a schematic circuit diagram of the structure illustrated in FIGURE 3 wherein the resistive element is a non-linear resistive element in the orm of a 20 diode. The protection circuit comprises an NPN transistor Ql, a PNP transistor Q2, and a non-linear r~sistive element formed by an NPN transistor Q3 connected as a diode. The ~emitter electrode 118, the base electrode 116, and the collector electrode 112 of transistor Ql correspond to 25 regions 18, 16 and I2 respectively in FIGURE 3. The emitter electrode 114, the base electrode 112 and th~
collector electrode.ll6 of transistor Q~ correspond to regions 14, 12 and 16 respectively in FIGURE 3. Q3, connected as a diode, is connected between the base 30 electrode of Q2 and a source of operating potential 30.
The base region 138 and collector region 136 o Q3 are shorted to form a diode by contact 34 (FIGURE 3) while the emitter region 120 (region 20, FIGURE 3) is connected to the source of operating potential 30 by means of conductor 35 144 (conductor 44, FIGURE 3)O To complete the device, conductor 142 connects emitter 120 of Q3 and emitter 118 of Q3 (via contact 126) to source 30.
~ ~9~C~6 -6- RCA 76,431/76,431A
1 The value of reSiStQr R IFIGURE 1) was determined solely by the resistivity of the N epitaxial layer 12 and the geometry of the N epitaxial layer situated between P
region 16 and N~ region 20. For example t the resistance of 5 resistor R may be increased by locating N+ region 20 further away from P region 16. As in the circuit of FIGURE 2, base current is needed to trigger Q2 in order to allow regenerative action to take place, causing the transistor combination Ql/Q2 to latch. In the circuit diagram of FIGURE 4 the 10 presence of Q3 (the non-linear resistive element) when forward biased adds an additional voltage drop of about 0.6 volt which must be overcome before the triggering action will take place. However, the presence of Q3 adds a reverse bias breakdown voltage of about 7 volts, which is inherent 15 in the diode, together with a reverse bias breakdown of about 8 volts which is attributed to the presence of deep diffusion region 40 in contact with the N~ pocket 11.
Thus, I have now achieved a total reverse bias breakdown voltage of about 15 volts which is necessary when operating 20 a power supply at about 12 volts.
As in FIGURE 2, transistors Ql and Q2 of FIGURE 4 are connected to form a silicon controlled rectifier (SCR).
Specifically, the base electrode of Ql is connected to the ! collector electrode of Q2 and the base electrode of Q2 is 26 connected to the collector electrode of Q1. Diode-connected Q3 is effectively connected in parallel with the collector-emitter conduction path of transistor Ql.
The resulting protection circuit diEfers from a conventional SCR device in that the resistive element (the 30 linear resistor R of FIGURE 2 or the diode-connected transistor of FIGURE 4) converts the conventional three-terminal SCR device into a two-terminal device that is rendered conductive when the voltage across its terminals exceeds a predetermined threshold. Furthermore, unlike a 35 conventional SCR, the present invention does not require a resistor between the base and emitter electrodes of either transistor Ql or Q2.
- ~7~0~i
isolation region 32 extends from the surface of epitaxial 10 layer 12 to.the substrate 10 and also surrounds the epitaxial layer 12 in order to isolate the protection circuit from other circuits on the substrate 12. It should be here noted, when isolation region 32 is formed, P+ region 40 may also be formed in region 14. This added region 40 15 tends to improve the emitter injection efficiency and lower the contact resistance or "on" resistance of Q2.
FIGURE 4 is a schematic circuit diagram of the structure illustrated in FIGURE 3 wherein the resistive element is a non-linear resistive element in the orm of a 20 diode. The protection circuit comprises an NPN transistor Ql, a PNP transistor Q2, and a non-linear r~sistive element formed by an NPN transistor Q3 connected as a diode. The ~emitter electrode 118, the base electrode 116, and the collector electrode 112 of transistor Ql correspond to 25 regions 18, 16 and I2 respectively in FIGURE 3. The emitter electrode 114, the base electrode 112 and th~
collector electrode.ll6 of transistor Q~ correspond to regions 14, 12 and 16 respectively in FIGURE 3. Q3, connected as a diode, is connected between the base 30 electrode of Q2 and a source of operating potential 30.
The base region 138 and collector region 136 o Q3 are shorted to form a diode by contact 34 (FIGURE 3) while the emitter region 120 (region 20, FIGURE 3) is connected to the source of operating potential 30 by means of conductor 35 144 (conductor 44, FIGURE 3)O To complete the device, conductor 142 connects emitter 120 of Q3 and emitter 118 of Q3 (via contact 126) to source 30.
~ ~9~C~6 -6- RCA 76,431/76,431A
1 The value of reSiStQr R IFIGURE 1) was determined solely by the resistivity of the N epitaxial layer 12 and the geometry of the N epitaxial layer situated between P
region 16 and N~ region 20. For example t the resistance of 5 resistor R may be increased by locating N+ region 20 further away from P region 16. As in the circuit of FIGURE 2, base current is needed to trigger Q2 in order to allow regenerative action to take place, causing the transistor combination Ql/Q2 to latch. In the circuit diagram of FIGURE 4 the 10 presence of Q3 (the non-linear resistive element) when forward biased adds an additional voltage drop of about 0.6 volt which must be overcome before the triggering action will take place. However, the presence of Q3 adds a reverse bias breakdown voltage of about 7 volts, which is inherent 15 in the diode, together with a reverse bias breakdown of about 8 volts which is attributed to the presence of deep diffusion region 40 in contact with the N~ pocket 11.
Thus, I have now achieved a total reverse bias breakdown voltage of about 15 volts which is necessary when operating 20 a power supply at about 12 volts.
As in FIGURE 2, transistors Ql and Q2 of FIGURE 4 are connected to form a silicon controlled rectifier (SCR).
Specifically, the base electrode of Ql is connected to the ! collector electrode of Q2 and the base electrode of Q2 is 26 connected to the collector electrode of Q1. Diode-connected Q3 is effectively connected in parallel with the collector-emitter conduction path of transistor Ql.
The resulting protection circuit diEfers from a conventional SCR device in that the resistive element (the 30 linear resistor R of FIGURE 2 or the diode-connected transistor of FIGURE 4) converts the conventional three-terminal SCR device into a two-terminal device that is rendered conductive when the voltage across its terminals exceeds a predetermined threshold. Furthermore, unlike a 35 conventional SCR, the present invention does not require a resistor between the base and emitter electrodes of either transistor Ql or Q2.
- ~7~0~i
-7- RCA 76,431/76,431A
1 The protection circuit of either embodiment (FIGU~ES 2 and 4) i5 connected to terminal 30 through conductor 126 which receives a posltive operating supply potential V+~ The protection circuit is also connected to 5 a bond pad 28 at the emitter electrode of Q2, to which is connected a utilization circuit to be protected.
In operation, the signal at bond pad 28 normally ~luctuates at potentials below V+. So long as the potential at bond pad 28 is below V+, the base-emitter junction of 10 transistor ~2 is reverse biased, and transistors Ql and Q2 are nonconductive.
A high-voltage transient appearing at bond pad 28 will cause the potential at bond pad 28 to become more positive than V+. When the potential difference between 15 bond pad 28 and power supply terminal 30 is greater than the combined forward-biased base-emitter voltages (VBE) of transistors Q2 and Q3, transistor Q2 will begin to conduct collector current. Conduction through the collector electrode of transistor Q2 provides base current to 20 transistor Ql to conduct. Conduction through the collector electrode of transistor Ql in turn provides base current for transistor Q2, thereby driving transistor Q2 and transistor Ql into high conduction. When the current supplied by the high-voltage transient from bond pad 28 to 25 power supply terminal 30 falls below a minimum sustaining current, transistor Q2 will turn off which turns off the base current to transistor Ql and the protection circuit becomes nonconductive. In such mannerl the energy of a high-voltage transient producing a positive voltage at bond 30 pad 28 is dissipated by conduction of transistors Ql and Q2 to power supply terminal 30, thereby protecting the utilization circui-t from damage.
3~
.
.
1 The protection circuit of either embodiment (FIGU~ES 2 and 4) i5 connected to terminal 30 through conductor 126 which receives a posltive operating supply potential V+~ The protection circuit is also connected to 5 a bond pad 28 at the emitter electrode of Q2, to which is connected a utilization circuit to be protected.
In operation, the signal at bond pad 28 normally ~luctuates at potentials below V+. So long as the potential at bond pad 28 is below V+, the base-emitter junction of 10 transistor ~2 is reverse biased, and transistors Ql and Q2 are nonconductive.
A high-voltage transient appearing at bond pad 28 will cause the potential at bond pad 28 to become more positive than V+. When the potential difference between 15 bond pad 28 and power supply terminal 30 is greater than the combined forward-biased base-emitter voltages (VBE) of transistors Q2 and Q3, transistor Q2 will begin to conduct collector current. Conduction through the collector electrode of transistor Q2 provides base current to 20 transistor Ql to conduct. Conduction through the collector electrode of transistor Ql in turn provides base current for transistor Q2, thereby driving transistor Q2 and transistor Ql into high conduction. When the current supplied by the high-voltage transient from bond pad 28 to 25 power supply terminal 30 falls below a minimum sustaining current, transistor Q2 will turn off which turns off the base current to transistor Ql and the protection circuit becomes nonconductive. In such mannerl the energy of a high-voltage transient producing a positive voltage at bond 30 pad 28 is dissipated by conduction of transistors Ql and Q2 to power supply terminal 30, thereby protecting the utilization circui-t from damage.
3~
.
.
Claims (14)
CIAIMS:
1. A semiconductor protection circuit comprising:
a substrate;
a semiconductor layer of a first conductivity type disposed on the substrate, the semiconductor layer having a surface;
first and second separate semiconductor regions of a second conductivity type, each disposed in PN
junction forming relation with the semiconductor layer;
a third semiconductor region of the first conductivity type disposed in PN junction forming relation with the second semiconductor region;
a fourth semiconductor region disposed in the semiconductor layer, the fourth semiconductor region being spaced adjacent to the second semiconductor region so as to form a resistive element disposed in the semiconductor layer between the second and fourth semiconductor regions;
conductive means for connecting the third semiconductor region to the power supply terminal; and conductive means for connecting the fourth semiconductor region to the power supply terminal.
a substrate;
a semiconductor layer of a first conductivity type disposed on the substrate, the semiconductor layer having a surface;
first and second separate semiconductor regions of a second conductivity type, each disposed in PN
junction forming relation with the semiconductor layer;
a third semiconductor region of the first conductivity type disposed in PN junction forming relation with the second semiconductor region;
a fourth semiconductor region disposed in the semiconductor layer, the fourth semiconductor region being spaced adjacent to the second semiconductor region so as to form a resistive element disposed in the semiconductor layer between the second and fourth semiconductor regions;
conductive means for connecting the third semiconductor region to the power supply terminal; and conductive means for connecting the fourth semiconductor region to the power supply terminal.
2. A semiconductor protection circuit according to Claim 1 further comprising:
a fifth semiconductor region of the same conductivity type as the semiconductor layer, the fifth semiconductor region disposed beneath the first and second semiconductor regions and disposed between the semiconductor layer and said substrate, the fifth semiconductor region having a lower resistivity than that of the semiconductor layer.
a fifth semiconductor region of the same conductivity type as the semiconductor layer, the fifth semiconductor region disposed beneath the first and second semiconductor regions and disposed between the semiconductor layer and said substrate, the fifth semiconductor region having a lower resistivity than that of the semiconductor layer.
3. A semiconductor protection circuit according to Claim 2 further comprising:
a bond pad;
a utilization circuit including a signal terminal connected to the bond pad; and means for connecting the bond pad to the first semiconductor region.
RCA 76,431/76431A
a bond pad;
a utilization circuit including a signal terminal connected to the bond pad; and means for connecting the bond pad to the first semiconductor region.
RCA 76,431/76431A
4. A semiconductor protection circuit according to Claim 3 further comprising a sixth semiconductor region of the second conductivity type extending from the surface of the semiconductor layer to the substrate, the sixth semiconductor region surrounding the semiconductor layer.
5. A semiconductor protection circuit according to Claim 4 wherein the substrate material is silicon of P
type conductivity.
type conductivity.
6. A semiconductor protection circuit according to Claim 5 wherein the layer is an epitaxial layer of N
type conductivity.
RCA 76,431/431/76431A
type conductivity.
RCA 76,431/431/76431A
7. The semiconductor protection circuit according to Claim 6, further comprising:
a seventh semiconductor region of the second conductivity type extending from the surface of the semiconductor layer; the seventh semiconductor region completely surrounding the fourth semiconductor region;
an eighth semiconductor region of the first conductivity type extending from the surface of the semiconductor layer adjacent to and abutting the seventh semiconductor region; and conductive means for connecting said seventh and eighth semiconductor regions to thereby form a diode connected transistor.
a seventh semiconductor region of the second conductivity type extending from the surface of the semiconductor layer; the seventh semiconductor region completely surrounding the fourth semiconductor region;
an eighth semiconductor region of the first conductivity type extending from the surface of the semiconductor layer adjacent to and abutting the seventh semiconductor region; and conductive means for connecting said seventh and eighth semiconductor regions to thereby form a diode connected transistor.
8. A semiconductor protection circuit according to Claim 6, wherein:
the fourth semiconductor region is disposed in PN junction forming relation with the semiconductor layer the fourth semiconductor region being spaced adjacent to the second semiconductor region to form a resistor comprising that portion of the semiconductor layer disposed between the second and fourth semiconductor regions.
RCA 76,431/76431A
the fourth semiconductor region is disposed in PN junction forming relation with the semiconductor layer the fourth semiconductor region being spaced adjacent to the second semiconductor region to form a resistor comprising that portion of the semiconductor layer disposed between the second and fourth semiconductor regions.
RCA 76,431/76431A
9. A protection circuit comprising:
first and second transistors of opposite conductivity type formed in a body of semiconductor material, each transistor having respective emitter, base and collector electrodes;
means for connecting the first and second transistors as a SCR comprising means for connecting the base electrode of the first transistor to the collector electrode of the second transistor and means for connecting the base electrode of the second transistor to the collector electrode of the first transistor;
a power supply terminal for receiving a source of operating potential;
a resistive element connected between the base electrode of the second transistor and the power supply terminal;
means for connecting the power supply terminal to the emitter electrode of the first transistor;
a signal terminal for connection to a utilization circuit; and means for connecting the emitter electrode of the second transistor to the signal terminal.
RCA 76,431/76431A
first and second transistors of opposite conductivity type formed in a body of semiconductor material, each transistor having respective emitter, base and collector electrodes;
means for connecting the first and second transistors as a SCR comprising means for connecting the base electrode of the first transistor to the collector electrode of the second transistor and means for connecting the base electrode of the second transistor to the collector electrode of the first transistor;
a power supply terminal for receiving a source of operating potential;
a resistive element connected between the base electrode of the second transistor and the power supply terminal;
means for connecting the power supply terminal to the emitter electrode of the first transistor;
a signal terminal for connection to a utilization circuit; and means for connecting the emitter electrode of the second transistor to the signal terminal.
RCA 76,431/76431A
10. The protection circuit of Claim 9, wherein:
the resistive element is a linear operating device.
the resistive element is a linear operating device.
11. The protection circuit of Claim 10, wherein:
the linear operating resistive element is the resistance of that portion of the body of a semiconductor material located between the base electrode of the second transistor and the emitter electrode of the first transistor.
the linear operating resistive element is the resistance of that portion of the body of a semiconductor material located between the base electrode of the second transistor and the emitter electrode of the first transistor.
12. The protection circuit of Claim 9, wherein:
the resistive element is a non-linear operating device.
the resistive element is a non-linear operating device.
13. The protection circuit of Claim 12, wherein:
the non-linear resistive element is a diode formed in that portion of the semiconductor body located between the base electrode of the second transistor and the emitter electrode of the first transistor.
the non-linear resistive element is a diode formed in that portion of the semiconductor body located between the base electrode of the second transistor and the emitter electrode of the first transistor.
14. The protection circuit of Claim 13, wherein:
the non-linear resistive element is a diode-connected transistor.
the non-linear resistive element is a diode-connected transistor.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US23035781A | 1981-01-30 | 1981-01-30 | |
| US230,357 | 1981-01-30 | ||
| US32621981A | 1981-12-01 | 1981-12-01 | |
| US326,219 | 1981-12-01 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1179406A true CA1179406A (en) | 1984-12-11 |
Family
ID=26924154
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000395261A Expired CA1179406A (en) | 1981-01-30 | 1982-01-29 | Protection circuit for integrated circuit devices |
Country Status (8)
| Country | Link |
|---|---|
| KR (1) | KR860000714B1 (en) |
| CA (1) | CA1179406A (en) |
| DE (1) | DE3201933C2 (en) |
| ES (2) | ES508976A0 (en) |
| FI (1) | FI74166C (en) |
| FR (1) | FR2499325B1 (en) |
| GB (2) | GB2092377B (en) |
| IT (1) | IT1151504B (en) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5948951A (en) * | 1982-09-14 | 1984-03-21 | Toshiba Corp | Semiconductor protective device |
| US4484244A (en) * | 1982-09-22 | 1984-11-20 | Rca Corporation | Protection circuit for integrated circuit devices |
| US4562454A (en) * | 1983-12-29 | 1985-12-31 | Motorola, Inc. | Electronic fuse for semiconductor devices |
| KR900008746B1 (en) * | 1986-11-19 | 1990-11-29 | 삼성전자 주식회사 | Semiconductor device protecting a connection |
| DE3835569A1 (en) * | 1988-10-19 | 1990-05-03 | Telefunken Electronic Gmbh | Protective arrangement |
| DE4004526C1 (en) * | 1990-02-14 | 1991-09-05 | Texas Instruments Deutschland Gmbh, 8050 Freising, De | |
| US5224169A (en) * | 1991-05-13 | 1993-06-29 | Thomson Consumer Electronics, Inc. | Protection arrangement for an audio output channel |
| US5235489A (en) * | 1991-06-28 | 1993-08-10 | Sgs-Thomson Microelectronics, Inc. | Integrated solution to high voltage load dump conditions |
| USD794465S1 (en) | 2015-08-28 | 2017-08-15 | The Procter & Gamble Company | Container |
| USD793867S1 (en) | 2015-08-28 | 2017-08-08 | The Procter & Gamble Company | Container |
| USD793250S1 (en) | 2015-09-07 | 2017-08-01 | The Procter & Gamble Company | Container |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3524113A (en) * | 1967-06-15 | 1970-08-11 | Ibm | Complementary pnp-npn transistors and fabrication method therefor |
| DE1901075A1 (en) * | 1969-01-10 | 1970-08-13 | Bosch Gmbh Robert | Two-pole electrical switching element |
| JPS55113358A (en) * | 1979-02-23 | 1980-09-01 | Hitachi Ltd | Semiconductor device |
| GB2056808A (en) * | 1979-08-17 | 1981-03-18 | Lumenition Ltd | Power transistor protection |
-
1982
- 1982-01-19 GB GB8201501A patent/GB2092377B/en not_active Expired
- 1982-01-19 IT IT19185/82A patent/IT1151504B/en active
- 1982-01-22 ES ES508976A patent/ES508976A0/en active Granted
- 1982-01-22 DE DE3201933A patent/DE3201933C2/en not_active Expired
- 1982-01-22 FI FI820197A patent/FI74166C/en not_active IP Right Cessation
- 1982-01-29 FR FR828201502A patent/FR2499325B1/en not_active Expired
- 1982-01-29 CA CA000395261A patent/CA1179406A/en not_active Expired
- 1982-01-30 KR KR8200403A patent/KR860000714B1/en not_active IP Right Cessation
-
1983
- 1983-03-08 ES ES520411A patent/ES8403245A1/en not_active Expired
-
1984
- 1984-05-31 GB GB08413887A patent/GB2141301B/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| GB2141301B (en) | 1985-07-24 |
| FR2499325A1 (en) | 1982-08-06 |
| FI74166C (en) | 1987-12-10 |
| ES8307416A1 (en) | 1983-06-16 |
| FR2499325B1 (en) | 1985-07-26 |
| FI74166B (en) | 1987-08-31 |
| FI820197L (en) | 1982-07-31 |
| ES508976A0 (en) | 1983-06-16 |
| KR830009654A (en) | 1983-12-22 |
| DE3201933A1 (en) | 1982-08-12 |
| KR860000714B1 (en) | 1986-06-07 |
| GB2141301A (en) | 1984-12-12 |
| ES520411A0 (en) | 1984-03-01 |
| ES8403245A1 (en) | 1984-03-01 |
| DE3201933C2 (en) | 1987-01-08 |
| IT8219185A0 (en) | 1982-01-19 |
| IT1151504B (en) | 1986-12-24 |
| GB2092377A (en) | 1982-08-11 |
| GB8413887D0 (en) | 1984-07-04 |
| GB2092377B (en) | 1985-07-31 |
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