GB2141301A - Protection circuit for integrated circuit devices - Google Patents
Protection circuit for integrated circuit devices Download PDFInfo
- Publication number
- GB2141301A GB2141301A GB08413887A GB8413887A GB2141301A GB 2141301 A GB2141301 A GB 2141301A GB 08413887 A GB08413887 A GB 08413887A GB 8413887 A GB8413887 A GB 8413887A GB 2141301 A GB2141301 A GB 2141301A
- Authority
- GB
- United Kingdom
- Prior art keywords
- transistor
- protection circuit
- resistive element
- circuit
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 10
- 239000000463 material Substances 0.000 claims 2
- 230000006378 damage Effects 0.000 abstract description 5
- 230000001052 transient effect Effects 0.000 abstract description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 3
- 229910052710 silicon Inorganic materials 0.000 abstract description 3
- 239000010703 silicon Substances 0.000 abstract description 3
- 239000000758 substrate Substances 0.000 description 8
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 5
- 239000004020 conductor Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 3
- 230000000295 complement effect Effects 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000002210 silicon-based material Substances 0.000 description 2
- CZMRCDWAGMRECN-FBXJDJJESA-N D-sucrose Chemical compound O[C@@H]1[C@@H](O)[C@H](CO)O[C@]1(CO)O[C@H]1[C@@H](O)[C@H](O)[C@@H](O)[C@H](CO)O1 CZMRCDWAGMRECN-FBXJDJJESA-N 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000002045 lasting effect Effects 0.000 description 1
- 230000001172 regenerating effect Effects 0.000 description 1
- 230000005236 sound signal Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
- H01L27/0744—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common without components of the field effect type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K17/081—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
- H03K17/0814—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the output circuit
- H03K17/08146—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the output circuit in bipolar transistor switches
Abstract
A protection circuit which may be used in a television receiver to protect an integrated circuit from damage due to high-voltage transients comprises two transistors (Q1, Q2), connected to form a silicon controlled rectifier, and an associated resistive element (R) which may be a linear resistor (120) or a non-linear resistive element in the form of a diode-connected transistor. The circuit formed is a two-terminal (28,30), high-current protection circuit which is rendered conductive when the potential difference across the two terminals (28,30) is greater than one forward-biased PN junction voltage drop. One terminal (28) of the protection circuit is connected to an input or output terminal of the protected circuit, and the other terminal (30) is connected to the most positive power supply potential (V+). Transient voltages appearing at the integrated circuit terminal (28) greater than one PN junction voltage drop above the positive power supply potential (V+) cause the protection circuit to conduct. <IMAGE>
Description
1 GB 2 141 301 A 1
SPECIFICATION
Protection circuitfor integrated circuit devices This invention relates to integrated circuit (IC) protection devices, Many types of electrical equipment contain IC devices which are vulnerable to damage from highvoltage transients.
For example, in a television receiver, containing IC's for video and audio signal processing, the anode of the image-producing kinescope is typically biased at a high potential, e.g., 25,000 volts. High-voltage transients are produced by kinescope arcing which occurs when the high-voltage anode of the kinescope is rapidly discharged. Kinescope arcing can also occur unpredictably between the anode and one or more of the other lower-potential electrodes of the kinescope when the television receiver is in normal operation. In either case, kinescope arcing results in high-voltage tr ansients having positive and negative peaks often in excess of 100 volts at the IC terminals and lasting from one to several microse conds.
Another cause of high-voltage transients in a 90 television receiver is e lectrostatic discharge. A build up of electrostatic charge may be discharged by the user through the television receiver controls thereby producing a high-voltage transient which can dam- age IC's in the television receiver.
The present invention is embodied in an integrated circuit semiconductor protection circuit comprising a pair of complementary conductivity transistors and a resistive (either linear or non-linear) element integral to the semiconductor structure. The pair of complementary conductivity transistors and the resistive element are arranged to form a twoterminal device capable of conducting a high current when the potential difference across its two termin- als exceeds a predetermined threshold. The protection device is connected at one terminal thereof to a circuit terminal of the circuit to be protected, and at the other terminal thereof to a source of operating potential. When the potential at the circuit terminal of the protected circuit exceeds the operating supply potential by an amount equal to the predetermined threshold, the protection circuit is rendered conductive, thereby protecting the IC from damage.
In the drawing:
Figure 1 is a cross-sectional view of one embodi- ment of a semiconductor structure embodying a protection circuit in accordance with the present invention; Figure 2 is a schematic diagram of the embodi ment of the semiconductor protection circuit of Figure 1; Figure 3 is a cross-sectional view of another embodiment of a semiconductor structure embody ing the protection circuit in accordance with the present invention; and Figure 4 is a schematic diagram of the embodi ment of the semiconductor protection circuit of Figure 3.
As shown in Figure 1, a semiconductor circuit is fabricated on a substrate 10 which may consist of P 130 type silicon material, An epitaxial layer 12 which may consist of N- type conductivity is disposed on the substrate 10, A P type region 14 is formed within the N- type epitaxial layer 12, forming a PN junction with the N- type layer 12. Another P type region 16 is formed within the N- type epitaxial layer 12, forming a PN junction with the epitaxial layer 12. An N+ region 18 is formed within the P type region 16, and it forms a PN junction with the P type region 16.
Another N+ type region 20 is formed within the Ntype epitaxial layer 12. A buried N+ pocket 11 underlies the P regions 14 and 16.
An insulating layer 22, which may be silicon dioxide, overlies the surface of the N- epitaxial layer 12. Openings are formed in the insulating layer 22 over regions 14, 18 and 20 in orderto make respective electrical contact thereto. A conductive layer 26, which may for example be aluminium, overlies the insulating layer 22, and makes contact with regions 18 and 20. The conductive layer 26 is further connected to a terminal 30 which receives a positive operating supply potential V+. A conductive layer 24, which may also be aluminum, extends through an opening in the insulating layer 22 to make contact with region 14. A bond pad 28 is connected to region 14 through conductive layer 24. The bond pad 28 is further connected to an input or output terminal of a utilization circuit (not shown) elsewhere on the IC. A P+ region 32 extends from the surface of epitaxial layer 12 to the substrate 10. Region 32 surrounds the epitaxial layer 12, isolating the protection circuit from other circuits on the substrate 12.
Figure 2 is a circuit diagram of the structure - illustrated in Figure 1 wherein the resistive element is linear. The protection circuit comprises an NPN transistor Q1, a PNP transistor Q2, and a linear resistive element designated as resistor R. The emitter electrode 118, base electrode 116, collector electrode 112 of transistor Q1 correspond to regions 18, 16 and 12 respectively in Figure 1. The emitter electrode 114, base electrode 112 and collector electrode 116 of transistor Q2 correspond to regions 14,12 and 16 respectively in Figure 1. Resistor R, designated as 120, is connected between the base electrode 112 of Q2 and the emitter electrode 118 of Q1 and corresponds to that region of the N- type epitaxial layer 12 between P region 16 and N+ region 20 in Figure 1. Conductor 126, between the emitter electrode of transistor Q1 and resistor R, corresponds to conductive layer 26 in Figure 1.
The value of resistor R is determined by the resistivity of the Nepitaxial layer 12 and the geometry of the N - epitaxial layer situated between P region 16 and N+ region 20 (Figure 1). For example, the resistance of resistor R may be increased by locating N + region 20 further away from P region 16. Also, the buried N+ region 11 significantly lowers the resistivity of the N- epitaxial layer 12. Therefore, the buried N+ region 11, while disposed directly beneath P regions 14 and 16, does not extend beneath that portion of the N- epitaxial layer 12 between P region 16 and N+ region 20.
In Figure 2, transistors Q1 and Q2 are connected to form a silicon controlled rectifier (SCR). Specifically, 1 2 GB 2 141 301 A 2 the base -electrode of Q1 is connected to the collector electrode of Q2, and the.base electrode of Q2-is connected to the collector electrode of Q1.The resistor R is effectively connected in parallel with the collector-emitter conduction path of transistor Q1.
Referring now to Figure 3, there is shown.a semiconductor circuit fabricated on a substrate 10 which typically may consist of P type silicon material having a buried region 11 of N+ type conductivity, An epitaxial layer 12 of N- type conductivity is disposed on the substrate 10. A P type region 14 is formed within the N- type epitaxial layer 12, forming a P.N junction with the N- type layer 12.
Another P type region 16 is formed within the N type epitaxial layer-12, forming a PN junction with the epitaxial layer 12. An N+ region 18 is formed within the P type region 16 to form a PN junction withthe P type region 16. The combination of regions 12, 16, and 18 represents the collector, base and emitter, respectively, of transistor Q1. In this embodiment, a P type region 38 is formed within the N - type epitaxial layer 12 and an N + region 20 is formed within P type region 38. Regions 20 and 38 together with N+ region 36 formed in N- epitaxial layer 12 adjacent P type region 38 represent the emitter, base and collector respectively of transistor Q3. A buried N+ pocket 11 underlies the P regions 14,16 and 38.
An insulating layer 22, which may be silicon dioxide, overlies the surface of the N- epitaxial layer 95 12. Openings are formed in the insulating layer 22 over regions 14,18, 36,38 and 20 in order to make respective electrical contacts thereto. A conductive contact 26, which may for example be aluminum, extends through the insulating layer 22, and makes ohmic contact with region 18. While conductive contact 34, which may be aluminum, makes ohmic contact with regions 36 and 38 to short the base and collector regions of Q3 to form a diode. The conduc tive contact 26 is further connected, by means of lead 42, to a terminal 30 which receives a positive operating supply potential V+. Aconductive layer 24, which may also be aluminum, extends through an opening in the insulating layer 22 to make contact with region 14. A bond pad 28 is connected to region 110 14through the conductive layer 24. The bond pad 28 is further connected to an input or output terminal of a utilization circuit (not shown) elsewhere on the IC. A P+ isolation region 32 extends from the surface of epitaxial layer 12 to the substrate 10 and also surrounds the epitaxial layer 12 in order to isolate the protection circuit from other circuits on the substrate 12. It should be here noted, when isolation region 32 is formed, P+ region 40 may also be formed in region 14. This added region 40 tends to improve the emitter injection efficiency and lower the contact resistance or "on" resistance of Q2.
Figure 4 is a schematic circuit diagram of the structure illustrated in Figure 3 wherein the resistive element is a non-linear resistive element in the form 125 of a diode. The protection circuit comprises an NPN transistor Q1, a PNP transistor Q2, and a non-linear resistive element formed by an NPN transistor Q3 connected as a diode. The emitter electrode 118, the base electrode 116, and the collector electrode 112 of 130 transistor Q1 correspond to regions 18,16 and 12 respectively in Figure 3. The emitter electrode 114, the base electrode 112 and the collector electrode 116 of transistor Q2 correspond to regions 14,12 and 16 respectively in Figure 3. Q3, connected as a diode, is connected between the base electrode of Q2 and a source of operating potential 30. The base' region 138 and collector region 136 of Q3 are shorted to form a diode by contact 34 (Figure 3) while the emitter region 120 (region 20, Figure 3) is connected to the source of operating potential 30 by means of conductor 144 (conductor 44, figure 3). To complete the device, conductor 142 connects emitter 120 of Q3 and emitter 118 of Q3 (via contact 126) to source 30.
The value of resistor R (Figure 1) was determined solely by the resistivity of the N epitaxial layer 12 and the geometry of the N epitaxial layer situated between P region 16 and N+ region 20. For example, the resistance of resistor R may be increased by locating N+ region 20 further away from P region 16. As in the circuit of Figure 2, base current is needed to trigger Q2 in order to allow regenerative action to take place, causing the transistor combination Q1/Q2 to latch. In the circuit diagram of Figure 4 the presence of Q3 (the non-linear resistive element) when forward biased adds an additional voltage drop of about 0.6 volt which must be overcome before the triggering action will take place. However, the presence of Q3 adds a reverse bias breakdown voltage of-about 7 volts, which is inherent in the diode, together with a reverse bias breakdown of about 8 volts which is attributed to the presence of deep diffusion region 40 in contact with the N + pocket 11. Thus, I have now achieved a total reverse bias breakdown voltage of about 15 volts which is necessary when operating a power supply at about 12 volts.
As in Figure 2, transistors Q1 and Q2 of Figure 4 are connected to form a silicon controlled rectifier (SCR). Specifically, the base electrode of Q1 is connected to the collector electrode of Q2 and the base electrode of Q2 is connected to the collector electrode of Q1. Diode-connected Q3 is effectively connected in parallel with the collector-emitter conduction path of transistor Q1.
The resulting protection circuit differs from a conventional SCR device in that the resistive element (the linear resistor R of Figure 2 or the diode-connected transistor of Figure 4) converts the conventional three-terminal SCR. device into a twoterminal device that is rendered conductive when the voltage across its terminals exceeds a predetermined threshold. Furthermore, unlike a conventional SCR, the present invention does not require a resistor between the base and emitter electrodes of either transistor Q1 or Q2.
The protection circuit of either embodiment (Figures 2 and 4) is connected to terminal 30 through conductor 126 which receives a positive operating supply potential V+. The protection circuit is also connected to a bond pad 28 atthe emitter electrode of Q2, to which is connected a utilization circuitto be protected.
In operation, the signal at bond pad 28 normally fluctuates at potentials below V+. So long as the i 3 GB 2 141 301 A 3 potential at bond pad 28 is below V+, the baseemitter junction of transistor Q2 is reverse biased, and transistors Q1 and Q2 are nonconductive.
A high-voltage transient appearing at bond pad 28 will cause the potential at bond pad 28 to become more positive than V+. When the potential difference between bond pad 28 and power supply terminal 30 is greater than the combined forwardbiased base-emitter voltages (VBE) of transistors Q2 and Q3, transistor Q2 will begin to conduct collector current. Conduction through the collector electrode of transistor Q2 provides base currentto transistor Q1 to conduct. Conduction through the collector electrode of transistor Q1 in turn provides base current fortransistor Q2, thereby driving transistor Q2 and transistor Q1 into high conduction. When the current supplied by the high-voltage transient from bond pad 28 to power supply terminal 30 falls below a minimum sustaining current, transistor Q2 will turn off which turns off the base current to transistor Q1 and the protection circuit becomes nonconductive. In such manner, the energy of a high-voltage transient producing a positive voltage at bond pad 28 is dissipated by conduction of transistors Q1 and Q2 to power supply terminal 30, thereby protecting the utilization circuit from damage.
Claims (7)
1. A protection circuit comprising:
first and second transistors of opposite conductivitytype formed in a body ofsemiconductor material, each transistor having respective emitter, base and collector electrodes; means for connecting the first and second transistors as a SCR comprising means for connecting the base electrode of the firsttransistor to the collector electrode of the second transistor and means for connecting the base electrode of the second transis- tor to the collector electrode of the first transistor; a power supply terminal for receiving a source of operating potential; a resistive element connected between the base electrode of the second transistor and the power supply terminal; means for connecting the power supply terminal to the emitter electrode of the first transistor; a signal terminal for connection to a utilization circuit; and means for connecting the emitter electrode of the second transistor to the signal terminal.
2. The protection circuit of Claim 1, wherein the resistive element is a linear operating device.
3. The protection circuit of Claim 2, wherein the linear operating resistive element is the resistance of that portion of the body of a semiconductor material located between the base electrode of the second transistor and the emitter electrode of the first transistor.
4. The protection circuit of Claim 1 wherein the resistive element is a non-linear operating device.
5. The protection circuit of Claim 4, wherein the non-linear resistive element is a diode formed in that portion of the semiconductor body located between the base electrode of the second transistor and the emitter electrode of the first transistor.
6. The protection circuit of Claim 5, wherein the non-linear resistive element is a diode-connected transistor.
7. The protection circuit substantially as described herein and shown in Figure 2 or4of the accompanying drawing.
Printed l n the U K for HMSO, D8818935,10184,7102. Published by The Patent Office, 25Southampton Buildings, London, WC2A l AY, from which copies may be obtained.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US23035781A | 1981-01-30 | 1981-01-30 | |
US32621981A | 1981-12-01 | 1981-12-01 |
Publications (3)
Publication Number | Publication Date |
---|---|
GB8413887D0 GB8413887D0 (en) | 1984-07-04 |
GB2141301A true GB2141301A (en) | 1984-12-12 |
GB2141301B GB2141301B (en) | 1985-07-24 |
Family
ID=26924154
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB8201501A Expired GB2092377B (en) | 1981-01-30 | 1982-01-19 | Protection circuit for integrated circuit devices |
GB08413887A Expired GB2141301B (en) | 1981-01-30 | 1984-05-31 | Protection circuit for integrated circuit devices |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB8201501A Expired GB2092377B (en) | 1981-01-30 | 1982-01-19 | Protection circuit for integrated circuit devices |
Country Status (8)
Country | Link |
---|---|
KR (1) | KR860000714B1 (en) |
CA (1) | CA1179406A (en) |
DE (1) | DE3201933A1 (en) |
ES (2) | ES508976A0 (en) |
FI (1) | FI74166C (en) |
FR (1) | FR2499325B1 (en) |
GB (2) | GB2092377B (en) |
IT (1) | IT1151504B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0515853A1 (en) * | 1991-05-13 | 1992-12-02 | Thomson Consumer Electronics, Inc. | Protection arrangement for an audio output channel |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5948951A (en) * | 1982-09-14 | 1984-03-21 | Toshiba Corp | Semiconductor protective device |
US4484244A (en) * | 1982-09-22 | 1984-11-20 | Rca Corporation | Protection circuit for integrated circuit devices |
US4562454A (en) * | 1983-12-29 | 1985-12-31 | Motorola, Inc. | Electronic fuse for semiconductor devices |
KR900008746B1 (en) * | 1986-11-19 | 1990-11-29 | 삼성전자 주식회사 | Semiconductor device protecting a connection |
DE3835569A1 (en) * | 1988-10-19 | 1990-05-03 | Telefunken Electronic Gmbh | Protective arrangement |
DE4004526C1 (en) * | 1990-02-14 | 1991-09-05 | Texas Instruments Deutschland Gmbh, 8050 Freising, De | |
US5235489A (en) * | 1991-06-28 | 1993-08-10 | Sgs-Thomson Microelectronics, Inc. | Integrated solution to high voltage load dump conditions |
USD794465S1 (en) | 2015-08-28 | 2017-08-15 | The Procter & Gamble Company | Container |
USD793867S1 (en) | 2015-08-28 | 2017-08-08 | The Procter & Gamble Company | Container |
USD793250S1 (en) | 2015-09-07 | 2017-08-01 | The Procter & Gamble Company | Container |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2056808A (en) * | 1979-08-17 | 1981-03-18 | Lumenition Ltd | Power transistor protection |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3524113A (en) * | 1967-06-15 | 1970-08-11 | Ibm | Complementary pnp-npn transistors and fabrication method therefor |
DE1901075A1 (en) * | 1969-01-10 | 1970-08-13 | Bosch Gmbh Robert | Two-pole electrical switching element |
JPS55113358A (en) * | 1979-02-23 | 1980-09-01 | Hitachi Ltd | Semiconductor device |
-
1982
- 1982-01-19 IT IT19185/82A patent/IT1151504B/en active
- 1982-01-19 GB GB8201501A patent/GB2092377B/en not_active Expired
- 1982-01-22 FI FI820197A patent/FI74166C/en not_active IP Right Cessation
- 1982-01-22 DE DE19823201933 patent/DE3201933A1/en active Granted
- 1982-01-22 ES ES508976A patent/ES508976A0/en active Granted
- 1982-01-29 CA CA000395261A patent/CA1179406A/en not_active Expired
- 1982-01-29 FR FR828201502A patent/FR2499325B1/en not_active Expired
- 1982-01-30 KR KR8200403A patent/KR860000714B1/en not_active IP Right Cessation
-
1983
- 1983-03-08 ES ES520411A patent/ES8403245A1/en not_active Expired
-
1984
- 1984-05-31 GB GB08413887A patent/GB2141301B/en not_active Expired
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2056808A (en) * | 1979-08-17 | 1981-03-18 | Lumenition Ltd | Power transistor protection |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0515853A1 (en) * | 1991-05-13 | 1992-12-02 | Thomson Consumer Electronics, Inc. | Protection arrangement for an audio output channel |
US5224169A (en) * | 1991-05-13 | 1993-06-29 | Thomson Consumer Electronics, Inc. | Protection arrangement for an audio output channel |
TR26900A (en) * | 1991-05-13 | 1994-08-22 | Thomson Consumer Electronics | Protective device for the sound output channel of the television receiver. |
Also Published As
Publication number | Publication date |
---|---|
FI820197L (en) | 1982-07-31 |
FI74166C (en) | 1987-12-10 |
ES8307416A1 (en) | 1983-06-16 |
KR860000714B1 (en) | 1986-06-07 |
FR2499325B1 (en) | 1985-07-26 |
GB2092377B (en) | 1985-07-31 |
GB2141301B (en) | 1985-07-24 |
ES520411A0 (en) | 1984-03-01 |
DE3201933C2 (en) | 1987-01-08 |
FI74166B (en) | 1987-08-31 |
ES8403245A1 (en) | 1984-03-01 |
GB8413887D0 (en) | 1984-07-04 |
CA1179406A (en) | 1984-12-11 |
GB2092377A (en) | 1982-08-11 |
FR2499325A1 (en) | 1982-08-06 |
ES508976A0 (en) | 1983-06-16 |
KR830009654A (en) | 1983-12-22 |
IT1151504B (en) | 1986-12-24 |
IT8219185A0 (en) | 1982-01-19 |
DE3201933A1 (en) | 1982-08-12 |
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Effective date: 20020118 |