CA1161958A - Low resistance line - Google Patents

Low resistance line

Info

Publication number
CA1161958A
CA1161958A CA000348649A CA348649A CA1161958A CA 1161958 A CA1161958 A CA 1161958A CA 000348649 A CA000348649 A CA 000348649A CA 348649 A CA348649 A CA 348649A CA 1161958 A CA1161958 A CA 1161958A
Authority
CA
Canada
Prior art keywords
region
strip
insulating layer
doped
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000348649A
Other languages
English (en)
French (fr)
Inventor
Karlheinrich Horninger
Ulrich Schwabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Application granted granted Critical
Publication of CA1161958A publication Critical patent/CA1161958A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53271Conductive materials containing semiconductor material, e.g. polysilicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329Insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Solid State Image Pick-Up Elements (AREA)
CA000348649A 1979-03-30 1980-03-28 Low resistance line Expired CA1161958A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19792912858 DE2912858A1 (de) 1979-03-30 1979-03-30 Niederohmige leitung
DEP2912858.3 1979-03-30

Publications (1)

Publication Number Publication Date
CA1161958A true CA1161958A (en) 1984-02-07

Family

ID=6067014

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000348649A Expired CA1161958A (en) 1979-03-30 1980-03-28 Low resistance line

Country Status (4)

Country Link
EP (1) EP0023241B1 (enrdf_load_stackoverflow)
JP (1) JPS5664451A (enrdf_load_stackoverflow)
CA (1) CA1161958A (enrdf_load_stackoverflow)
DE (1) DE2912858A1 (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56126969A (en) * 1980-03-11 1981-10-05 Toshiba Corp Integrated circuit device
JP2765583B2 (ja) * 1988-10-20 1998-06-18 株式会社リコー 半導体メモリ装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2149705A1 (de) * 1970-10-06 1972-04-13 Motorola Inc Halbleiteranordnung und Verfahren zu ihrer Herstellung
GB1374009A (en) * 1971-08-09 1974-11-13 Ibm Information storage
US4060796A (en) * 1975-04-11 1977-11-29 Fujitsu Limited Semiconductor memory device
DE2543628C2 (de) * 1975-09-30 1987-05-07 Siemens AG, 1000 Berlin und 8000 München Halbleiterbauelement zum Speichern von Information in Form von elektrischen Ladungen, Verfahren zu seinem Betrieb und Informatiosspeicher mit solchen Halbleiterbauelementen
JPS52154377A (en) * 1976-06-18 1977-12-22 Hitachi Ltd Forming method for contact parts in part of shallow diffused layer
FR2380620A1 (fr) * 1977-02-09 1978-09-08 American Micro Syst Dispositifs a memoire morte programmable et procedes de fabrication s'y rapportant

Also Published As

Publication number Publication date
DE2912858C2 (enrdf_load_stackoverflow) 1987-08-27
EP0023241A3 (en) 1983-08-24
EP0023241A2 (de) 1981-02-04
DE2912858A1 (de) 1980-10-09
EP0023241B1 (de) 1988-07-13
JPS5664451A (en) 1981-06-01

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Legal Events

Date Code Title Description
MKEX Expiry