CA1134952A - Means and method within a digital processing system for prefetching both operation codes and operands - Google Patents

Means and method within a digital processing system for prefetching both operation codes and operands

Info

Publication number
CA1134952A
CA1134952A CA000344774A CA344774A CA1134952A CA 1134952 A CA1134952 A CA 1134952A CA 000344774 A CA000344774 A CA 000344774A CA 344774 A CA344774 A CA 344774A CA 1134952 A CA1134952 A CA 1134952A
Authority
CA
Canada
Prior art keywords
operand
opcode
instruction
processor
instruction word
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000344774A
Other languages
English (en)
French (fr)
Inventor
Thomas E. Kloos
Richard A. Springer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tektronix Inc
Original Assignee
Tektronix Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tektronix Inc filed Critical Tektronix Inc
Application granted granted Critical
Publication of CA1134952A publication Critical patent/CA1134952A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
  • Devices For Executing Special Programs (AREA)
CA000344774A 1979-04-24 1980-01-31 Means and method within a digital processing system for prefetching both operation codes and operands Expired CA1134952A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US3284279A 1979-04-24 1979-04-24
US32,842 1979-04-24

Publications (1)

Publication Number Publication Date
CA1134952A true CA1134952A (en) 1982-11-02

Family

ID=21867110

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000344774A Expired CA1134952A (en) 1979-04-24 1980-01-31 Means and method within a digital processing system for prefetching both operation codes and operands

Country Status (6)

Country Link
JP (1) JPS5815810B2 (de)
CA (1) CA1134952A (de)
DE (1) DE3015876A1 (de)
FR (1) FR2455316A1 (de)
GB (1) GB2047928A (de)
NL (1) NL8001189A (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5053941A (en) * 1986-08-29 1991-10-01 Sun Microsystems, Inc. Asynchronous micro-machine/interface

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4541045A (en) * 1981-09-21 1985-09-10 Racal-Milgo, Inc. Microprocessor architecture employing efficient operand and instruction addressing
JPS5858653A (ja) * 1981-10-02 1983-04-07 Hitachi Ltd デ−タ処理装置
JPH0776917B2 (ja) * 1984-12-29 1995-08-16 ソニー株式会社 マイクロコンピユ−タ
US4722047A (en) * 1985-08-29 1988-01-26 Ncr Corporation Prefetch circuit and associated method for operation with a virtual command emulator
US5919256A (en) * 1996-03-26 1999-07-06 Advanced Micro Devices, Inc. Operand cache addressed by the instruction address for reducing latency of read instruction

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3840861A (en) * 1972-10-30 1974-10-08 Amdahl Corp Data processing system having an instruction pipeline for concurrently processing a plurality of instructions
JPS50128948A (de) * 1974-03-29 1975-10-11
FR2298138A1 (fr) * 1975-01-16 1976-08-13 Int Computers Ltd Processeur de donnees en mode pipeline
JPS51111026A (en) * 1975-03-26 1976-10-01 Hitachi Ltd Information management equipment

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5053941A (en) * 1986-08-29 1991-10-01 Sun Microsystems, Inc. Asynchronous micro-machine/interface

Also Published As

Publication number Publication date
JPS55143654A (en) 1980-11-10
JPS5815810B2 (ja) 1983-03-28
GB2047928A (en) 1980-12-03
NL8001189A (nl) 1980-10-28
DE3015876A1 (de) 1980-10-30
FR2455316A1 (fr) 1980-11-21

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Legal Events

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