CA1092722A - Bi-polar integrated circuit structure and method of fabricating same - Google Patents
Bi-polar integrated circuit structure and method of fabricating sameInfo
- Publication number
- CA1092722A CA1092722A CA287,816A CA287816A CA1092722A CA 1092722 A CA1092722 A CA 1092722A CA 287816 A CA287816 A CA 287816A CA 1092722 A CA1092722 A CA 1092722A
- Authority
- CA
- Canada
- Prior art keywords
- transistor
- region
- collector
- conductivity type
- base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000004519 manufacturing process Methods 0.000 title description 17
- 239000004065 semiconductor Substances 0.000 claims description 75
- 239000000463 material Substances 0.000 claims description 15
- 230000004044 response Effects 0.000 claims description 9
- 239000000969 carrier Substances 0.000 claims description 6
- 239000004020 conductor Substances 0.000 abstract description 3
- 238000002347 injection Methods 0.000 description 42
- 239000007924 injection Substances 0.000 description 42
- 238000000034 method Methods 0.000 description 30
- 239000010410 layer Substances 0.000 description 24
- 230000008569 process Effects 0.000 description 21
- 230000000873 masking effect Effects 0.000 description 14
- 238000002955 isolation Methods 0.000 description 11
- 230000008901 benefit Effects 0.000 description 10
- 238000009792 diffusion process Methods 0.000 description 9
- 238000009413 insulation Methods 0.000 description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 238000013461 design Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 238000000926 separation method Methods 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 230000010354 integration Effects 0.000 description 4
- 238000010405 reoxidation reaction Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000011161 development Methods 0.000 description 3
- 230000018109 developmental process Effects 0.000 description 3
- 238000005065 mining Methods 0.000 description 3
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 208000031872 Body Remains Diseases 0.000 description 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 241000283986 Lepus Species 0.000 description 1
- 241001274197 Scatophagus argus Species 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000009432 framing Methods 0.000 description 1
- 239000003112 inhibitor Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 150000002736 metal compounds Chemical class 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 239000000123 paper Substances 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/63—Combinations of vertical and lateral BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/65—Integrated injection logic
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/038—Diffusions-staged
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/106—Masks, special
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/167—Two diffusions in one hole
Landscapes
- Bipolar Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
- Element Separation (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE2652103A DE2652103C2 (de) | 1976-11-16 | 1976-11-16 | Integrierte Halbleiteranordnung für ein logisches Schaltungskonzept und Verfahren zu ihrer Herstellung |
| DEP2652103.9 | 1976-11-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1092722A true CA1092722A (en) | 1980-12-30 |
Family
ID=5993241
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA287,816A Expired CA1092722A (en) | 1976-11-16 | 1977-09-29 | Bi-polar integrated circuit structure and method of fabricating same |
Country Status (15)
| Country | Link |
|---|---|
| US (1) | US4158783A (ref) |
| JP (1) | JPS5363874A (ref) |
| AT (1) | AT382261B (ref) |
| BE (1) | BE859759A (ref) |
| BR (1) | BR7707519A (ref) |
| CA (1) | CA1092722A (ref) |
| DD (1) | DD137771A5 (ref) |
| DE (1) | DE2652103C2 (ref) |
| ES (1) | ES464138A1 (ref) |
| FR (1) | FR2371063A1 (ref) |
| GB (1) | GB1592334A (ref) |
| IT (1) | IT1115741B (ref) |
| NL (1) | NL7711778A (ref) |
| SE (1) | SE7712741L (ref) |
| SU (1) | SU912065A3 (ref) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4199776A (en) * | 1978-08-24 | 1980-04-22 | Rca Corporation | Integrated injection logic with floating reinjectors |
| JPS55170895U (ref) * | 1979-05-26 | 1980-12-08 | ||
| US4338622A (en) * | 1979-06-29 | 1982-07-06 | International Business Machines Corporation | Self-aligned semiconductor circuits and process therefor |
| US4794277A (en) * | 1986-01-13 | 1988-12-27 | Unitrode Corporation | Integrated circuit under-voltage lockout |
| US5177029A (en) * | 1989-03-28 | 1993-01-05 | Matsushita Electric Works, Ltd. | Method for manufacturing static induction type semiconductor device enhancement mode power |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL7107040A (ref) * | 1971-05-22 | 1972-11-24 | ||
| NL7200294A (ref) * | 1972-01-08 | 1973-07-10 | ||
| US3919005A (en) * | 1973-05-07 | 1975-11-11 | Fairchild Camera Instr Co | Method for fabricating double-diffused, lateral transistor |
| US3959809A (en) * | 1974-05-10 | 1976-05-25 | Signetics Corporation | High inverse gain transistor |
| DE2446649A1 (de) * | 1974-09-30 | 1976-04-15 | Siemens Ag | Bipolare logikschaltung |
| US3993513A (en) * | 1974-10-29 | 1976-11-23 | Fairchild Camera And Instrument Corporation | Combined method for fabricating oxide-isolated vertical bipolar transistors and complementary oxide-isolated lateral bipolar transistors and the resulting structures |
| US4058419A (en) * | 1974-12-27 | 1977-11-15 | Tokyo Shibaura Electric, Co., Ltd. | Method of manufacturing integrated injection logic semiconductor devices utilizing self-aligned double-diffusion techniques |
| DE2509530C2 (de) * | 1975-03-05 | 1985-05-23 | Ibm Deutschland Gmbh, 7000 Stuttgart | Halbleiteranordnung für die Grundbausteine eines hochintegrierbaren logischen Halbleiterschaltungskonzepts basierend auf Mehrfachkollektor-Umkehrtransistoren |
-
1976
- 1976-11-16 DE DE2652103A patent/DE2652103C2/de not_active Expired
-
1977
- 1977-07-01 AT AT0470677A patent/AT382261B/de not_active IP Right Cessation
- 1977-08-10 US US05/823,314 patent/US4158783A/en not_active Expired - Lifetime
- 1977-09-29 CA CA287,816A patent/CA1092722A/en not_active Expired
- 1977-09-29 FR FR7729891A patent/FR2371063A1/fr active Granted
- 1977-10-14 BE BE181772A patent/BE859759A/xx not_active IP Right Cessation
- 1977-10-19 JP JP12464977A patent/JPS5363874A/ja active Granted
- 1977-10-25 IT IT28930/77A patent/IT1115741B/it active
- 1977-10-27 NL NL7711778A patent/NL7711778A/xx not_active Application Discontinuation
- 1977-11-02 GB GB45634/77A patent/GB1592334A/en not_active Expired
- 1977-11-09 BR BR7707519A patent/BR7707519A/pt unknown
- 1977-11-10 SE SE7712741A patent/SE7712741L/xx not_active Application Discontinuation
- 1977-11-14 DD DD77206078A patent/DD137771A5/xx unknown
- 1977-11-15 SU SU772542550A patent/SU912065A3/ru active
- 1977-11-15 ES ES464138A patent/ES464138A1/es not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| FR2371063A1 (fr) | 1978-06-09 |
| FR2371063B1 (ref) | 1980-08-01 |
| JPS5363874A (en) | 1978-06-07 |
| NL7711778A (nl) | 1978-05-18 |
| ES464138A1 (es) | 1978-12-16 |
| IT1115741B (it) | 1986-02-03 |
| JPS5615589B2 (ref) | 1981-04-10 |
| DD137771A5 (de) | 1979-09-19 |
| DE2652103A1 (de) | 1978-05-24 |
| DE2652103C2 (de) | 1982-10-28 |
| SU912065A3 (ru) | 1982-03-07 |
| US4158783A (en) | 1979-06-19 |
| SE7712741L (sv) | 1978-05-17 |
| BR7707519A (pt) | 1978-08-01 |
| ATA470677A (de) | 1986-06-15 |
| GB1592334A (en) | 1981-07-08 |
| BE859759A (fr) | 1978-02-01 |
| AT382261B (de) | 1987-02-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US3904450A (en) | Method of fabricating injection logic integrated circuits using oxide isolation | |
| US4160988A (en) | Integrated injection logic (I-squared L) with double-diffused type injector | |
| US4826780A (en) | Method of making bipolar transistors | |
| US4613886A (en) | CMOS static memory cell | |
| US4066473A (en) | Method of fabricating high-gain transistors | |
| US6798037B2 (en) | Isolation trench structure for integrated devices | |
| US5565701A (en) | Integrated circuit with vertical bipolar power transistors and isolated lateral bipolar control transistors | |
| CA1205574A (en) | Ion implanted memory cells for high density ram | |
| US4296428A (en) | Merged field effect transistor circuit and fabrication process | |
| US4458262A (en) | CMOS Device with ion-implanted channel-stop region and fabrication method therefor | |
| US3575741A (en) | Method for producing semiconductor integrated circuit device and product produced thereby | |
| GB1563863A (en) | Igfet inverters and methods of fabrication thereof | |
| US3978515A (en) | Integrated injection logic using oxide isolation | |
| GB1580471A (en) | Semi-conductor integrated circuits | |
| US3770519A (en) | Isolation diffusion method for making reduced beta transistor or diodes | |
| CA1092722A (en) | Bi-polar integrated circuit structure and method of fabricating same | |
| KR19980066427A (ko) | 반도체 장치 및 그 제조 방법 | |
| US3596149A (en) | Semiconductor integrated circuit with reduced minority carrier storage effect | |
| US4724221A (en) | High-speed, low-power-dissipation integrated circuits | |
| Blatt et al. | Substrate fed logic | |
| US5369046A (en) | Method for forming a gate array base cell | |
| US4149177A (en) | Method of fabricating conductive buried regions in integrated circuits and the resulting structures | |
| US5023194A (en) | Method of making a multicollector vertical pnp transistor | |
| WO1986000755A1 (en) | Integrated circuit having buried oxide isolation and low resistivity substrate for power supply interconnection | |
| US4118728A (en) | Integrated circuit structures utilizing conductive buried regions |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MKEX | Expiry |