CA1001322A - Integrated circuit layouts - Google Patents

Integrated circuit layouts

Info

Publication number
CA1001322A
CA1001322A CA191,083A CA191083A CA1001322A CA 1001322 A CA1001322 A CA 1001322A CA 191083 A CA191083 A CA 191083A CA 1001322 A CA1001322 A CA 1001322A
Authority
CA
Canada
Prior art keywords
integrated circuit
circuit layouts
layouts
integrated
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA191,083A
Other languages
English (en)
Other versions
CA191083S (en
Inventor
Karl Wagner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of CA1001322A publication Critical patent/CA1001322A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096Synchronous circuits, i.e. using clock signals
    • H03K19/0963Synchronous circuits, i.e. using clock signals using transistors of complementary type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0207Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/082Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
    • H01L27/0823Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only including vertical bipolar transistors only
    • H01L27/0826Combination of vertical complementary transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
CA191,083A 1973-02-01 1974-01-28 Integrated circuit layouts Expired CA1001322A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NLAANVRAGE7301433,A NL176029C (nl) 1973-02-01 1973-02-01 Geintegreerde logische schakeling met komplementaire transistoren.

Publications (1)

Publication Number Publication Date
CA1001322A true CA1001322A (en) 1976-12-07

Family

ID=19818127

Family Applications (1)

Application Number Title Priority Date Filing Date
CA191,083A Expired CA1001322A (en) 1973-02-01 1974-01-28 Integrated circuit layouts

Country Status (11)

Country Link
US (1) US4965651A (fr)
JP (2) JPS5634093B2 (fr)
AT (1) AT359560B (fr)
CA (1) CA1001322A (fr)
CH (1) CH568658A5 (fr)
DE (1) DE2403019A1 (fr)
FR (1) FR2216679B1 (fr)
GB (1) GB1460961A (fr)
IT (1) IT1007147B (fr)
NL (1) NL176029C (fr)
SE (1) SE401292B (fr)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51146195A (en) * 1975-06-11 1976-12-15 Fujitsu Ltd Diode device
DE2823555A1 (de) * 1977-05-31 1978-12-07 Fujitsu Ltd Zellenfoermige integrierte schaltung
US4295149A (en) * 1978-12-29 1981-10-13 International Business Machines Corporation Master image chip organization technique or method
JPS59162354A (ja) * 1983-03-08 1984-09-13 Nissan Motor Co Ltd 燃料フイルタ−
US4591993A (en) * 1983-11-21 1986-05-27 International Business Machines Corporation Methodology for making logic circuits
US4569032A (en) * 1983-12-23 1986-02-04 At&T Bell Laboratories Dynamic CMOS logic circuits for implementing multiple AND-functions
JPH0681040B2 (ja) * 1984-02-24 1994-10-12 株式会社日立製作所 論理演算回路
JPH0727629Y2 (ja) * 1987-05-14 1995-06-21 日本電気株式会社 スタンダ−ドセル方式の集積回路
JP3093771B2 (ja) * 1990-03-22 2000-10-03 沖電気工業株式会社 半導体記憶装置
US5055716A (en) * 1990-05-15 1991-10-08 Siarc Basic cell for bicmos gate array
US5289021A (en) * 1990-05-15 1994-02-22 Siarc Basic cell architecture for mask programmable gate array with 3 or more size transistors
JPH0828120B2 (ja) * 1990-05-23 1996-03-21 株式会社東芝 アドレスデコード回路
US5325338A (en) * 1991-09-04 1994-06-28 Advanced Micro Devices, Inc. Dual port memory, such as used in color lookup tables for video systems
US5311395A (en) * 1992-10-29 1994-05-10 Ncr Corporation Surface mount heat sink
US5874754A (en) * 1993-07-01 1999-02-23 Lsi Logic Corporation Microelectronic cells with bent gates and compressed minimum spacings, and method of patterning interconnections for the gates
US5440154A (en) * 1993-07-01 1995-08-08 Lsi Logic Corporation Non-rectangular MOS device configurations for gate array type integrated circuits
US5440153A (en) * 1994-04-01 1995-08-08 United Technologies Corporation Array architecture with enhanced routing for linear asics
US5798541A (en) * 1994-12-02 1998-08-25 Intel Corporation Standard semiconductor cell with contoured cell boundary to increase device density
US5768146A (en) * 1995-03-28 1998-06-16 Intel Corporation Method of cell contouring to increase device density
TW310470B (fr) * 1995-05-01 1997-07-11 Micron Technology Inc
JP3432963B2 (ja) * 1995-06-15 2003-08-04 沖電気工業株式会社 半導体集積回路
US6150687A (en) 1997-07-08 2000-11-21 Micron Technology, Inc. Memory cell having a vertical transistor with buried source/drain and dual gates
US6191470B1 (en) 1997-07-08 2001-02-20 Micron Technology, Inc. Semiconductor-on-insulator memory cell with buried word and body lines
US6528837B2 (en) * 1997-10-06 2003-03-04 Micron Technology, Inc. Circuit and method for an open bit line memory cell with a vertical transistor and trench plate trench capacitor
US6066869A (en) 1997-10-06 2000-05-23 Micron Technology, Inc. Circuit and method for a folded bit line memory cell with vertical transistor and trench capacitor
US5907170A (en) 1997-10-06 1999-05-25 Micron Technology, Inc. Circuit and method for an open bit line memory cell with a vertical transistor and trench plate trench capacitor
US5914511A (en) * 1997-10-06 1999-06-22 Micron Technology, Inc. Circuit and method for a folded bit line memory using trench plate capacitor cells with body bias contacts
US6025225A (en) 1998-01-22 2000-02-15 Micron Technology, Inc. Circuits with a trench capacitor having micro-roughened semiconductor surfaces and methods for forming the same
US5963469A (en) 1998-02-24 1999-10-05 Micron Technology, Inc. Vertical bipolar read access for low voltage memory cell
US6124729A (en) 1998-02-27 2000-09-26 Micron Technology, Inc. Field programmable logic arrays with vertical transistors
US5991225A (en) 1998-02-27 1999-11-23 Micron Technology, Inc. Programmable memory address decode array with vertical transistors
US6134175A (en) * 1998-08-04 2000-10-17 Micron Technology, Inc. Memory address decode array with vertical transistors
US6208164B1 (en) * 1998-08-04 2001-03-27 Micron Technology, Inc. Programmable logic array with vertical transistors
WO2004015744A2 (fr) * 2002-08-09 2004-02-19 Leopard Logic, Inc. Architecture d'interconnexion par trous de passage pour matrice prediffusee programmable
JP5552775B2 (ja) 2009-08-28 2014-07-16 ソニー株式会社 半導体集積回路
JP7004038B2 (ja) * 2020-07-28 2022-01-21 ソニーグループ株式会社 半導体集積回路

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3356858A (en) * 1963-06-18 1967-12-05 Fairchild Camera Instr Co Low stand-by power complementary field effect circuitry
US3641405A (en) * 1967-10-13 1972-02-08 Gen Electric Field-effect transistors with superior passivating films and method of making same
US3646665A (en) * 1970-05-22 1972-03-07 Gen Electric Complementary mis-fet devices and method of fabrication
NL173110C (nl) * 1971-03-17 1983-12-01 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een uit ten minste twee deellagen van verschillend materiaal samengestelde maskeringslaag wordt aangebracht.

Also Published As

Publication number Publication date
CH568658A5 (fr) 1975-10-31
JPS5853508B2 (ja) 1983-11-29
NL176029C (nl) 1985-02-01
FR2216679A1 (fr) 1974-08-30
IT1007147B (it) 1976-10-30
JPS56124256A (en) 1981-09-29
AT359560B (de) 1980-11-25
NL176029B (nl) 1984-09-03
AU6492174A (en) 1975-07-31
DE2403019C2 (fr) 1989-09-21
JPS49111589A (fr) 1974-10-24
JPS5634093B2 (fr) 1981-08-07
US4965651A (en) 1990-10-23
NL7301433A (fr) 1974-08-05
DE2403019A1 (de) 1974-08-15
GB1460961A (en) 1977-01-06
FR2216679B1 (fr) 1977-03-04
SE401292B (sv) 1978-04-24
ATA69274A (de) 1980-04-15

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