BR9915060A - Método e aparelho para gerenciamento de potência em um subsistema de memória - Google Patents
Método e aparelho para gerenciamento de potência em um subsistema de memóriaInfo
- Publication number
- BR9915060A BR9915060A BR9915060-3A BR9915060A BR9915060A BR 9915060 A BR9915060 A BR 9915060A BR 9915060 A BR9915060 A BR 9915060A BR 9915060 A BR9915060 A BR 9915060A
- Authority
- BR
- Brazil
- Prior art keywords
- group
- memory
- power management
- memory subsystem
- grouped
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
- G06F1/3215—Monitoring of peripheral devices
- G06F1/3225—Monitoring of peripheral devices of memory devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/325—Power saving in peripheral device
- G06F1/3275—Power saving in memory, e.g. RAM, cache
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Power Sources (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
Patente de Invenção: <B>"MéTODO E APARELHO PARA GERENCIAMENTO DE POTêNCIA EM UM SUBSISTEMA DE MEMóRIA"<D>. De acordo com uma modalidade, a presente invenção descreve um método para gerenciar a potência em sistema de memória. O sistema de memória inclui uma pluralidade de dispositivos de memória (310, 350). Cada um dos dispositivos de memória está agrupado em um primeiro grupo ou um segundo grupo (314, 318). Primeiramente, o acesso a um dispositivo de memória está localizado no primeiro grupo. Se o dispositivo de memória solicitado não estiver localizado dentro do primeiro grupo (420), é determinado se o primeiro grupo está cheio até a sua capacidade (440). Se o primeiro grupo não estiver cheio até a sua capacidade, o dispositivo de memória solicitado é transferido para o primeiro grupo (450). De acordo com uma modalidade adicional cada um dos dispositivos de memória agrupados no primeiro grupo está adicionalmente agrupado em um primeiro subgrupo ou em um segundo subgrupo.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/187,565 US6442698B2 (en) | 1998-11-04 | 1998-11-04 | Method and apparatus for power management in a memory subsystem |
PCT/US1999/025945 WO2000026755A1 (en) | 1998-11-04 | 1999-11-03 | Method and apparatus for power management in a memory subsystem |
Publications (1)
Publication Number | Publication Date |
---|---|
BR9915060A true BR9915060A (pt) | 2001-08-07 |
Family
ID=22689486
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR9915060-3A BR9915060A (pt) | 1998-11-04 | 1999-11-03 | Método e aparelho para gerenciamento de potência em um subsistema de memória |
Country Status (9)
Country | Link |
---|---|
US (2) | US6442698B2 (pt) |
EP (1) | EP1127308B1 (pt) |
CN (1) | CN100430865C (pt) |
AU (1) | AU1466600A (pt) |
BR (1) | BR9915060A (pt) |
DE (1) | DE69941577D1 (pt) |
HK (1) | HK1036665A1 (pt) |
TW (1) | TW484051B (pt) |
WO (1) | WO2000026755A1 (pt) |
Families Citing this family (67)
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JP4265850B2 (ja) * | 2000-01-17 | 2009-05-20 | 富士通株式会社 | 移動体交換機、ホームメモリ・ノード装置および関門交換機 |
US6633987B2 (en) * | 2000-03-24 | 2003-10-14 | Intel Corporation | Method and apparatus to implement the ACPI(advanced configuration and power interface) C3 state in a RDRAM based system |
US6691237B1 (en) * | 2000-08-08 | 2004-02-10 | Dell Products, L.P. | Active memory pool management policies |
US6925529B2 (en) * | 2001-07-12 | 2005-08-02 | International Business Machines Corporation | Data storage on a multi-tiered disk system |
US6820169B2 (en) * | 2001-09-25 | 2004-11-16 | Intel Corporation | Memory control with lookahead power management |
US20030097519A1 (en) * | 2001-11-21 | 2003-05-22 | Yoon Ha Ryong | Memory subsystem |
US7103730B2 (en) * | 2002-04-09 | 2006-09-05 | Intel Corporation | Method, system, and apparatus for reducing power consumption of a memory |
US7028200B2 (en) * | 2002-05-15 | 2006-04-11 | Broadcom Corporation | Method and apparatus for adaptive power management of memory subsystem |
US7051174B2 (en) * | 2002-09-24 | 2006-05-23 | International Business Machines Corporation | Method, system, and program for restoring data in cache |
US6853603B1 (en) * | 2004-03-09 | 2005-02-08 | Altera Corporation | Programmable logic device having nonvolatile memory with user selectable power consumption |
US7272728B2 (en) * | 2004-06-14 | 2007-09-18 | Iovation, Inc. | Network security and fraud detection system and method |
US7389375B2 (en) * | 2004-07-30 | 2008-06-17 | International Business Machines Corporation | System, method and storage medium for a multi-mode memory buffer device |
US20060036826A1 (en) * | 2004-07-30 | 2006-02-16 | International Business Machines Corporation | System, method and storage medium for providing a bus speed multiplier |
US7224595B2 (en) | 2004-07-30 | 2007-05-29 | International Business Machines Corporation | 276-Pin buffered memory module with enhanced fault tolerance |
US7296129B2 (en) | 2004-07-30 | 2007-11-13 | International Business Machines Corporation | System, method and storage medium for providing a serialized memory interface with a bus repeater |
US7512762B2 (en) | 2004-10-29 | 2009-03-31 | International Business Machines Corporation | System, method and storage medium for a memory subsystem with positional read data latency |
US7305574B2 (en) * | 2004-10-29 | 2007-12-04 | International Business Machines Corporation | System, method and storage medium for bus calibration in a memory subsystem |
US7331010B2 (en) | 2004-10-29 | 2008-02-12 | International Business Machines Corporation | System, method and storage medium for providing fault detection and correction in a memory subsystem |
US7395476B2 (en) | 2004-10-29 | 2008-07-01 | International Business Machines Corporation | System, method and storage medium for providing a high speed test interface to a memory subsystem |
US7299313B2 (en) | 2004-10-29 | 2007-11-20 | International Business Machines Corporation | System, method and storage medium for a memory subsystem command interface |
US7356737B2 (en) | 2004-10-29 | 2008-04-08 | International Business Machines Corporation | System, method and storage medium for testing a memory module |
US7277988B2 (en) * | 2004-10-29 | 2007-10-02 | International Business Machines Corporation | System, method and storage medium for providing data caching and data compression in a memory subsystem |
GB2426360A (en) * | 2005-05-18 | 2006-11-22 | Symbian Software Ltd | Reorganisation of memory for conserving power in a computing device |
US7386656B2 (en) | 2006-07-31 | 2008-06-10 | Metaram, Inc. | Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit |
US9542352B2 (en) | 2006-02-09 | 2017-01-10 | Google Inc. | System and method for reducing command scheduling constraints of memory circuits |
US20080028136A1 (en) | 2006-07-31 | 2008-01-31 | Schakel Keith R | Method and apparatus for refresh management of memory modules |
US8335894B1 (en) | 2008-07-25 | 2012-12-18 | Google Inc. | Configurable memory system with interface circuit |
US8060774B2 (en) | 2005-06-24 | 2011-11-15 | Google Inc. | Memory systems and memory modules |
US8244971B2 (en) | 2006-07-31 | 2012-08-14 | Google Inc. | Memory circuit system and method |
US10013371B2 (en) | 2005-06-24 | 2018-07-03 | Google Llc | Configurable memory circuit system and method |
US8359187B2 (en) | 2005-06-24 | 2013-01-22 | Google Inc. | Simulating a different number of memory circuit devices |
US9507739B2 (en) | 2005-06-24 | 2016-11-29 | Google Inc. | Configurable memory circuit system and method |
US8055833B2 (en) | 2006-10-05 | 2011-11-08 | Google Inc. | System and method for increasing capacity, performance, and flexibility of flash storage |
US8090897B2 (en) | 2006-07-31 | 2012-01-03 | Google Inc. | System and method for simulating an aspect of a memory circuit |
US8438328B2 (en) | 2008-02-21 | 2013-05-07 | Google Inc. | Emulation of abstracted DIMMs using abstracted DRAMs |
US8397013B1 (en) | 2006-10-05 | 2013-03-12 | Google Inc. | Hybrid memory module |
US7472220B2 (en) | 2006-07-31 | 2008-12-30 | Metaram, Inc. | Interface circuit system and method for performing power management operations utilizing power management signals |
US8089795B2 (en) | 2006-02-09 | 2012-01-03 | Google Inc. | Memory module with memory stack and interface with enhanced capabilities |
US8386722B1 (en) | 2008-06-23 | 2013-02-26 | Google Inc. | Stacked DIMM memory interface |
US8111566B1 (en) | 2007-11-16 | 2012-02-07 | Google, Inc. | Optimal channel design for memory devices for providing a high-speed memory interface |
US8077535B2 (en) | 2006-07-31 | 2011-12-13 | Google Inc. | Memory refresh apparatus and method |
US20080082763A1 (en) | 2006-10-02 | 2008-04-03 | Metaram, Inc. | Apparatus and method for power management of memory circuits by a system or component thereof |
US8796830B1 (en) | 2006-09-01 | 2014-08-05 | Google Inc. | Stackable low-profile lead frame package |
US8130560B1 (en) | 2006-11-13 | 2012-03-06 | Google Inc. | Multi-rank partial width memory modules |
US9171585B2 (en) | 2005-06-24 | 2015-10-27 | Google Inc. | Configurable memory circuit system and method |
US7392338B2 (en) | 2006-07-31 | 2008-06-24 | Metaram, Inc. | Interface circuit system and method for autonomously performing power management operations in conjunction with a plurality of memory circuits |
US8041881B2 (en) | 2006-07-31 | 2011-10-18 | Google Inc. | Memory device with emulated characteristics |
US8327104B2 (en) | 2006-07-31 | 2012-12-04 | Google Inc. | Adjusting the timing of signals associated with a memory system |
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JP5242397B2 (ja) | 2005-09-02 | 2013-07-24 | メタラム インコーポレイテッド | Dramをスタックする方法及び装置 |
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US7669086B2 (en) | 2006-08-02 | 2010-02-23 | International Business Machines Corporation | Systems and methods for providing collision detection in a memory system |
US7539842B2 (en) | 2006-08-15 | 2009-05-26 | International Business Machines Corporation | Computer memory system for selecting memory buses according to physical memory organization information stored in virtual address translation tables |
US7490217B2 (en) | 2006-08-15 | 2009-02-10 | International Business Machines Corporation | Design structure for selecting memory busses according to physical memory organization information stored in virtual address translation tables |
US7870459B2 (en) * | 2006-10-23 | 2011-01-11 | International Business Machines Corporation | High density high reliability memory module with power gating and a fault tolerant address and command bus |
US7721140B2 (en) | 2007-01-02 | 2010-05-18 | International Business Machines Corporation | Systems and methods for improving serviceability of a memory system |
US8209479B2 (en) | 2007-07-18 | 2012-06-26 | Google Inc. | Memory circuit system and method |
US8080874B1 (en) | 2007-09-14 | 2011-12-20 | Google Inc. | Providing additional space between an integrated circuit and a circuit board for positioning a component therebetween |
US9105323B2 (en) | 2009-01-23 | 2015-08-11 | Micron Technology, Inc. | Memory device power managers and methods |
EP2441007A1 (en) | 2009-06-09 | 2012-04-18 | Google, Inc. | Programming of dimm termination resistance values |
US9368214B2 (en) | 2013-10-03 | 2016-06-14 | Apple Inc. | Programmable peak-current control in non-volatile memory devices |
US10379748B2 (en) * | 2016-12-19 | 2019-08-13 | International Business Machines Corporation | Predictive scheduler for memory rank switching |
CN111459261A (zh) * | 2020-04-03 | 2020-07-28 | 北京云宽志业网络技术有限公司 | 磁盘唤醒方法、装置、电子设备及存储介质 |
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JPH04143819A (ja) * | 1989-12-15 | 1992-05-18 | Hitachi Ltd | 消費電力制御方法、半導体集積回路装置およびマイクロプロセツサ |
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-
1998
- 1998-11-04 US US09/187,565 patent/US6442698B2/en not_active Expired - Lifetime
- 1998-11-04 US US09/187,565 patent/US20020124195A1/en active Granted
-
1999
- 1999-10-08 TW TW088117430A patent/TW484051B/zh not_active IP Right Cessation
- 1999-11-03 WO PCT/US1999/025945 patent/WO2000026755A1/en active Application Filing
- 1999-11-03 AU AU14666/00A patent/AU1466600A/en not_active Abandoned
- 1999-11-03 CN CNB998154164A patent/CN100430865C/zh not_active Expired - Fee Related
- 1999-11-03 BR BR9915060-3A patent/BR9915060A/pt not_active Application Discontinuation
- 1999-11-03 EP EP99971533A patent/EP1127308B1/en not_active Expired - Lifetime
- 1999-11-03 DE DE69941577T patent/DE69941577D1/de not_active Expired - Lifetime
-
2001
- 2001-10-29 HK HK01107539.2A patent/HK1036665A1/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
WO2000026755A1 (en) | 2000-05-11 |
DE69941577D1 (de) | 2009-12-03 |
EP1127308B1 (en) | 2009-10-21 |
EP1127308A1 (en) | 2001-08-29 |
EP1127308A4 (en) | 2003-05-21 |
TW484051B (en) | 2002-04-21 |
AU1466600A (en) | 2000-05-22 |
US20020124195A1 (en) | 2002-09-05 |
US6442698B2 (en) | 2002-08-27 |
HK1036665A1 (en) | 2002-01-11 |
CN100430865C (zh) | 2008-11-05 |
CN1332864A (zh) | 2002-01-23 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
B06A | Patent application procedure suspended [chapter 6.1 patent gazette] | ||
B11B | Dismissal acc. art. 36, par 1 of ipl - no reply within 90 days to fullfil the necessary requirements |