BR8800289A - Circuito de funcao de sistema monitor de video grafico - Google Patents

Circuito de funcao de sistema monitor de video grafico

Info

Publication number
BR8800289A
BR8800289A BR8800289A BR8800289A BR8800289A BR 8800289 A BR8800289 A BR 8800289A BR 8800289 A BR8800289 A BR 8800289A BR 8800289 A BR8800289 A BR 8800289A BR 8800289 A BR8800289 A BR 8800289A
Authority
BR
Brazil
Prior art keywords
monitor system
system function
function circuit
video graphic
graphic monitor
Prior art date
Application number
BR8800289A
Other languages
English (en)
Inventor
Robert Mansfiedd
Alexander K Spencer
Joe C St Clair
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BR8800289A publication Critical patent/BR8800289A/pt

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/393—Arrangements for updating the contents of the bit-mapped memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/18—Timing circuits for raster scan displays

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Image Generation (AREA)
  • Controls And Circuits For Display Device (AREA)
BR8800289A 1987-02-12 1988-01-26 Circuito de funcao de sistema monitor de video grafico BR8800289A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/013,841 US4837563A (en) 1987-02-12 1987-02-12 Graphics display system function circuit

Publications (1)

Publication Number Publication Date
BR8800289A true BR8800289A (pt) 1988-09-06

Family

ID=21762055

Family Applications (1)

Application Number Title Priority Date Filing Date
BR8800289A BR8800289A (pt) 1987-02-12 1988-01-26 Circuito de funcao de sistema monitor de video grafico

Country Status (5)

Country Link
US (1) US4837563A (pt)
EP (1) EP0279225B1 (pt)
JP (1) JPH0769969B2 (pt)
BR (1) BR8800289A (pt)
DE (1) DE3889240T2 (pt)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5070465A (en) * 1987-02-25 1991-12-03 Sony Corporation Video image transforming method and apparatus
US5027291A (en) * 1987-11-24 1991-06-25 International Business Machines Corporation Application exit for potentially pickable primitives in a graphics system
JPH0679339B2 (ja) * 1988-04-11 1994-10-05 株式会社イーゼル 画像処理方法
US5367680A (en) * 1990-02-13 1994-11-22 International Business Machines Corporation Rendering context manager for display adapters supporting multiple domains
US5218674A (en) * 1990-09-14 1993-06-08 Hughes Aircraft Company Hardware bit block transfer operator in a graphics rendering processor
US5313576A (en) * 1990-11-23 1994-05-17 Network Computing Devices, Inc. Bit aligned data block transfer method and apparatus
US5345555A (en) * 1990-11-23 1994-09-06 Network Computing Devices, Inc. Image processor memory for expediting memory operations
US5293472A (en) * 1991-04-22 1994-03-08 International Business Machines Corporation Method of generating lines and curves of user specified thicknesses on a raster device
CA2127370C (en) * 1992-01-21 1999-02-23 Thomas Michael Albers Video graphics controller with improved calculation capabilities
US5613053A (en) 1992-01-21 1997-03-18 Compaq Computer Corporation Video graphics controller with automatic starting for line draws
US5280571A (en) * 1992-02-03 1994-01-18 Intel Corporation Method and apparatus for line drawing by interleaving multiple processors
US5371518A (en) * 1992-02-27 1994-12-06 Silicon Graphics, Inc. Video timing and display ID generator
JP3210141B2 (ja) * 1993-06-24 2001-09-17 松下電器産業株式会社 直線描画装置
US5668941A (en) * 1995-06-22 1997-09-16 Cirrus Logic, Inc. Optimum implementation of X-Y clipping on pixel boundary
KR100207541B1 (ko) * 1996-12-30 1999-07-15 윤종용 디지탈 비디오 디스크 롬 인터페이스 장치 및 방법
US5929872A (en) * 1997-03-21 1999-07-27 Alliance Semiconductor Corporation Method and apparatus for multiple compositing of source data in a graphics display processor
US6832717B1 (en) * 1999-05-25 2004-12-21 Silverbrook Research Pty Ltd Computer system interface surface
CN100423081C (zh) * 2004-12-03 2008-10-01 深圳迈瑞生物医疗电子股份有限公司 硬件加速显示水平线段的装置及其方法
US8854383B2 (en) * 2011-04-13 2014-10-07 Qualcomm Incorporated Pixel value compaction for graphics processing

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3764790A (en) * 1972-03-30 1973-10-09 Nasa Technique for extending the frequency range of digital dividers
US4272808A (en) * 1979-05-21 1981-06-09 Sperry Corporation Digital graphics generation system
US4458330A (en) * 1981-05-13 1984-07-03 Intergraph Corporation Banded vector to raster converter
JPS58205276A (ja) * 1982-05-26 1983-11-30 Hitachi Ltd 図形処理装置
JPS58209230A (ja) * 1982-05-31 1983-12-06 Toshiba Corp プログラマブルカウンタ
JPS59149526A (ja) * 1983-01-28 1984-08-27 Fujitsu Ltd フイ−ルド内文書編集処理装置
JPS60501575A (ja) * 1983-05-25 1985-09-19 ラムテック・コ−ポレ−ション ベクトル属性を発生させる方法および装置
DE3370090D1 (en) * 1983-06-30 1987-04-09 Ibm Programmable timing circuit for cathode ray tube
US4667306A (en) * 1983-07-20 1987-05-19 Ramtek Corporation Method and apparatus for generating surface-fill vectors
JPS6073682A (ja) * 1983-09-30 1985-04-25 株式会社東芝 グラフイツクメモリ内デ−タ転送方式
US4626839A (en) * 1983-11-15 1986-12-02 Motorola Inc. Programmable video display generator
US4644503A (en) * 1983-12-30 1987-02-17 International Business Machines Corporation Computer memory system with integrated parallel shift circuits
JPS619762A (ja) * 1984-06-25 1986-01-17 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション イメ−ジ処理装置
FR2574575B1 (fr) * 1984-12-11 1987-02-06 O Donnell Ciaran Processeur de trace de vecteur
JPS6211970A (ja) * 1985-07-09 1987-01-20 Nec Corp アドレス発生回路

Also Published As

Publication number Publication date
EP0279225A2 (en) 1988-08-24
US4837563A (en) 1989-06-06
DE3889240T2 (de) 1994-11-24
JPH0769969B2 (ja) 1995-07-31
EP0279225A3 (en) 1991-04-17
EP0279225B1 (en) 1994-04-27
DE3889240D1 (de) 1994-06-01
JPS63201790A (ja) 1988-08-19

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Legal Events

Date Code Title Description
B15K Others concerning applications: alteration of classification

Ipc: G09G 5/393 (2006.01), G09G 5/18 (2006.0