BR112018073104A2 - dispositivo, método e sistema de comunicação. - Google Patents
dispositivo, método e sistema de comunicação.Info
- Publication number
- BR112018073104A2 BR112018073104A2 BR112018073104-8A BR112018073104A BR112018073104A2 BR 112018073104 A2 BR112018073104 A2 BR 112018073104A2 BR 112018073104 A BR112018073104 A BR 112018073104A BR 112018073104 A2 BR112018073104 A2 BR 112018073104A2
- Authority
- BR
- Brazil
- Prior art keywords
- preamble
- communication device
- receiving unit
- error
- transmits
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0061—Error detection codes
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/10—Distribution of clock signals, e.g. skew
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
- G06F13/4291—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
- G06F11/1032—Simple parity
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0016—Inter-integrated circuit (I2C)
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/08—Arrangements for detecting or preventing errors in the information received by repeating transmission, e.g. Verdan system
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Quality & Reliability (AREA)
- Computer Security & Cryptography (AREA)
- Information Transfer Systems (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Communication Control (AREA)
- Hardware Redundancy (AREA)
- Debugging And Monitoring (AREA)
- Bus Control (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Small-Scale Networks (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2016099955A JP6786871B2 (ja) | 2016-05-18 | 2016-05-18 | 通信装置、通信方法、プログラム、および、通信システム |
| JP2016-099955 | 2016-05-18 | ||
| PCT/JP2017/017221 WO2017199761A1 (en) | 2016-05-18 | 2017-05-02 | Communication device, communication method, program, and communication system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| BR112018073104A2 true BR112018073104A2 (pt) | 2019-03-06 |
Family
ID=58745320
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BR112018073104-8A BR112018073104A2 (pt) | 2016-05-18 | 2017-05-02 | dispositivo, método e sistema de comunicação. |
Country Status (11)
| Country | Link |
|---|---|
| US (1) | US11791934B2 (https=) |
| EP (1) | EP3459190B1 (https=) |
| JP (1) | JP6786871B2 (https=) |
| KR (1) | KR102350137B1 (https=) |
| CN (1) | CN109075902B (https=) |
| BR (1) | BR112018073104A2 (https=) |
| ES (1) | ES2908672T3 (https=) |
| RU (1) | RU2741484C2 (https=) |
| SG (1) | SG11201808955PA (https=) |
| TW (1) | TWI753907B (https=) |
| WO (1) | WO2017199761A1 (https=) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6828271B2 (ja) * | 2016-05-18 | 2021-02-10 | ソニー株式会社 | 通信装置、通信方法、プログラム、および、通信システム |
| TWI811597B (zh) * | 2020-12-18 | 2023-08-11 | 新唐科技股份有限公司 | 恢復通訊界面中斷的方法及通訊界面控制器 |
Family Cites Families (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6356984B1 (en) | 1998-06-30 | 2002-03-12 | Sun Microsystems, Inc. | Digital data processing system having a data bus and a control bus |
| US6874052B1 (en) | 2000-09-29 | 2005-03-29 | Lucent Technologies Inc. | Expansion bridge apparatus and method for an I2C bus |
| DE60144025D1 (de) * | 2000-12-20 | 2011-03-24 | Thomson Licensing | I2c-bussteuerung zur isolierung ausgewählter ics für schnelle i2c-übertragung |
| US20030161324A1 (en) * | 2002-01-16 | 2003-08-28 | Aviom, Inc. | System and method for transmitting and reconstructing audio or video data using intelligent sample interleaving of transmitted data requiring fewer orders of interpolation to accurately reconstruct audio or video data at the receiver in the event of data lost |
| US7451381B2 (en) * | 2004-02-03 | 2008-11-11 | Phonex Broadband Corporation | Reliable method and system for efficiently transporting dynamic data across a network |
| JP4416543B2 (ja) * | 2004-03-10 | 2010-02-17 | パナソニック株式会社 | データ検出装置、および多チャンネルデータ検出装置 |
| KR100778114B1 (ko) * | 2006-09-18 | 2007-11-21 | 삼성전자주식회사 | 통신에러를 개선하기 위한 통신방법 및 그 통신방법이적용된 전자장치 |
| JP4962060B2 (ja) * | 2007-03-14 | 2012-06-27 | 富士通セミコンダクター株式会社 | パリティエラー復旧回路 |
| CN101541078B (zh) * | 2008-03-17 | 2012-11-21 | 华为技术有限公司 | 一种tdoa的估计方法、系统和装置 |
| US8194480B2 (en) * | 2009-11-19 | 2012-06-05 | Himax Technologies Limited | Method for initializing memory device |
| CN102263767B (zh) * | 2011-08-30 | 2013-12-18 | 北京北方烽火科技有限公司 | 应用于无线通信的帧同步、频偏估计方法与装置 |
| US8788756B2 (en) * | 2011-11-28 | 2014-07-22 | Xilinx, Inc. | Circuit for and method of enabling the transfer of data by an integrated circuit |
| JP6275427B2 (ja) * | 2013-09-06 | 2018-02-07 | 株式会社東芝 | メモリ制御回路およびキャッシュメモリ |
| US20150100711A1 (en) * | 2013-10-07 | 2015-04-09 | Qualcomm Incorporated | Low power camera control interface bus and devices |
| US9237467B2 (en) * | 2013-11-27 | 2016-01-12 | At&T Intellectual Property I, L.P. | Adaptive pacing of media content delivery over a wireless network |
| US20150248373A1 (en) | 2014-02-28 | 2015-09-03 | Qualcomm Incorporated | Bit allocation over a shared bus to facilitate an error detection optimization |
| US9734121B2 (en) | 2014-04-28 | 2017-08-15 | Qualcomm Incorporated | Sensors global bus |
| JP6534312B2 (ja) * | 2015-07-31 | 2019-06-26 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US20170255588A1 (en) * | 2016-03-07 | 2017-09-07 | Qualcomm Incorporated | Multiprotocol i3c common command codes |
| US11233582B2 (en) * | 2016-03-25 | 2022-01-25 | Lisnr, Inc. | Local tone generation |
| JP6971538B2 (ja) * | 2016-05-18 | 2021-11-24 | ソニーセミコンダクタソリューションズ株式会社 | 通信装置、通信方法、プログラム、および、通信システム |
| JP6828271B2 (ja) * | 2016-05-18 | 2021-02-10 | ソニー株式会社 | 通信装置、通信方法、プログラム、および、通信システム |
| JP6911282B2 (ja) * | 2016-05-18 | 2021-07-28 | ソニーグループ株式会社 | 通信装置、通信方法、プログラム、および、通信システム |
| JP6903645B2 (ja) * | 2016-05-18 | 2021-07-14 | ソニーセミコンダクタソリューションズ株式会社 | 通信装置、通信方法、プログラム、および、通信システム |
-
2016
- 2016-05-18 JP JP2016099955A patent/JP6786871B2/ja active Active
-
2017
- 2017-05-02 ES ES17724946T patent/ES2908672T3/es active Active
- 2017-05-02 CN CN201780028376.5A patent/CN109075902B/zh not_active Expired - Fee Related
- 2017-05-02 BR BR112018073104-8A patent/BR112018073104A2/pt not_active IP Right Cessation
- 2017-05-02 RU RU2018139479A patent/RU2741484C2/ru active
- 2017-05-02 EP EP17724946.3A patent/EP3459190B1/en active Active
- 2017-05-02 US US16/092,240 patent/US11791934B2/en active Active
- 2017-05-02 KR KR1020187031445A patent/KR102350137B1/ko active Active
- 2017-05-02 WO PCT/JP2017/017221 patent/WO2017199761A1/en not_active Ceased
- 2017-05-02 SG SG11201808955PA patent/SG11201808955PA/en unknown
- 2017-05-05 TW TW106114885A patent/TWI753907B/zh active
Also Published As
| Publication number | Publication date |
|---|---|
| SG11201808955PA (en) | 2018-11-29 |
| RU2741484C2 (ru) | 2021-01-26 |
| US11791934B2 (en) | 2023-10-17 |
| CN109075902A (zh) | 2018-12-21 |
| TW201741888A (zh) | 2017-12-01 |
| RU2018139479A (ru) | 2020-05-12 |
| CN109075902B (zh) | 2022-02-08 |
| EP3459190A1 (en) | 2019-03-27 |
| KR102350137B1 (ko) | 2022-01-14 |
| RU2018139479A3 (https=) | 2020-07-14 |
| ES2908672T3 (es) | 2022-05-03 |
| US20190097757A1 (en) | 2019-03-28 |
| JP6786871B2 (ja) | 2020-11-18 |
| JP2017208713A (ja) | 2017-11-24 |
| EP3459190B1 (en) | 2022-02-23 |
| TWI753907B (zh) | 2022-02-01 |
| KR20190008198A (ko) | 2019-01-23 |
| WO2017199761A1 (en) | 2017-11-23 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| B350 | Update of information on the portal [chapter 15.35 patent gazette] | ||
| B08F | Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette] |
Free format text: REFERENTE A 7A ANUIDADE. |
|
| B08K | Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette] |
Free format text: EM VIRTUDE DO ARQUIVAMENTO PUBLICADO NA RPI 2773 DE 27-02-2024 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDO O ARQUIVAMENTO DO PEDIDO DE PATENTE, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013. |