BR112018001162A2 - estrutura de sub-quadro duplex por divisão de tempo (tdd) que suporta modos de entrelaçamento único e múltiplo - Google Patents

estrutura de sub-quadro duplex por divisão de tempo (tdd) que suporta modos de entrelaçamento único e múltiplo

Info

Publication number
BR112018001162A2
BR112018001162A2 BR112018001162A BR112018001162A BR112018001162A2 BR 112018001162 A2 BR112018001162 A2 BR 112018001162A2 BR 112018001162 A BR112018001162 A BR 112018001162A BR 112018001162 A BR112018001162 A BR 112018001162A BR 112018001162 A2 BR112018001162 A2 BR 112018001162A2
Authority
BR
Brazil
Prior art keywords
tdd
subframe structure
time division
division duplex
modes
Prior art date
Application number
BR112018001162A
Other languages
English (en)
Inventor
Jiang Jing
Edward Smee John
Kiran Mukkavilli Krishna
Pui Lok Ang Peter
Ji Tingfang
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of BR112018001162A2 publication Critical patent/BR112018001162A2/pt

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/003—Arrangements for allocating sub-channels of the transmission path
    • H04L5/0053—Allocation of signaling, i.e. of overhead other than pilot signals
    • H04L5/0055—Physical resource allocation for ACK/NACK
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/14—Two-way operation using the same type of signal, i.e. duplex
    • H04L5/1469—Two-way operation using the same type of signal, i.e. duplex using time-sharing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W72/00—Local resource management
    • H04W72/12—Wireless traffic scheduling
    • H04W72/1263—Mapping of traffic onto schedule, e.g. scheduled allocation or multiplexing of flows
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/0001—Arrangements for dividing the transmission path
    • H04L5/0003—Two-dimensional division
    • H04L5/0005—Time-frequency
    • H04L5/0007—Time-frequency the frequencies being orthogonal, e.g. OFDM(A), DMT
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/003—Arrangements for allocating sub-channels of the transmission path
    • H04L5/0044—Arrangements for allocating sub-channels of the transmission path allocation of payload

Abstract

aspectos da presente invenção proporcionam uma estrutura de sub-quadro duplex por divisão de tempo (tdd) que suporta ambos modos de operação simples e múltiplos de operação. em um único modo de entrelaçamento, a informação de controle, as informações de dados correspondentes às informações de controle e informações de confirmação correspondentes às informações de dados são incluídas em um único subquadro. em um modo de entrelaçamento múltiplo, pelo menos uma das informações de controle, a informação de dados correspondente à informação de controle ou a informação de confirmação correspondente à informação de dados é incluída em uma sub-estrutura diferente. ambos os modos de entrelaçamento único e múltiplo podem ser multiplexados juntos dentro da estrutura de sub-quadro tdd.
BR112018001162A 2015-07-20 2016-06-24 estrutura de sub-quadro duplex por divisão de tempo (tdd) que suporta modos de entrelaçamento único e múltiplo BR112018001162A2 (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201562194710P 2015-07-20 2015-07-20
US15/051,949 US9992790B2 (en) 2015-07-20 2016-02-24 Time division duplex (TDD) subframe structure supporting single and multiple interlace modes
PCT/US2016/039408 WO2017014912A1 (en) 2015-07-20 2016-06-24 Time division duplex (tdd) subframe structure supporting single and multiple interlace modes

Publications (1)

Publication Number Publication Date
BR112018001162A2 true BR112018001162A2 (pt) 2018-09-18

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
BR112018001162A BR112018001162A2 (pt) 2015-07-20 2016-06-24 estrutura de sub-quadro duplex por divisão de tempo (tdd) que suporta modos de entrelaçamento único e múltiplo

Country Status (9)

Country Link
US (3) US9992790B2 (pt)
EP (1) EP3326317A1 (pt)
JP (4) JP2018523405A (pt)
KR (2) KR102396226B1 (pt)
CN (3) CN107852309B (pt)
AU (3) AU2016296261B2 (pt)
BR (1) BR112018001162A2 (pt)
TW (3) TWI796621B (pt)
WO (1) WO2017014912A1 (pt)

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