BR112016030050A2 - modulação de pulso assíncrono para codificação de sinal baseada em limite - Google Patents

modulação de pulso assíncrono para codificação de sinal baseada em limite

Info

Publication number
BR112016030050A2
BR112016030050A2 BR112016030050A BR112016030050A BR112016030050A2 BR 112016030050 A2 BR112016030050 A2 BR 112016030050A2 BR 112016030050 A BR112016030050 A BR 112016030050A BR 112016030050 A BR112016030050 A BR 112016030050A BR 112016030050 A2 BR112016030050 A2 BR 112016030050A2
Authority
BR
Brazil
Prior art keywords
limit
signal
pulse modulation
signal coding
based signal
Prior art date
Application number
BR112016030050A
Other languages
English (en)
Inventor
Cheul Yoon Young
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of BR112016030050A2 publication Critical patent/BR112016030050A2/pt

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/04Architecture, e.g. interconnection topology
    • G06N3/049Temporal neural networks, e.g. delay elements, oscillating neurons or pulsed inputs
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/02Delta modulation, i.e. one-bit differential modulation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/067Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing soft decisions, i.e. decisions together with an estimate of reliability
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/069Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection by detecting edges or zero crossings
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0016Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/04Speed or phase control by synchronisation signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Artificial Intelligence (AREA)
  • Biomedical Technology (AREA)
  • Biophysics (AREA)
  • Computational Linguistics (AREA)
  • Data Mining & Analysis (AREA)
  • Evolutionary Computation (AREA)
  • General Health & Medical Sciences (AREA)
  • Molecular Biology (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Dc Digital Transmission (AREA)

Abstract

a invenção refere-se a um método de processamento de sinal inclui comparar um sinal de entrada com um ou mais valores limites positivos e um ou mais valores limites negativos. o método também inclui gerar um sinal de saída com base na comparação do sinal de entrada com o limite positivo (s) e o limite negativo (s). o método inclui ainda realimentar o sinal de saída para um filtro de reconstrução de deterioração para criar um sinal reconstruído e combinar o sinal reconstruído com o sinal de entrada.
BR112016030050A 2014-06-23 2015-05-19 modulação de pulso assíncrono para codificação de sinal baseada em limite BR112016030050A2 (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201462015739P 2014-06-23 2014-06-23
US14/513,997 US20150372805A1 (en) 2014-06-23 2014-10-14 Asynchronous pulse modulation for threshold-based signal coding
PCT/US2015/031568 WO2015199844A1 (en) 2014-06-23 2015-05-19 Asynchronous pulse modulation for threshold-based signal coding

Publications (1)

Publication Number Publication Date
BR112016030050A2 true BR112016030050A2 (pt) 2017-08-22

Family

ID=54870631

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112016030050A BR112016030050A2 (pt) 2014-06-23 2015-05-19 modulação de pulso assíncrono para codificação de sinal baseada em limite

Country Status (8)

Country Link
US (1) US20150372805A1 (pt)
EP (1) EP3158697A1 (pt)
JP (1) JP2017526224A (pt)
KR (1) KR20170021258A (pt)
CN (1) CN106663220A (pt)
BR (1) BR112016030050A2 (pt)
TW (1) TW201618509A (pt)
WO (1) WO2015199844A1 (pt)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10020968B1 (en) * 2015-03-18 2018-07-10 National Technology & Engineering Solutions Of Sandia, Llc Coherent radar receiver that comprises a sigma delta modulator
KR102399548B1 (ko) * 2016-07-13 2022-05-19 삼성전자주식회사 뉴럴 네트워크를 위한 방법 및 그 방법을 수행하는 장치
US10949737B2 (en) * 2016-07-13 2021-03-16 Samsung Electronics Co., Ltd. Method for neural network and apparatus performing same method
US10979030B2 (en) * 2017-08-25 2021-04-13 Mediatek Inc. System improving signal handling
US10424370B2 (en) 2017-10-24 2019-09-24 International Business Machines Corporation Sensor device with resistive memory for signal compression and reconstruction
KR102589303B1 (ko) 2017-11-02 2023-10-24 삼성전자주식회사 고정 소수점 타입의 뉴럴 네트워크를 생성하는 방법 및 장치
JP7118930B2 (ja) * 2019-08-19 2022-08-16 株式会社東芝 スパイキングニューラルネットワーク装置およびその学習方法
TWI728556B (zh) 2019-11-18 2021-05-21 財團法人工業技術研究院 神經元電路及類神經網路晶片
KR20210063721A (ko) * 2019-11-25 2021-06-02 삼성전자주식회사 뉴로모픽 장치 및 이를 포함하는 뉴로모픽 시스템
US10862505B1 (en) * 2020-02-27 2020-12-08 Nxp Usa, Inc. Arbitrary rate decimator and timing error corrector for an FSK receiver
CN111461302B (zh) * 2020-03-30 2024-04-19 嘉楠明芯(北京)科技有限公司 一种基于卷积神经网络的数据处理方法、设备及存储介质
CN115842555B (zh) * 2023-02-23 2023-04-21 北京大学 一种可用于处理生理信号的基于忆阻器的异步脉冲编码器

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2715411B2 (de) * 1977-04-06 1979-02-01 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Elektrisches Verfahren zum Bestimmen der Grundperiode eines Sprachsignals
US5149972A (en) * 1990-01-18 1992-09-22 University Of Massachusetts Medical Center Two excitation wavelength video imaging microscope
US5708389A (en) * 1996-03-15 1998-01-13 Lucent Technologies Inc. Integrated circuit employing quantized feedback
US5774505A (en) * 1996-04-04 1998-06-30 Hewlett-Packard Company Intersymbol interference cancellation with reduced complexity
WO1999013621A2 (en) * 1997-09-09 1999-03-18 Koninklijke Philips Electronics N.V. Unreliability detector apparatus and reproduction apparatus provided with the unreliability detector apparatus
US7860205B1 (en) * 2001-09-18 2010-12-28 Ciena Corporation Clock synchronization using a weighted least squares error filtering technique
US7483508B2 (en) * 2001-11-27 2009-01-27 Texas Instruments Incorporated All-digital frequency synthesis with non-linear differential term for handling frequency perturbations
US7020791B1 (en) * 2002-09-19 2006-03-28 Nortel Networks Limited Clock recovery using a double-exponential smoothing process
US6888484B2 (en) * 2003-05-22 2005-05-03 Agere Systems Inc. Stable high-order delta-sigma error feedback modulators, and noise transfer functions for use in such modulators
US7480234B1 (en) * 2003-10-31 2009-01-20 Cisco Technology, Inc. Initial timing estimation in a wireless network receiver
JP2007533180A (ja) * 2004-04-09 2007-11-15 オーディオアシクス エー/エス シグマ・デルタ変調器
GB2425668B (en) * 2005-01-17 2009-02-25 Wolfson Microelectronics Plc Pulse width modulator quantisation circuit
WO2007019498A2 (en) * 2005-08-08 2007-02-15 University Of Florida Research Foundation, Inc. Device and methods for biphasis pulse signal coding
JP2009518882A (ja) * 2005-12-06 2009-05-07 エヌエックスピー ビー ヴィ シグマ・デルタ型のアナログ‐デジタル変換器
US7366575B2 (en) * 2005-12-30 2008-04-29 Intel Corporation Wafer polishing control
WO2009006405A1 (en) * 2007-06-28 2009-01-08 The Trustees Of Columbia University In The City Of New York Multi-input multi-output time encoding and decoding machines
US8396503B2 (en) * 2007-10-19 2013-03-12 Telefonaktiebolaget L M Ericsson (Publ) Updating a signal quality target for uplink power control in a radio communication system responsive to estimated required signal quality for changing transmission formats
US7746257B2 (en) * 2008-05-07 2010-06-29 Cirrus Logic, Inc. Delta-sigma analog-to-digital converter circuit having reduced sampled reference noise
US20120207400A1 (en) * 2011-02-10 2012-08-16 Hisao Sasai Image coding method, image coding apparatus, image decoding method, image decoding apparatus, and image coding and decoding apparatus
US8595157B2 (en) * 2011-06-02 2013-11-26 Hrl Laboratories, Llc High-order time encoder based neuron circuit using a hysteresis quantizer, a one bit DAC, and a second order filter
US8909576B2 (en) * 2011-09-16 2014-12-09 International Business Machines Corporation Neuromorphic event-driven neural computing architecture in a scalable neural network
US9331721B2 (en) * 2012-04-30 2016-05-03 The Trustees Of Columbia University In The City Of New York Systems, devices, and methods for continuous time signal processing

Also Published As

Publication number Publication date
KR20170021258A (ko) 2017-02-27
JP2017526224A (ja) 2017-09-07
TW201618509A (zh) 2016-05-16
US20150372805A1 (en) 2015-12-24
CN106663220A (zh) 2017-05-10
EP3158697A1 (en) 2017-04-26
WO2015199844A1 (en) 2015-12-30

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Legal Events

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B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

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B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE AO DESPACHO 8.6 PUBLICADO NA RPI 2567 DE 2020-03-17