BR112016030050A2 - modulação de pulso assíncrono para codificação de sinal baseada em limite - Google Patents
modulação de pulso assíncrono para codificação de sinal baseada em limiteInfo
- Publication number
- BR112016030050A2 BR112016030050A2 BR112016030050A BR112016030050A BR112016030050A2 BR 112016030050 A2 BR112016030050 A2 BR 112016030050A2 BR 112016030050 A BR112016030050 A BR 112016030050A BR 112016030050 A BR112016030050 A BR 112016030050A BR 112016030050 A2 BR112016030050 A2 BR 112016030050A2
- Authority
- BR
- Brazil
- Prior art keywords
- limit
- signal
- pulse modulation
- signal coding
- based signal
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/04—Architecture, e.g. interconnection topology
- G06N3/049—Temporal neural networks, e.g. delay elements, oscillating neurons or pulsed inputs
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/02—Delta modulation, i.e. one-bit differential modulation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
- H04L25/067—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing soft decisions, i.e. decisions together with an estimate of reliability
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
- H04L25/069—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection by detecting edges or zero crossings
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Theoretical Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Evolutionary Computation (AREA)
- General Physics & Mathematics (AREA)
- Computational Linguistics (AREA)
- Data Mining & Analysis (AREA)
- Biomedical Technology (AREA)
- General Health & Medical Sciences (AREA)
- Molecular Biology (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Biophysics (AREA)
- Mathematical Physics (AREA)
- Software Systems (AREA)
- Artificial Intelligence (AREA)
- Life Sciences & Earth Sciences (AREA)
- Health & Medical Sciences (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Dc Digital Transmission (AREA)
Abstract
a invenção refere-se a um método de processamento de sinal inclui comparar um sinal de entrada com um ou mais valores limites positivos e um ou mais valores limites negativos. o método também inclui gerar um sinal de saída com base na comparação do sinal de entrada com o limite positivo (s) e o limite negativo (s). o método inclui ainda realimentar o sinal de saída para um filtro de reconstrução de deterioração para criar um sinal reconstruído e combinar o sinal reconstruído com o sinal de entrada.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201462015739P | 2014-06-23 | 2014-06-23 | |
US14/513,997 US20150372805A1 (en) | 2014-06-23 | 2014-10-14 | Asynchronous pulse modulation for threshold-based signal coding |
PCT/US2015/031568 WO2015199844A1 (en) | 2014-06-23 | 2015-05-19 | Asynchronous pulse modulation for threshold-based signal coding |
Publications (1)
Publication Number | Publication Date |
---|---|
BR112016030050A2 true BR112016030050A2 (pt) | 2017-08-22 |
Family
ID=54870631
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR112016030050A BR112016030050A2 (pt) | 2014-06-23 | 2015-05-19 | modulação de pulso assíncrono para codificação de sinal baseada em limite |
Country Status (8)
Country | Link |
---|---|
US (1) | US20150372805A1 (pt) |
EP (1) | EP3158697A1 (pt) |
JP (1) | JP2017526224A (pt) |
KR (1) | KR20170021258A (pt) |
CN (1) | CN106663220A (pt) |
BR (1) | BR112016030050A2 (pt) |
TW (1) | TW201618509A (pt) |
WO (1) | WO2015199844A1 (pt) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10020968B1 (en) * | 2015-03-18 | 2018-07-10 | National Technology & Engineering Solutions Of Sandia, Llc | Coherent radar receiver that comprises a sigma delta modulator |
KR102399548B1 (ko) * | 2016-07-13 | 2022-05-19 | 삼성전자주식회사 | 뉴럴 네트워크를 위한 방법 및 그 방법을 수행하는 장치 |
US10949737B2 (en) * | 2016-07-13 | 2021-03-16 | Samsung Electronics Co., Ltd. | Method for neural network and apparatus performing same method |
US10979030B2 (en) | 2017-08-25 | 2021-04-13 | Mediatek Inc. | System improving signal handling |
US10424370B2 (en) | 2017-10-24 | 2019-09-24 | International Business Machines Corporation | Sensor device with resistive memory for signal compression and reconstruction |
KR102589303B1 (ko) | 2017-11-02 | 2023-10-24 | 삼성전자주식회사 | 고정 소수점 타입의 뉴럴 네트워크를 생성하는 방법 및 장치 |
JP7118930B2 (ja) * | 2019-08-19 | 2022-08-16 | 株式会社東芝 | スパイキングニューラルネットワーク装置およびその学習方法 |
TWI728556B (zh) | 2019-11-18 | 2021-05-21 | 財團法人工業技術研究院 | 神經元電路及類神經網路晶片 |
KR20210063721A (ko) * | 2019-11-25 | 2021-06-02 | 삼성전자주식회사 | 뉴로모픽 장치 및 이를 포함하는 뉴로모픽 시스템 |
US10862505B1 (en) * | 2020-02-27 | 2020-12-08 | Nxp Usa, Inc. | Arbitrary rate decimator and timing error corrector for an FSK receiver |
CN111461302B (zh) * | 2020-03-30 | 2024-04-19 | 嘉楠明芯(北京)科技有限公司 | 一种基于卷积神经网络的数据处理方法、设备及存储介质 |
CN115842555B (zh) * | 2023-02-23 | 2023-04-21 | 北京大学 | 一种可用于处理生理信号的基于忆阻器的异步脉冲编码器 |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
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DE2715411B2 (de) * | 1977-04-06 | 1979-02-01 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Elektrisches Verfahren zum Bestimmen der Grundperiode eines Sprachsignals |
US5149972A (en) * | 1990-01-18 | 1992-09-22 | University Of Massachusetts Medical Center | Two excitation wavelength video imaging microscope |
US5708389A (en) * | 1996-03-15 | 1998-01-13 | Lucent Technologies Inc. | Integrated circuit employing quantized feedback |
US5774505A (en) * | 1996-04-04 | 1998-06-30 | Hewlett-Packard Company | Intersymbol interference cancellation with reduced complexity |
KR100596043B1 (ko) * | 1997-09-09 | 2006-07-05 | 코닌클리케 필립스 일렉트로닉스 엔.브이. | 불신뢰도 검출장치 및 이 불신뢰도 검출장치를 구비한 재생장치 |
US7860205B1 (en) * | 2001-09-18 | 2010-12-28 | Ciena Corporation | Clock synchronization using a weighted least squares error filtering technique |
US7483508B2 (en) * | 2001-11-27 | 2009-01-27 | Texas Instruments Incorporated | All-digital frequency synthesis with non-linear differential term for handling frequency perturbations |
US7020791B1 (en) * | 2002-09-19 | 2006-03-28 | Nortel Networks Limited | Clock recovery using a double-exponential smoothing process |
JP4856363B2 (ja) * | 2003-05-22 | 2012-01-18 | アギア システムズ インコーポレーテッド | 安定な高次デルタ・シグマ誤差フィードバック変調器およびそのような変調器において使用される雑音伝達関数 |
US7480234B1 (en) * | 2003-10-31 | 2009-01-20 | Cisco Technology, Inc. | Initial timing estimation in a wireless network receiver |
KR20060129544A (ko) * | 2004-04-09 | 2006-12-15 | 아우디오아시스 에이/에스 | 시그마 델타 변조기 |
GB2449591B (en) * | 2005-01-17 | 2009-03-18 | Wolfson Microelectronics Plc | Pulse width modulator quantisation circuit |
WO2007019498A2 (en) * | 2005-08-08 | 2007-02-15 | University Of Florida Research Foundation, Inc. | Device and methods for biphasis pulse signal coding |
CN101326724A (zh) * | 2005-12-06 | 2008-12-17 | Nxp股份有限公司 | Sigma Delta型模数转换器 |
US7366575B2 (en) * | 2005-12-30 | 2008-04-29 | Intel Corporation | Wafer polishing control |
WO2009006405A1 (en) * | 2007-06-28 | 2009-01-08 | The Trustees Of Columbia University In The City Of New York | Multi-input multi-output time encoding and decoding machines |
CN101874361A (zh) * | 2007-10-19 | 2010-10-27 | 艾利森电话股份有限公司 | 无线系统中的目标更新功率控制方法 |
US7746257B2 (en) * | 2008-05-07 | 2010-06-29 | Cirrus Logic, Inc. | Delta-sigma analog-to-digital converter circuit having reduced sampled reference noise |
US20120207400A1 (en) * | 2011-02-10 | 2012-08-16 | Hisao Sasai | Image coding method, image coding apparatus, image decoding method, image decoding apparatus, and image coding and decoding apparatus |
US8595157B2 (en) * | 2011-06-02 | 2013-11-26 | Hrl Laboratories, Llc | High-order time encoder based neuron circuit using a hysteresis quantizer, a one bit DAC, and a second order filter |
US8909576B2 (en) * | 2011-09-16 | 2014-12-09 | International Business Machines Corporation | Neuromorphic event-driven neural computing architecture in a scalable neural network |
US9331721B2 (en) * | 2012-04-30 | 2016-05-03 | The Trustees Of Columbia University In The City Of New York | Systems, devices, and methods for continuous time signal processing |
-
2014
- 2014-10-14 US US14/513,997 patent/US20150372805A1/en not_active Abandoned
-
2015
- 2015-05-19 EP EP15727514.0A patent/EP3158697A1/en not_active Withdrawn
- 2015-05-19 KR KR1020167036046A patent/KR20170021258A/ko unknown
- 2015-05-19 BR BR112016030050A patent/BR112016030050A2/pt not_active IP Right Cessation
- 2015-05-19 WO PCT/US2015/031568 patent/WO2015199844A1/en active Application Filing
- 2015-05-19 CN CN201580033497.XA patent/CN106663220A/zh active Pending
- 2015-05-19 JP JP2016574409A patent/JP2017526224A/ja active Pending
- 2015-05-20 TW TW104116147A patent/TW201618509A/zh unknown
Also Published As
Publication number | Publication date |
---|---|
JP2017526224A (ja) | 2017-09-07 |
KR20170021258A (ko) | 2017-02-27 |
EP3158697A1 (en) | 2017-04-26 |
WO2015199844A1 (en) | 2015-12-30 |
CN106663220A (zh) | 2017-05-10 |
TW201618509A (zh) | 2016-05-16 |
US20150372805A1 (en) | 2015-12-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
B08F | Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette] |
Free format text: REFERENTE A 5A ANUIDADE. |
|
B08K | Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette] |
Free format text: REFERENTE AO DESPACHO 8.6 PUBLICADO NA RPI 2567 DE 2020-03-17 |