BR112013004233A2 - circuito integrado incluindo um analisador de lógica programável com capacidades aprimoradas de análise e depuração e um método para o mesmo - Google Patents
circuito integrado incluindo um analisador de lógica programável com capacidades aprimoradas de análise e depuração e um método para o mesmoInfo
- Publication number
- BR112013004233A2 BR112013004233A2 BR112013004233A BR112013004233A BR112013004233A2 BR 112013004233 A2 BR112013004233 A2 BR 112013004233A2 BR 112013004233 A BR112013004233 A BR 112013004233A BR 112013004233 A BR112013004233 A BR 112013004233A BR 112013004233 A2 BR112013004233 A2 BR 112013004233A2
- Authority
- BR
- Brazil
- Prior art keywords
- integrated circuit
- logic analyzer
- trigger
- trigger condition
- enhanced analysis
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/263—Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3177—Testing of logic operation, e.g. by logic analysers
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31705—Debugging aspects, e.g. using test circuits for debugging, using dedicated debugging test circuits
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2294—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by remote test
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Tests Of Electronic Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Semiconductor Integrated Circuits (AREA)
- Debugging And Monitoring (AREA)
- Logic Circuits (AREA)
Abstract
circuito integrado incluindo um analisador de lógica programável com capacidades aprimoradas de análise e depuração e um método para o mesmo. trata-se de um circuito integrado que inclui um analisador de lógica com capacidades aprimoradas de análise e depuração e um método para o mesmo. em uma modalidade da presente invenção, um analisador de lógica embutido (ela) recebe uma pluralidade de sinais a partir de uma pluralidade de barramentos dentro de um circuito integrado (ic). o ela inclui um módulo de interconexão para selecionar um sinal de disparo e/ou um sinal amostrado a partir da pluralidade de sinais recebidos. um módulo de disparo ajusta pelo menos uma condição de disparo e detecta se o sinal de disparo satisfaz a pelo menos uma condição de disparo. quando a condição de disparo for satisfeita, um módulo de saída realiza pelo menos uma tarefa com base em pelo menos uma condição de disparo satisfeita. se um processo de amostragem for iniciado pelo módulo de saída, a pluralidade de sinais amostrados é amostrada e pode ser armazenada em uma memória. a capacidade do módulo de saída realizar múltiplas tarefas definidas pelo usuário aumenta a capacidade de deputação do ela e o torna mais versátil.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/877,819 US8914681B2 (en) | 2009-08-18 | 2010-09-08 | Integrated circuit including a programmable logic analyzer with enhanced analyzing and debugging capabilities and a method therefor |
US12/877.819 | 2010-09-08 | ||
PCT/US2011/050755 WO2012033871A1 (en) | 2010-09-08 | 2011-09-08 | An integrated circuit including a programmable logic analyzer with enhanced analyzing and debugging capabilities and a method therefor |
Publications (2)
Publication Number | Publication Date |
---|---|
BR112013004233A2 true BR112013004233A2 (pt) | 2016-07-05 |
BR112013004233B1 BR112013004233B1 (pt) | 2020-09-29 |
Family
ID=45810961
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR112013004233-8A BR112013004233B1 (pt) | 2010-09-08 | 2011-09-08 | Circuito integrado incluindo um analisador de lógica programável configurável para análise e depuração |
Country Status (11)
Country | Link |
---|---|
US (2) | US8914681B2 (pt) |
EP (1) | EP2614381B1 (pt) |
KR (1) | KR101918195B1 (pt) |
CN (1) | CN103140769B (pt) |
AU (1) | AU2011299256B2 (pt) |
BR (1) | BR112013004233B1 (pt) |
CA (1) | CA2807125C (pt) |
HK (1) | HK1187411A1 (pt) |
RU (1) | RU2598908C2 (pt) |
SG (1) | SG187693A1 (pt) |
WO (1) | WO2012033871A1 (pt) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9170901B2 (en) | 2009-08-18 | 2015-10-27 | Lexmark International, Inc. | System and method for analyzing an electronics device including a logic analyzer |
US8516304B2 (en) * | 2009-08-18 | 2013-08-20 | Lexmark International, Inc. | Integrated circuit including a programmable logic analyzer with enhanced analyzing and debugging capabilities and a method therefor |
US9405651B1 (en) | 2013-10-03 | 2016-08-02 | Initial State Technologies, Inc. | Apparatus and method for processing log file data |
US9405610B1 (en) | 2013-10-03 | 2016-08-02 | Initial State Technologies, Inc. | Apparatus and method for processing log file data |
US9405755B1 (en) | 2013-10-03 | 2016-08-02 | Initial State Technologies, Inc. | Apparatus and method for processing log file data |
GB2526850B (en) * | 2014-06-05 | 2020-11-25 | Advanced Risc Mach Ltd | Logic analyzer |
KR102391385B1 (ko) * | 2015-08-13 | 2022-04-27 | 삼성전자주식회사 | 내장형 로직 분석기 및 이를 포함하는 집적 회로 |
US10860322B2 (en) * | 2015-10-30 | 2020-12-08 | Arm Limited | Modifying behavior of a data processing unit using rewritable behavior mappings of instructions |
US10386410B2 (en) * | 2016-12-12 | 2019-08-20 | Samsung Electronics Co., Ltd. | Highly flexible performance counter and system debug module |
US11688482B2 (en) | 2018-08-08 | 2023-06-27 | Numascale As | Digital circuit testing and analysis module, system and method thereof |
US10816598B1 (en) * | 2018-10-01 | 2020-10-27 | Xilinx, Inc. | Dynamic debugging of circuits |
KR102105031B1 (ko) * | 2018-12-31 | 2020-04-27 | 주식회사 다빈시스템스 | 이동통신 장치에서의 타이밍 획득 장치 및 방법 |
CN113656236B (zh) * | 2020-05-12 | 2024-05-28 | 大唐移动通信设备有限公司 | 一种数据处理方法和装置 |
CN112634801B (zh) * | 2021-01-08 | 2022-06-10 | 北京集睿致远科技有限公司 | 一种片内逻辑分析仪及芯片调试方法 |
US11639962B1 (en) | 2021-03-12 | 2023-05-02 | Xilinx, Inc. | Scalable scan architecture for multi-circuit block arrays |
CN117452190A (zh) * | 2023-12-22 | 2024-01-26 | 合肥联宝信息技术有限公司 | 一种信号测试电路、方法及存储介质 |
Family Cites Families (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4042262A1 (de) * | 1990-12-31 | 1992-07-02 | Richt Stefan | Verfahren zur analyse der funktionsweise von digitalen schaltungen |
US6182247B1 (en) * | 1996-10-28 | 2001-01-30 | Altera Corporation | Embedded logic analyzer for a programmable logic device |
US5954830A (en) * | 1997-04-08 | 1999-09-21 | International Business Machines Corporation | Method and apparatus for achieving higher performance data compression in ABIST testing by reducing the number of data outputs |
US6286114B1 (en) * | 1997-10-27 | 2001-09-04 | Altera Corporation | Enhanced embedded logic analyzer |
US6016563A (en) * | 1997-12-30 | 2000-01-18 | Fleisher; Evgeny G. | Method and apparatus for testing a logic design of a programmable logic device |
JP4335999B2 (ja) * | 1999-05-20 | 2009-09-30 | 株式会社ルネサステクノロジ | プロセッサ内蔵半導体集積回路装置 |
US6564347B1 (en) * | 1999-07-29 | 2003-05-13 | Intel Corporation | Method and apparatus for testing an integrated circuit using an on-chip logic analyzer unit |
US6633838B1 (en) * | 1999-11-04 | 2003-10-14 | International Business Machines Corporation | Multi-state logic analyzer integral to a microprocessor |
US7240303B1 (en) * | 1999-11-30 | 2007-07-03 | Synplicity, Inc. | Hardware/software co-debugging in a hardware description language |
US7072818B1 (en) * | 1999-11-30 | 2006-07-04 | Synplicity, Inc. | Method and system for debugging an electronic system |
US6791352B2 (en) * | 2002-02-08 | 2004-09-14 | International Business Machines Corporation | Method and apparatus for debugging a chip |
US6918074B2 (en) * | 2002-06-28 | 2005-07-12 | Intel Corporation | At speed testing asynchronous signals |
US7650545B1 (en) * | 2002-09-30 | 2010-01-19 | Agere Systems Inc. | Programmable interconnect for reconfigurable system-on-chip |
US20040216061A1 (en) * | 2003-04-28 | 2004-10-28 | International Business Machines Corporation | Embeddable method and apparatus for functional pattern testing of repeatable program instruction-driven logic circuits via signal signature generation |
US7389452B2 (en) * | 2004-06-29 | 2008-06-17 | Electronics For Imaging, Inc. | Methods and apparatus for monitoring internal signals in an integrated circuit |
US7350121B2 (en) * | 2004-08-13 | 2008-03-25 | Broadcom Corporation | Programmable embedded logic analyzer in an integrated circuit |
US7348799B2 (en) * | 2005-01-11 | 2008-03-25 | Hewlett-Packard Development Company, L.P. | System and method for generating a trigger signal |
US7493247B2 (en) * | 2005-12-07 | 2009-02-17 | Dafca, Inc. | Integrated circuit analysis system and method using model checking |
EP1854035A1 (en) * | 2006-02-28 | 2007-11-14 | Mentor Graphics Corporation | Memory-based trigger generation scheme in an emulation environment |
US7332929B1 (en) * | 2006-03-03 | 2008-02-19 | Azul Systems, Inc. | Wide-scan on-chip logic analyzer with global trigger and interleaved SRAM capture buffers |
US7797599B2 (en) * | 2006-09-27 | 2010-09-14 | Verigy (Singapore) Pte. Ltd. | Diagnostic information capture from logic devices with built-in self test |
CN100458731C (zh) | 2007-02-12 | 2009-02-04 | 北京中星微电子有限公司 | 一种采用硬件逻辑对ic设计进行验证的方法 |
US8516304B2 (en) * | 2009-08-18 | 2013-08-20 | Lexmark International, Inc. | Integrated circuit including a programmable logic analyzer with enhanced analyzing and debugging capabilities and a method therefor |
US20110047424A1 (en) * | 2009-08-18 | 2011-02-24 | James Ray Bailey | Integrated circuit including a programmable logic analyzer with enhanced analyzing and debugging capabilites and a method therefor |
US8384411B2 (en) * | 2009-12-18 | 2013-02-26 | Tektronix, Inc. | Method and device for measuring inter-chip signals |
-
2010
- 2010-09-08 US US12/877,819 patent/US8914681B2/en active Active
-
2011
- 2011-09-08 KR KR1020137005044A patent/KR101918195B1/ko active IP Right Grant
- 2011-09-08 WO PCT/US2011/050755 patent/WO2012033871A1/en active Application Filing
- 2011-09-08 RU RU2013104873/28A patent/RU2598908C2/ru active
- 2011-09-08 BR BR112013004233-8A patent/BR112013004233B1/pt active IP Right Grant
- 2011-09-08 SG SG2013008206A patent/SG187693A1/en unknown
- 2011-09-08 AU AU2011299256A patent/AU2011299256B2/en active Active
- 2011-09-08 CA CA2807125A patent/CA2807125C/en active Active
- 2011-09-08 CN CN201180041596.4A patent/CN103140769B/zh active Active
- 2011-09-08 EP EP11824094.4A patent/EP2614381B1/en active Active
-
2014
- 2014-01-13 HK HK14100363.3A patent/HK1187411A1/xx unknown
- 2014-11-19 US US14/547,745 patent/US20160011953A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
CN103140769B (zh) | 2015-11-25 |
BR112013004233B1 (pt) | 2020-09-29 |
CA2807125A1 (en) | 2012-03-15 |
EP2614381B1 (en) | 2015-11-18 |
WO2012033871A1 (en) | 2012-03-15 |
CN103140769A (zh) | 2013-06-05 |
RU2598908C2 (ru) | 2016-10-10 |
HK1187411A1 (en) | 2014-04-04 |
EP2614381A1 (en) | 2013-07-17 |
CA2807125C (en) | 2018-02-27 |
US8914681B2 (en) | 2014-12-16 |
RU2013104873A (ru) | 2014-10-20 |
KR101918195B1 (ko) | 2018-11-14 |
EP2614381A4 (en) | 2014-02-19 |
KR20130106355A (ko) | 2013-09-27 |
US20110047423A1 (en) | 2011-02-24 |
SG187693A1 (en) | 2013-03-28 |
AU2011299256A1 (en) | 2013-02-21 |
AU2011299256B2 (en) | 2016-02-11 |
US20160011953A1 (en) | 2016-01-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
BR112013004233A2 (pt) | circuito integrado incluindo um analisador de lógica programável com capacidades aprimoradas de análise e depuração e um método para o mesmo | |
BR112013004234A2 (pt) | circuito integrado com um analisador de lógica programável, capacidades aprimoradas de análise e depuração e um método | |
BR112014013832A2 (pt) | circuito integrado de baixa potência para analisar um fluxo de áudio digitalizado | |
BR112013030585A2 (pt) | monitoramento de saída de área demarcada | |
WO2007078628A3 (en) | Method and apparatus for providing for detecting processor state transitions | |
BR112013003140A2 (pt) | método e sistema para realizar diagnóstico remoto em um veículo | |
BR112018071661A2 (pt) | captação de nível de líquido | |
EP2164017A3 (en) | Automatic hardware-based recovery of a compromised computer | |
ATE514998T1 (de) | Getaktete ports | |
CL2017001033A1 (es) | Depurador (eud) de bus serial universal (usb) integrado para depuración multi-interfaz en sistemas electrónicos | |
BR112016007357A2 (pt) | método para melhorar a taxa de link mipi d-phy com mudanças phy mínimas e nenhuma mudança de protocolo | |
BR112015031865A2 (pt) | sistemas e métodos de determinar a localização usando um dispositivo médico | |
BR112013018796A2 (pt) | terminal tendo tela de toque e método para a identificação de evento de toque ali | |
BRPI0910793B8 (pt) | Método e discriminador para a classificação de diferentes segmentos de um sinal | |
BR112014018145A8 (pt) | Dispositivo de computação móvel, e respectivo sistema | |
US9372768B2 (en) | Debug interface | |
TW200720968A (en) | System and method for performing deterministic processing | |
JP2010181989A5 (pt) | ||
WO2007067399A3 (en) | Partitioning of tasks for execution by a vliw hardware acceleration system | |
BR112014018048A8 (pt) | Método e dispositivo para processamento de uma página com abas | |
ATE485527T1 (de) | System und rechnerprogrammprodukt zum testen einer logischen schaltung | |
BR112012032757A2 (pt) | método para paginar terminais de acesso legados e avançados terminais de acesso legados e avançados | |
DE602005013534D1 (de) | Stromeffizienter speicher und karten | |
WO2006133341A3 (en) | Mechanism for providing program breakpoints in a microcontroller with flash program memory | |
BR112015018496A2 (pt) | operação de módulos de software em paralelo |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
B06F | Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette] | ||
B06U | Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette] | ||
B09A | Decision: intention to grant [chapter 9.1 patent gazette] | ||
B16A | Patent or certificate of addition of invention granted |
Free format text: PRAZO DE VALIDADE: 20 (VINTE) ANOS CONTADOS A PARTIR DE 08/09/2011, OBSERVADAS AS CONDICOES LEGAIS. |