BR112013004234A2 - circuito integrado com um analisador de lógica programável, capacidades aprimoradas de análise e depuração e um método - Google Patents

circuito integrado com um analisador de lógica programável, capacidades aprimoradas de análise e depuração e um método

Info

Publication number
BR112013004234A2
BR112013004234A2 BR112013004234A BR112013004234A BR112013004234A2 BR 112013004234 A2 BR112013004234 A2 BR 112013004234A2 BR 112013004234 A BR112013004234 A BR 112013004234A BR 112013004234 A BR112013004234 A BR 112013004234A BR 112013004234 A2 BR112013004234 A2 BR 112013004234A2
Authority
BR
Brazil
Prior art keywords
logic analyzer
integrated circuit
enhanced analysis
programmable logic
debugging capabilities
Prior art date
Application number
BR112013004234A
Other languages
English (en)
Other versions
BR112013004234B1 (pt
Inventor
Christopher Wilson Case
James Patrick Sharpe
James Ray Bailey
Original Assignee
Lexmark Int Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lexmark Int Inc filed Critical Lexmark Int Inc
Publication of BR112013004234A2 publication Critical patent/BR112013004234A2/pt
Publication of BR112013004234B1 publication Critical patent/BR112013004234B1/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/25—Testing of logic operation, e.g. by logic analysers
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3177—Testing of logic operation, e.g. by logic analysers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2294—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by remote test

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Debugging And Monitoring (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

circuito integrado com um analisador de lógica programável, capacidades aprimoradas de análise e depuração e um método. trata-se de um circuito integrado que inclui um analisador de lógica com capacidades aprimoradas de análise e depuração e um método para o mesmo. em uma modalidade, um circuito integrado inclui um analisador de lógica tendo uma primeira entrada que recebe uma pluralidade de sinais e uma saída para proporcionar uma indicação de uma detecção, pelo analisador de lógica, de pelo menos um evento de disparo; e um bloco de auto-teste embutido tendo uma primeira entrada para receber um ou mais dos sinais que aparecem na primeira entrada do analisador de lógica, uma segunda entrada acoplada á saída do analisador de lógica para capacitar seletivamente o bloco bist, sendo que o bloco bist gera e mantém uma assinatura com base na primeira e na segunda entradas deste.
BR112013004234-6A 2010-09-08 2011-09-08 Circuito integrado com um analisador de lógica programável, capacidades aprimoradas de análise e depuração e um método BR112013004234B1 (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/877,846 US8516304B2 (en) 2009-08-18 2010-09-08 Integrated circuit including a programmable logic analyzer with enhanced analyzing and debugging capabilities and a method therefor
US12/877,846 2010-09-08
PCT/US2011/050761 WO2012033876A1 (en) 2010-09-08 2011-09-08 Integrated circuit with programmable logic analyzer, enhanced analyzing and debugging capabilities and method

Publications (2)

Publication Number Publication Date
BR112013004234A2 true BR112013004234A2 (pt) 2016-07-05
BR112013004234B1 BR112013004234B1 (pt) 2020-05-26

Family

ID=45810964

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112013004234-6A BR112013004234B1 (pt) 2010-09-08 2011-09-08 Circuito integrado com um analisador de lógica programável, capacidades aprimoradas de análise e depuração e um método

Country Status (11)

Country Link
US (1) US8516304B2 (pt)
EP (1) EP2614380B1 (pt)
KR (1) KR101759215B1 (pt)
CN (1) CN103069289B (pt)
AU (1) AU2011299176B2 (pt)
BR (1) BR112013004234B1 (pt)
CA (1) CA2807323C (pt)
HK (1) HK1187410A1 (pt)
RU (1) RU2579814C2 (pt)
SG (1) SG187854A1 (pt)
WO (1) WO2012033876A1 (pt)

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US8745447B2 (en) * 2009-08-18 2014-06-03 Lexmark International, Inc. System and method for analyzing an electronics device including a logic analyzer
US8914681B2 (en) * 2009-08-18 2014-12-16 Lexmark International, Inc. Integrated circuit including a programmable logic analyzer with enhanced analyzing and debugging capabilities and a method therefor
CN103294602B (zh) * 2012-02-28 2016-04-13 孕龙科技股份有限公司 逻辑分析仪的数据读取及写入其存储器的方法
US10235339B2 (en) 2013-02-19 2019-03-19 Keysight Technologies, Inc. Digital measurement instrument triggered by signal pattern
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US9405755B1 (en) 2013-10-03 2016-08-02 Initial State Technologies, Inc. Apparatus and method for processing log file data
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US10037259B2 (en) * 2016-04-26 2018-07-31 International Business Machines Corporation Adaptive debug tracing for microprocessors
RU2633908C1 (ru) * 2016-06-21 2017-10-19 Федеральное государственное бюджетное учреждение науки Институт проблем управления им. В.А. Трапезникова Российской академии наук Устройство анализа результатов тестирования для локализации двукратных неисправностей
US10482205B2 (en) * 2017-07-24 2019-11-19 Xilinx, Inc. Logic analyzer for integrated circuits
BR112021015023A2 (pt) 2019-02-06 2021-10-05 Hewlett-Packard Development Company, L.P. Múltiplos circuitos acoplados a uma interface
MX2021009129A (es) 2019-02-06 2021-09-10 Hewlett Packard Development Co Memorias de matrices de fluidos.
US11787173B2 (en) 2019-02-06 2023-10-17 Hewlett-Packard Development Company, L.P. Print component with memory circuit
NZ779667A (en) 2019-02-06 2023-06-30 Hewlett Packard Development Co Communicating print component
CA3126914A1 (en) 2019-02-06 2020-08-13 Hewlett-Packard Development Company, L.P. Print component with memory circuit
TWI726405B (zh) 2019-09-04 2021-05-01 神雲科技股份有限公司 開機程序除錯系統及其主機與方法
CN112579178B (zh) * 2019-09-29 2022-04-05 佛山市顺德区顺达电脑厂有限公司 开机程序除错系统及其主机与方法
US11919310B2 (en) 2020-12-08 2024-03-05 Canon Solutions America, Inc. Devices, systems, and methods for printhead cleaning and diagnostics
CN116662212A (zh) * 2023-07-31 2023-08-29 上海芯炽科技集团有限公司 一种使用于asic的内置逻辑分析仪的方法

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Also Published As

Publication number Publication date
AU2011299176A1 (en) 2013-02-21
KR101759215B1 (ko) 2017-07-31
CA2807323A1 (en) 2012-03-15
US20110047427A1 (en) 2011-02-24
US8516304B2 (en) 2013-08-20
CN103069289B (zh) 2016-01-20
CA2807323C (en) 2018-09-25
AU2011299176B2 (en) 2015-09-17
RU2579814C2 (ru) 2016-04-10
CN103069289A (zh) 2013-04-24
EP2614380A4 (en) 2014-02-26
HK1187410A1 (en) 2014-04-04
KR20130100111A (ko) 2013-09-09
RU2013105340A (ru) 2014-10-20
BR112013004234B1 (pt) 2020-05-26
EP2614380A1 (en) 2013-07-17
SG187854A1 (en) 2013-03-28
WO2012033876A1 (en) 2012-03-15
EP2614380B1 (en) 2015-08-19

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Legal Events

Date Code Title Description
B06F Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]
B06U Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]
B09A Decision: intention to grant [chapter 9.1 patent gazette]
B16A Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]

Free format text: PRAZO DE VALIDADE: 20 (VINTE) ANOS CONTADOS A PARTIR DE 08/09/2011, OBSERVADAS AS CONDICOES LEGAIS.