BR112012031951A2 - estrutura semicondutora e método de fabricação da mesma - Google Patents

estrutura semicondutora e método de fabricação da mesma

Info

Publication number
BR112012031951A2
BR112012031951A2 BR112012031951A BR112012031951A BR112012031951A2 BR 112012031951 A2 BR112012031951 A2 BR 112012031951A2 BR 112012031951 A BR112012031951 A BR 112012031951A BR 112012031951 A BR112012031951 A BR 112012031951A BR 112012031951 A2 BR112012031951 A2 BR 112012031951A2
Authority
BR
Brazil
Prior art keywords
manufacturing
semiconductor structure
semiconductor
Prior art date
Application number
BR112012031951A
Other languages
English (en)
Portuguese (pt)
Inventor
Dube Abhishek
Park Dae-Gyu
B Johnson Jeffrey
Li Jinghong
R Holt Judson
K Chan Kevin
Zhu Zhengmao
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BR112012031951A2 publication Critical patent/BR112012031951A2/pt

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/608—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having non-planar bodies, e.g. having recessed gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/797—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in source or drain regions, e.g. SiGe source or drain
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01—Manufacture or treatment
    • H10D62/021—Forming source or drain recesses by etching e.g. recessing by etching and then refilling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/82—Heterojunctions
    • H10D62/822—Heterojunctions comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/021—Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
BR112012031951A 2010-06-25 2011-06-10 estrutura semicondutora e método de fabricação da mesma BR112012031951A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/823,163 US8299535B2 (en) 2010-06-25 2010-06-25 Delta monolayer dopants epitaxy for embedded source/drain silicide
PCT/US2011/039892 WO2011162977A2 (en) 2010-06-25 2011-06-10 Delta monolayer dopants epitaxy for embedded source/drain silicide

Publications (1)

Publication Number Publication Date
BR112012031951A2 true BR112012031951A2 (pt) 2018-03-06

Family

ID=45351702

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112012031951A BR112012031951A2 (pt) 2010-06-25 2011-06-10 estrutura semicondutora e método de fabricação da mesma

Country Status (9)

Country Link
US (1) US8299535B2 (https=)
JP (1) JP2013534052A (https=)
KR (1) KR20130028941A (https=)
CN (1) CN102906880B (https=)
BR (1) BR112012031951A2 (https=)
DE (1) DE112011101378B4 (https=)
GB (1) GB2494608B (https=)
SG (1) SG184824A1 (https=)
WO (1) WO2011162977A2 (https=)

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KR102059526B1 (ko) 2012-11-22 2019-12-26 삼성전자주식회사 내장 스트레서를 갖는 반도체 소자 형성 방법 및 관련된 소자
TWI605592B (zh) 2012-11-22 2017-11-11 三星電子股份有限公司 在凹處包括一應力件的半導體裝置及其形成方法（二）
US9029226B2 (en) 2013-03-13 2015-05-12 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for doping lightly-doped-drain (LDD) regions of finFET devices
US9219133B2 (en) * 2013-05-30 2015-12-22 Stmicroelectronics, Inc. Method of making a semiconductor device using spacers for source/drain confinement
US9293534B2 (en) 2014-03-21 2016-03-22 Taiwan Semiconductor Manufacturing Company, Ltd. Formation of dislocations in source and drain regions of FinFET devices
US8841189B1 (en) 2013-06-14 2014-09-23 International Business Machines Corporation Transistor having all-around source/drain metal contact channel stressor and method to fabricate same
US9853154B2 (en) 2014-01-24 2017-12-26 Taiwan Semiconductor Manufacturing Company Ltd. Embedded source or drain region of transistor with downward tapered region under facet region
US10164107B2 (en) * 2014-01-24 2018-12-25 Taiwan Semiconductor Manufacturing Company Ltd. Embedded source or drain region of transistor with laterally extended portion
JP6482180B2 (ja) * 2014-03-25 2019-03-13 住友重機械工業株式会社 半導体装置の製造方法
US9673295B2 (en) 2014-05-27 2017-06-06 Globalfoundries Inc. Contact resistance optimization via EPI growth engineering
US9893183B2 (en) * 2014-07-10 2018-02-13 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and manufacturing method thereof
CN105280492B (zh) * 2014-07-21 2018-08-10 中芯国际集成电路制造(上海)有限公司 半导体结构的形成方法
US9601574B2 (en) * 2014-12-29 2017-03-21 Taiwan Semiconductor Manufacturing Company, Ltd. V-shaped epitaxially formed semiconductor layer
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US10665693B2 (en) 2015-04-30 2020-05-26 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor structure and manufacturing method thereof
US10177187B2 (en) 2015-05-28 2019-01-08 Taiwan Semiconductor Manufacturing Company Ltd. Implant damage free image sensor and method of the same
US9812570B2 (en) 2015-06-30 2017-11-07 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
US10084090B2 (en) * 2015-11-09 2018-09-25 International Business Machines Corporation Method and structure of stacked FinFET
CN108735894B (zh) * 2017-04-14 2022-02-25 上海磁宇信息科技有限公司 一种高密度随机存储器架构
US10763328B2 (en) 2018-10-04 2020-09-01 Globalfoundries Inc. Epitaxial semiconductor material grown with enhanced local isotropy

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Also Published As

Publication number Publication date
US8299535B2 (en) 2012-10-30
DE112011101378T8 (de) 2013-05-08
DE112011101378B4 (de) 2018-12-27
KR20130028941A (ko) 2013-03-20
CN102906880B (zh) 2015-08-19
WO2011162977A3 (en) 2012-03-15
SG184824A1 (en) 2012-11-29
US20110316044A1 (en) 2011-12-29
GB201300789D0 (en) 2013-02-27
DE112011101378T5 (de) 2013-03-07
JP2013534052A (ja) 2013-08-29
CN102906880A (zh) 2013-01-30
GB2494608B (en) 2013-09-04
WO2011162977A2 (en) 2011-12-29
GB2494608A (en) 2013-03-13

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Legal Events

Date Code Title Description
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]
B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]