BR0103914A - Método e aparelho para melhorar ascaracterìsticas de captura e travamento de laçosde travamento de fase - Google Patents

Método e aparelho para melhorar ascaracterìsticas de captura e travamento de laçosde travamento de fase

Info

Publication number
BR0103914A
BR0103914A BR0103914-8A BR0103914A BR0103914A BR 0103914 A BR0103914 A BR 0103914A BR 0103914 A BR0103914 A BR 0103914A BR 0103914 A BR0103914 A BR 0103914A
Authority
BR
Brazil
Prior art keywords
locking
error signal
capturing
improving
phase
Prior art date
Application number
BR0103914-8A
Other languages
English (en)
Inventor
William R Pearson
Original Assignee
Gen Electric
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gen Electric filed Critical Gen Electric
Publication of BR0103914A publication Critical patent/BR0103914A/pt

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

Patente de Invenção: "MéTODO E APARELHO PARAMELHORAR AS CARACTERìSTICAS DE CAPTURA ETRAVAMENTO DE LAçOS DE TRAVAMENTO DE FASE". Umlaço de travamento de fase com características de captura etravamento melhoradas. Um primeiro sinal de erro dedeslocamento, um sinal de erro em quadratura e um segundo sinalde erro de deslocamento são gerados, o segundo sinal de erro dedeslocamento combinando os benefícios do primeiro sinal de errode deslocamento e do sinal de erro em quadratura para maisproximamente se aproximar de um sinal de erro ideal e evitar umtravamento falso.
BR0103914-8A 2000-01-10 2001-01-10 Método e aparelho para melhorar ascaracterìsticas de captura e travamento de laçosde travamento de fase BR0103914A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/479,846 US6255871B1 (en) 2000-01-10 2000-01-10 Method and apparatus for improving capture and lock characteristics of phase lock loops
PCT/US2001/000695 WO2001052419A1 (en) 2000-01-10 2001-01-10 Method and apparatus for improving capture and lock characteristics of phase lock loops

Publications (1)

Publication Number Publication Date
BR0103914A true BR0103914A (pt) 2001-12-26

Family

ID=23905685

Family Applications (1)

Application Number Title Priority Date Filing Date
BR0103914-8A BR0103914A (pt) 2000-01-10 2001-01-10 Método e aparelho para melhorar ascaracterìsticas de captura e travamento de laçosde travamento de fase

Country Status (10)

Country Link
US (1) US6255871B1 (pt)
EP (1) EP1163726A4 (pt)
JP (1) JP2003520483A (pt)
KR (1) KR20010104722A (pt)
CN (1) CN1193504C (pt)
AU (1) AU781308B2 (pt)
BR (1) BR0103914A (pt)
RU (1) RU2255418C2 (pt)
WO (1) WO2001052419A1 (pt)
ZA (1) ZA200107873B (pt)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3564424B2 (ja) * 2001-05-16 2004-09-08 日本電気通信システム株式会社 Ｐｌｌ回路
US6839645B2 (en) * 2002-04-17 2005-01-04 General Electric Company Method and apparatus to perform poly-phase instrumentation with single-phase instruments
EP1884031A4 (en) * 2005-05-25 2014-01-22 Broadcom Corp PLL WITH PHASE CONTROL AND RESYNCHRONIZATION
JP5020727B2 (ja) * 2007-07-06 2012-09-05 古野電気株式会社 基準周波数発生装置
CN101232362B (zh) * 2008-01-21 2010-12-08 中兴通讯股份有限公司 一种频率综合器防假锁的方法
JP6121135B2 (ja) * 2012-10-31 2017-04-26 ラピスセミコンダクタ株式会社 同期化回路及びこれを含むクロックデータリカバリ回路
CN103457629B (zh) * 2013-09-05 2015-03-25 中国电子科技集团公司第十研究所 Pn码环辅助鉴相电路

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6118221A (ja) * 1984-07-04 1986-01-27 Kokusai Denshin Denwa Co Ltd <Kdd> 位相同期回路
JPH0824260B2 (ja) * 1987-05-26 1996-03-06 日本電気株式会社 位相比較器
JP2610171B2 (ja) * 1988-08-31 1997-05-14 日本電気エンジニアリング株式会社 位相同期回路
JP3137370B2 (ja) * 1991-08-07 2001-02-19 株式会社東芝 デジタルｐｌｌ回路
EP0779713A4 (en) * 1995-04-21 1998-07-22 Sony Corp METHOD AND DEVICE FOR PHASE SYNCHRONIZATION
US5742207A (en) * 1996-07-25 1998-04-21 Rockwell International Corporation Tracking loop having instantaneous frequency shift protection
US5939949A (en) * 1998-03-16 1999-08-17 National Semiconductor Corporation Self-adjusting startup control for charge pump current source in phase locked loop

Also Published As

Publication number Publication date
EP1163726A4 (en) 2002-06-05
AU781308B2 (en) 2005-05-12
AU2776301A (en) 2001-07-24
US6255871B1 (en) 2001-07-03
EP1163726A1 (en) 2001-12-19
ZA200107873B (en) 2003-01-02
KR20010104722A (ko) 2001-11-26
CN1358351A (zh) 2002-07-10
WO2001052419A1 (en) 2001-07-19
CN1193504C (zh) 2005-03-16
RU2255418C2 (ru) 2005-06-27
JP2003520483A (ja) 2003-07-02

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Legal Events

Date Code Title Description
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 7A E 8A ANUIDADES.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE AO DESPACHO 8.6 DA RPI 2012 DE 28/07/2009.