BR0014899A - Unidade acs de alta velocidade para um decodificador viterbi - Google Patents
Unidade acs de alta velocidade para um decodificador viterbiInfo
- Publication number
- BR0014899A BR0014899A BR0014899-7A BR0014899A BR0014899A BR 0014899 A BR0014899 A BR 0014899A BR 0014899 A BR0014899 A BR 0014899A BR 0014899 A BR0014899 A BR 0014899A
- Authority
- BR
- Brazil
- Prior art keywords
- acs
- multiplexer
- measurements
- memory
- select
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6566—Implementations concerning memory access contentions
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/395—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using a collapsed trellis, e.g. M-step algorithm, radix-n architectures with n>2
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
- H03M13/4107—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing add, compare, select [ACS] operations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
- H03M13/4161—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing path management
- H03M13/4169—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing path management using traceback
Landscapes
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
- Detection And Correction Of Errors (AREA)
Abstract
"UNIDADE ACS DE ALTA VELOCIDADE PARA UM DECODIFICADOR VITERBI". Sistema desempenhando uma operação borboleta de Adição-Comparação-Seleção (ACS - add-compare-select) em uma implementação do algoritmo Viterbi. O sistema inclui um primeiro elemento de memória (145) para armazenar uma pluralidade de medidas de estado fonte; um multiplexador (670) o qual é capacitado a selecionar entre um primeiro e um segundo caminhos de operação baseado em ciclos de clock pares e ímpares. O mecanismo ACS (600), o qual calcula as medidas de estado alvo para cada uma das medidas de estado fonte. Uma segunda memória acoplada ao mecanismo ACS e ao multiplexador, é usada para temporariamente armazenar as medidas alvo. O multiplexador portanto seleciona o primeiro caminho de operação durante ciclos de clock pares e supre as medidas de estado fonte a partir da primeira memória ao mecanismo ACS para gerar as medidas de estado alvo. Durante ciclos de clock ímpares, o multiplexador seleciona o segundo caminho de operação para acessar a segunda memória e usar as medidas de estado alvo previamente calculadas como medidas de estado fonte intermediário.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/422,920 US6333954B1 (en) | 1999-10-21 | 1999-10-21 | High-speed ACS for Viterbi decoder implementations |
PCT/US2000/029313 WO2001029974A1 (en) | 1999-10-21 | 2000-10-23 | High-speed acs unit for a viterbi decoder |
Publications (1)
Publication Number | Publication Date |
---|---|
BR0014899A true BR0014899A (pt) | 2002-10-01 |
Family
ID=23676955
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR0014899-7A BR0014899A (pt) | 1999-10-21 | 2000-10-23 | Unidade acs de alta velocidade para um decodificador viterbi |
Country Status (13)
Country | Link |
---|---|
US (1) | US6333954B1 (pt) |
EP (1) | EP1230737A1 (pt) |
JP (1) | JP2003512756A (pt) |
KR (1) | KR100779782B1 (pt) |
CN (1) | CN1168224C (pt) |
AU (1) | AU1228501A (pt) |
BR (1) | BR0014899A (pt) |
CA (1) | CA2387766A1 (pt) |
HK (1) | HK1048204A1 (pt) |
IL (2) | IL149248A0 (pt) |
MX (1) | MXPA02003937A (pt) |
RU (1) | RU2246751C2 (pt) |
WO (1) | WO2001029974A1 (pt) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3501725B2 (ja) * | 2000-05-12 | 2004-03-02 | 日本電気株式会社 | ビタビ復号器 |
EP1158683A1 (de) * | 2000-05-24 | 2001-11-28 | Infineon Technologies AG | Vorrichtung und Verfahren zum Durchführen eines Viterbi-Algorithmus |
US7006634B1 (en) * | 2000-09-28 | 2006-02-28 | Cisco Technology, Inc. | Hardware-based encryption/decryption employing dual ported key storage |
US6873707B1 (en) * | 2000-09-28 | 2005-03-29 | Cisco Technology, Inc. | Hardware-based encryption/decryption employing cycle stealing |
US20020198681A1 (en) * | 2001-06-13 | 2002-12-26 | Kouritzin Michael A. | Flexible efficient branching particle tracking algorithms |
KR100437697B1 (ko) * | 2001-07-19 | 2004-06-26 | 스프레드텔레콤(주) | 다수준 격자부호변조방식의 복호 방법 및 장치 |
US6910177B2 (en) * | 2001-12-21 | 2005-06-21 | Texas Instruments Incorporated | Viterbi decoder using restructured trellis |
FI20021656A0 (fi) * | 2002-09-16 | 2002-09-16 | Nokia Corp | Menetelmä ja järjestely dekoodauksen suorittamiseksi |
JP2005045727A (ja) * | 2003-07-25 | 2005-02-17 | Matsushita Electric Ind Co Ltd | ビタビ復号器 |
US20050138535A1 (en) * | 2003-12-02 | 2005-06-23 | Sivagnanam Parthasarathy | Method and system for branch metric calculation in a viterbi decoder |
US8290095B2 (en) * | 2006-03-23 | 2012-10-16 | Qualcomm Incorporated | Viterbi pack instruction |
US20070266303A1 (en) * | 2006-04-27 | 2007-11-15 | Qualcomm Incorporated | Viterbi decoding apparatus and techniques |
US7861147B2 (en) * | 2006-12-08 | 2010-12-28 | Via Technologies, Inc. | ACS unit and method thereof |
US8185810B1 (en) * | 2007-04-13 | 2012-05-22 | Link—A—Media Devices Corporation | Low power viterbi trace back architecture |
US8943392B2 (en) * | 2012-11-06 | 2015-01-27 | Texas Instruments Incorporated | Viterbi butterfly operations |
CN103905068B (zh) * | 2012-12-26 | 2018-06-26 | 中国移动通信集团公司 | 一种维特比译码方法及系统 |
RU2608872C1 (ru) * | 2015-09-24 | 2017-01-25 | Валерий Владимирович Золотарев | Способ кодирования и декодирования блокового кода с использованием алгоритма Витерби |
CN114924615B (zh) * | 2022-04-22 | 2024-02-20 | 龙芯中科技术股份有限公司 | 内存时钟调节方法、装置、电子设备及存储介质 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5619514A (en) | 1994-12-29 | 1997-04-08 | Lucent Technologies Inc. | In-place present state/next state registers |
JP3344221B2 (ja) | 1996-06-28 | 2002-11-11 | 株式会社日立製作所 | デジタル信号復号装置及びそれに用いる復号方法 |
KR100195745B1 (ko) * | 1996-08-23 | 1999-06-15 | 전주범 | 비터비 복호화기의 가산 비교 선택 장치 |
US5987638A (en) | 1997-04-22 | 1999-11-16 | Lsi Logic Corporation | Apparatus and method for computing the result of a viterbi equation in a single cycle |
US6097769A (en) * | 1998-02-10 | 2000-08-01 | Lucent Technologies Inc. | Viterbi detector using path memory controlled by best state information |
US6148431A (en) * | 1998-03-26 | 2000-11-14 | Lucent Technologies Inc. | Add compare select circuit and method implementing a viterbi algorithm |
-
1999
- 1999-10-21 US US09/422,920 patent/US6333954B1/en not_active Expired - Lifetime
-
2000
- 2000-10-23 CN CNB008145385A patent/CN1168224C/zh not_active Expired - Lifetime
- 2000-10-23 JP JP2001531212A patent/JP2003512756A/ja active Pending
- 2000-10-23 BR BR0014899-7A patent/BR0014899A/pt not_active Application Discontinuation
- 2000-10-23 KR KR1020027005116A patent/KR100779782B1/ko active IP Right Grant
- 2000-10-23 AU AU12285/01A patent/AU1228501A/en not_active Abandoned
- 2000-10-23 EP EP00973815A patent/EP1230737A1/en not_active Withdrawn
- 2000-10-23 RU RU2002113295/09A patent/RU2246751C2/ru not_active IP Right Cessation
- 2000-10-23 MX MXPA02003937A patent/MXPA02003937A/es unknown
- 2000-10-23 IL IL14924800A patent/IL149248A0/xx active IP Right Grant
- 2000-10-23 WO PCT/US2000/029313 patent/WO2001029974A1/en not_active Application Discontinuation
- 2000-10-23 CA CA002387766A patent/CA2387766A1/en not_active Abandoned
-
2002
- 2002-04-21 IL IL149248A patent/IL149248A/en not_active IP Right Cessation
-
2003
- 2003-01-15 HK HK03100357.4A patent/HK1048204A1/zh unknown
Also Published As
Publication number | Publication date |
---|---|
MXPA02003937A (es) | 2002-12-13 |
HK1048204A1 (zh) | 2003-03-21 |
CN1168224C (zh) | 2004-09-22 |
CN1379931A (zh) | 2002-11-13 |
IL149248A (en) | 2006-04-10 |
WO2001029974A1 (en) | 2001-04-26 |
KR20020048975A (ko) | 2002-06-24 |
IL149248A0 (en) | 2002-11-10 |
EP1230737A1 (en) | 2002-08-14 |
US6333954B1 (en) | 2001-12-25 |
CA2387766A1 (en) | 2001-04-26 |
KR100779782B1 (ko) | 2007-11-27 |
AU1228501A (en) | 2001-04-30 |
JP2003512756A (ja) | 2003-04-02 |
RU2246751C2 (ru) | 2005-02-20 |
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Legal Events
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B07A | Application suspended after technical examination (opinion) [chapter 7.1 patent gazette] | ||
B09B | Patent application refused [chapter 9.2 patent gazette] |
Free format text: INDEFIRO O PEDIDO DE ACORDO COM O ARTIGO 8O COMBINADO COM ARTIGO 13 DA LPI. |
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B09B | Patent application refused [chapter 9.2 patent gazette] |
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